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Wed, 11 May 2022 02:52:56 -0700 (PDT) From: Michal Simek X-Google-Original-From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: Piyush Mehta , Manish Narani , Sai Krishna Potthuri , Shravya Kumbham , Srinivas Neeli Subject: [PATCH 01/10] arm64: zynqmp: Add mode-pin GPIO controller DT node Date: Wed, 11 May 2022 11:52:45 +0200 Message-Id: X-Mailer: git-send-email 2.36.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: Piyush Mehta Add mode-pin GPIO controller DT node in zynqmp.dtsi and also setup default reset-gpios property for usb which is default Xilinx setup. Signed-off-by: Piyush Mehta Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index c44260885023..6b711c810e67 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -13,6 +13,7 @@ */ #include +#include #include #include @@ -189,6 +190,12 @@ compatible = "xlnx,zynqmp-pinctrl"; status = "disabled"; }; + + modepin_gpio: gpio { + compatible = "xlnx,zynqmp-gpio-modepin"; + gpio-controller; + #gpio-cells = <2>; + }; }; }; @@ -874,6 +881,7 @@ <&zynqmp_reset ZYNQMP_RESET_USB0_HIBERRESET>, <&zynqmp_reset ZYNQMP_RESET_USB0_APB>; reset-names = "usb_crst", "usb_hibrst", "usb_apbrst"; + reset-gpios = <&modepin_gpio 1 GPIO_ACTIVE_LOW>; ranges; dwc3_0: usb@fe200000 { From patchwork Wed May 11 09:52:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1629525 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; 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Signed-off-by: Michal Simek Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-sm-k26-revA.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index e904cd8ea093..a2c88dc34c6b 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -89,6 +89,10 @@ }; }; +&modepin_gpio { + label = "modepin"; +}; + &uart1 { /* MIO36/MIO37 */ status = "okay"; }; From patchwork Wed May 11 09:52:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1629526 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=monstr-eu.20210112.gappssmtp.com header.i=@monstr-eu.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=y0fCpz+k; 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The same change was done in Linux by commit c6d4a8977598 ("ARM: tegra: Rename CPU and EMC OPP table device-tree nodes"), commit ffbe853a3f5a ("ARM: dts: sunxi: Fix OPPs node name") or commit b7072cc5704d ("arm64: dts: qcom: qcs404: Rename CPU and CPR OPP tables"). Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 6b711c810e67..a0f664a59db6 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -76,7 +76,7 @@ }; }; - cpu_opp_table: cpu-opp-table { + cpu_opp_table: opp-table-cpu { compatible = "operating-points-v2"; opp-shared; opp00 { From patchwork Wed May 11 09:52:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1629528 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=monstr-eu.20210112.gappssmtp.com header.i=@monstr-eu.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=yGJ82mKO; dkim-atps=neutral Authentication-Results: ozlabs.org; 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Wed, 11 May 2022 02:53:01 -0700 (PDT) Received: from localhost ([2a02:768:2307:40d6::f9e]) by smtp.gmail.com with ESMTPSA id e23-20020a170906315700b006f3ef214deesm779857eje.84.2022.05.11.02.53.00 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 11 May 2022 02:53:00 -0700 (PDT) From: Michal Simek X-Google-Original-From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: Michal Simek , Manish Narani , Piyush Mehta , Sai Krishna Potthuri , Shravya Kumbham , Srinivas Neeli , Stefano Stabellini Subject: [PATCH 04/10] arm64: zynqmp: Add power domain description for PL Date: Wed, 11 May 2022 11:52:48 +0200 Message-Id: X-Mailer: git-send-email 2.36.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: Michal Simek PL has own power domain which is not described in DT. That's why add it there by default. Signed-off-by: Michal Simek Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index a0f664a59db6..dae8f0669df8 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -218,6 +218,7 @@ #address-cells = <2>; #size-cells = <2>; ranges; + power-domains = <&zynqmp_firmware PD_PL>; }; amba: axi { From patchwork Wed May 11 09:52:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1629527 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=monstr-eu.20210112.gappssmtp.com header.i=@monstr-eu.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=okObHrQy; dkim-atps=neutral Authentication-Results: ozlabs.org; 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Wed, 11 May 2022 02:53:02 -0700 (PDT) Received: from localhost ([2a02:768:2307:40d6::f9e]) by smtp.gmail.com with ESMTPSA id j1-20020a170906094100b006fa8c685af1sm749919ejd.163.2022.05.11.02.53.02 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 11 May 2022 02:53:02 -0700 (PDT) From: Michal Simek X-Google-Original-From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: Vishal Patel Subject: [PATCH 05/10] arm64: zynqmp: Add pwm-fan node and fix ttc0 pwm-cells property Date: Wed, 11 May 2022 11:52:49 +0200 Message-Id: <21b4dfce3e45136a468974ea3dedca03320e27b8.1652262769.git.michal.simek@amd.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: Vishal Patel Add pwm-fan node to control fan through hwmon and change pwm-cells property to 3 to allow fancontrol utility to function correctly. Signed-off-by: Vishal Patel Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-sm-k26-revA.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index a2c88dc34c6b..8b2cd512da56 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -87,12 +87,23 @@ <&xilinx_ams 24>, <&xilinx_ams 25>, <&xilinx_ams 26>, <&xilinx_ams 27>, <&xilinx_ams 28>, <&xilinx_ams 29>; }; + + pwm-fan { + compatible = "pwm-fan"; + status = "okay"; + pwms = <&ttc0 2 40000 0>; + }; }; &modepin_gpio { label = "modepin"; }; +&ttc0 { + status = "okay"; + #pwm-cells = <3>; +}; + &uart1 { /* MIO36/MIO37 */ status = "okay"; }; From patchwork Wed May 11 09:52:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1629533 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; 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Add them to match default setup. Signed-off-by: Michal Simek Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-sm-k26-revA.dts | 95 +++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index 8b2cd512da56..35fab915172b 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -356,3 +356,98 @@ &zynqmp_dpsub { status = "okay"; }; + +&rtc { + status = "okay"; +}; + +&lpd_dma_chan1 { + status = "okay"; +}; + +&lpd_dma_chan2 { + status = "okay"; +}; + +&lpd_dma_chan3 { + status = "okay"; +}; + +&lpd_dma_chan4 { + status = "okay"; +}; + +&lpd_dma_chan5 { + status = "okay"; +}; + +&lpd_dma_chan6 { + status = "okay"; +}; + +&lpd_dma_chan7 { + status = "okay"; +}; + +&lpd_dma_chan8 { + status = "okay"; +}; + +&fpd_dma_chan1 { + status = "okay"; +}; + +&fpd_dma_chan2 { + status = "okay"; +}; + +&fpd_dma_chan3 { + status = "okay"; +}; + +&fpd_dma_chan4 { + status = "okay"; +}; + +&fpd_dma_chan5 { + status = "okay"; +}; + +&fpd_dma_chan6 { + status = "okay"; +}; + +&fpd_dma_chan7 { + status = "okay"; +}; + +&fpd_dma_chan8 { + status = "okay"; +}; + +&gpu { + status = "okay"; +}; + +&lpd_watchdog { + status = "okay"; +}; + +&watchdog0 { + status = "okay"; +}; + +&cpu_opp_table { + opp00 { + opp-hz = /bits/ 64 <1333333333>; + }; + opp01 { + opp-hz = /bits/ 64 <666666666>; + }; + opp02 { + opp-hz = /bits/ 64 <444444444>; + }; + opp03 { + opp-hz = /bits/ 64 <333333333>; + }; +}; From patchwork Wed May 11 09:52:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1629530 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=monstr-eu.20210112.gappssmtp.com header.i=@monstr-eu.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=OEwzKeQ8; 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Wed, 11 May 2022 02:53:05 -0700 (PDT) Received: from localhost ([2a02:768:2307:40d6::f9e]) by smtp.gmail.com with ESMTPSA id h8-20020a170906398800b006f3ef214e14sm767418eje.122.2022.05.11.02.53.05 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 11 May 2022 02:53:05 -0700 (PDT) From: Michal Simek X-Google-Original-From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: T Karthik Reddy , Ashok Reddy Soma Subject: [PATCH 07/10] Revert "arm64: zynqmp: Add zynqmp firmware specific DT nodes" Date: Wed, 11 May 2022 11:52:51 +0200 Message-Id: X-Mailer: git-send-email 2.36.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: T Karthik Reddy This reverts commit 50a6bd000f94832658f42fb01b9aaf9e39a52004. As zynqmp mini emmc does not rely on firmware, remove firmware related device tree modes from zynqmp mini emmc dts files. Signed-off-by: T Karthik Reddy Acked-by: Ashok Reddy Soma Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-mini-emmc0.dts | 40 ------------------------------ arch/arm/dts/zynqmp-mini-emmc1.dts | 40 ------------------------------ 2 files changed, 80 deletions(-) diff --git a/arch/arm/dts/zynqmp-mini-emmc0.dts b/arch/arm/dts/zynqmp-mini-emmc0.dts index 8d9f9ca37259..8467dd8e1cc7 100644 --- a/arch/arm/dts/zynqmp-mini-emmc0.dts +++ b/arch/arm/dts/zynqmp-mini-emmc0.dts @@ -41,46 +41,6 @@ clock-frequency = <200000000>; }; - firmware { - zynqmp_firmware: zynqmp-firmware { - compatible = "xlnx,zynqmp-firmware"; - #power-domain-cells = <1>; - method = "smc"; - u-boot,dm-pre-reloc; - - zynqmp_power: zynqmp-power { - u-boot,dm-pre-reloc; - compatible = "xlnx,zynqmp-power"; - mboxes = <&ipi_mailbox_pmu1 0>, - <&ipi_mailbox_pmu1 1>; - mbox-names = "tx", "rx"; - }; - }; - }; - - zynqmp_ipi: zynqmp_ipi { - u-boot,dm-pre-reloc; - compatible = "xlnx,zynqmp-ipi-mailbox"; - xlnx,ipi-id = <0>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - ipi_mailbox_pmu1: mailbox@ff990400 { - u-boot,dm-pre-reloc; - reg = <0x0 0xff9905c0 0x0 0x20>, - <0x0 0xff9905e0 0x0 0x20>, - <0x0 0xff990e80 0x0 0x20>, - <0x0 0xff990ea0 0x0 0x20>; - reg-names = "local_request_region", - "local_response_region", - "remote_request_region", - "remote_response_region"; - #mbox-cells = <1>; - xlnx,ipi-id = <4>; - }; - }; - amba: amba { compatible = "simple-bus"; #address-cells = <2>; diff --git a/arch/arm/dts/zynqmp-mini-emmc1.dts b/arch/arm/dts/zynqmp-mini-emmc1.dts index 5722b762d679..2afcc7751b9f 100644 --- a/arch/arm/dts/zynqmp-mini-emmc1.dts +++ b/arch/arm/dts/zynqmp-mini-emmc1.dts @@ -41,46 +41,6 @@ clock-frequency = <200000000>; }; - firmware { - zynqmp_firmware: zynqmp-firmware { - compatible = "xlnx,zynqmp-firmware"; - #power-domain-cells = <1>; - method = "smc"; - u-boot,dm-pre-reloc; - - zynqmp_power: zynqmp-power { - u-boot,dm-pre-reloc; - compatible = "xlnx,zynqmp-power"; - mboxes = <&ipi_mailbox_pmu1 0>, - <&ipi_mailbox_pmu1 1>; - mbox-names = "tx", "rx"; - }; - }; - }; - - zynqmp_ipi: zynqmp_ipi { - u-boot,dm-pre-reloc; - compatible = "xlnx,zynqmp-ipi-mailbox"; - xlnx,ipi-id = <0>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - ipi_mailbox_pmu1: mailbox@ff990400 { - u-boot,dm-pre-reloc; - reg = <0x0 0xff9905c0 0x0 0x20>, - <0x0 0xff9905e0 0x0 0x20>, - <0x0 0xff990e80 0x0 0x20>, - <0x0 0xff990ea0 0x0 0x20>; - reg-names = "local_request_region", - "local_response_region", - "remote_request_region", - "remote_response_region"; - #mbox-cells = <1>; - xlnx,ipi-id = <4>; - }; - }; - amba: amba { compatible = "simple-bus"; #address-cells = <2>; From patchwork Wed May 11 09:52:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1629529 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; 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The support for this has been added to Linux and U-Boot already that's why also describe the phy via DT. Clock is coming from si5332 chip (output 1) 125MHz which is only one GT line use on this board. Signed-off-by: Michal Simek Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index f229880a7021..726183782305 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -42,6 +42,12 @@ reg = <0x0 0x0 0x0 0x80000000>; }; + si5332_1: si5332_1 { /* u142 - GEM0 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + ina226-vccint { compatible = "iio-hwmon"; io-channels = <&vccint 0>, <&vccint 1>, <&vccint 2>, <&vccint 3>; @@ -135,8 +141,17 @@ xlnx,mio-bank = <1>; }; +/* GEM SGMII */ +&psgtr { + status = "okay"; + /* gem0 */ + clocks = <&si5332_1>; + clock-names = "ref0"; +}; + &gem0 { status = "okay"; + phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; phy-handle = <&phy0>; phy-mode = "sgmii"; is-internal-pcspma; From patchwork Wed May 11 09:52:53 2022 Content-Type: text/plain; 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Wed, 11 May 2022 02:53:08 -0700 (PDT) From: Michal Simek X-Google-Original-From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: Radhey Shyam Pandey Subject: [PATCH 09/10] arm64: zynqmp: Add linux,code for fwuen button Date: Wed, 11 May 2022 11:52:53 +0200 Message-Id: <7f6d627473632c3c3036ec9f6aaa36e00f4615e2.1652262769.git.michal.simek@amd.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean BTN_MISC looks like the most reasonable option for this button. Button is used by firmware to indicate (after reset, power up) that user wants to do firmware upgrade via firmware update utility. For bootloader or OS is this just user button which is worth to have it mapped. Also button can be used as a wakeup source and pressing it for more time can generate more chars that's why also adding wakeup-source and autorepeat properties. Signed-off-by: Michal Simek Reviewed-by: Radhey Shyam Pandey --- arch/arm/dts/zynqmp-sm-k26-revA.dts | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index 35fab915172b..7c2bfa395da7 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -56,6 +56,9 @@ fwuen { label = "fwuen"; gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + linux,code = ; + wakeup-source; + autorepeat; }; }; From patchwork Wed May 11 09:52:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1629531 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=monstr-eu.20210112.gappssmtp.com header.i=@monstr-eu.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=PIoKX0XG; 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Wed, 11 May 2022 02:53:10 -0700 (PDT) Received: from localhost ([2a02:768:2307:40d6::f9e]) by smtp.gmail.com with ESMTPSA id h20-20020a1709070b1400b006f8c8e43a45sm777450ejl.103.2022.05.11.02.53.09 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 11 May 2022 02:53:09 -0700 (PDT) From: Michal Simek X-Google-Original-From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: Michal Simek Subject: [PATCH 10/10] arm64: zynqmp: Add DT description for si5328 for zcu102/zcu106 Date: Wed, 11 May 2022 11:52:54 +0200 Message-Id: X-Mailer: git-send-email 2.36.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: Michal Simek Origin DT binding just specify driver but wasn't aligned with DT binding which came later. Extend description for zcu102 and zcu106 to cover latest binding. Signed-off-by: Michal Simek Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu102-revA.dts | 21 ++++++++++++++++++++- arch/arm/dts/zynqmp-zcu106-revA.dts | 21 ++++++++++++++++++++- 2 files changed, 40 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index aac798d6e74a..c13b52a6aeaa 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -604,7 +604,26 @@ #address-cells = <1>; #size-cells = <0>; reg = <4>; - /* SI5328 - u20 */ + si5328: clock-generator@69 {/* SI5328 - u20 */ + compatible = "silabs,si5328"; + reg = <0x69>; + /* + * Chip has interrupt present connected to PL + * interrupt-parent = <&>; + * interrupts = <>; + */ + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + clocks = <&refhdmi>; + clock-names = "xtal"; + clock-output-names = "si5328"; + + si5328_clk: clk0@0 { + reg = <0>; + clock-frequency = <27000000>; + }; + }; }; /* 5 - 7 unconnected */ }; diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index 03624648cd71..6dfc8fe17bf2 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -593,7 +593,26 @@ #address-cells = <1>; #size-cells = <0>; reg = <4>; - /* SI5328 - u20 */ + si5328: clock-generator@69 {/* SI5328 - u20 */ + compatible = "silabs,si5328"; + reg = <0x69>; + /* + * Chip has interrupt present connected to PL + * interrupt-parent = <&>; + * interrupts = <>; + */ + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + clocks = <&refhdmi>; + clock-names = "xtal"; + clock-output-names = "si5328"; + + si5328_clk: clk0@0 { + reg = <0>; + clock-frequency = <27000000>; + }; + }; }; i2c@5 { #address-cells = <1>;