From patchwork Wed May 4 10:56:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 1626274 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=OZfmmkVh; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=foss.st.com header.i=@foss.st.com header.a=rsa-sha256 header.s=selector1 header.b=pjdrCkHh; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org; envelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org; receiver=) Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:e::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KtYft1mccz9sG0 for ; Wed, 4 May 2022 20:56:38 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Subject:CC:To:From:MIME-Version:Date:Message-ID: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=jr9pWV4HfgTdN9cPTblMRhd17TguPdgc0+Y3HrYIjDE=; b=OZfmmkVhxVH3+RnxxvtCDq/Mof m/+i2rIDEoSFHDNHL0npWKmq121R/VRU59CrsuPbaPM1MaQ2810EhXp+YJW6jKc3omvZByjDZDi6H bMaI4f1NeXVfHbgs56iDIkn4tW9ltnqARpQsS5KyHmrK3thhMVMUOE+Vhqcd+CDUSVi0YYJolZu0s wpyI5JETNaCcSg1StzAsaJYUmKfdtj7+YQSpGWJ/JINY855LKoZbJLOoq4lnhdphVetsKxoJNuxhY 2hLgb0cJkKzwPQEOcRqrbXtNNONQcSq8oKkRnHCBrIfXvewvNSJmHV67YXvI3EC6SS8jPE3X8q9LR Bx7Fl3Zw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmCg9-00AMcK-Qi; Wed, 04 May 2022 10:56:21 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93] helo=mx07-00178001.pphosted.com) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmCg5-00AMZV-3J for linux-arm-kernel@lists.infradead.org; Wed, 04 May 2022 10:56:19 +0000 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 244AJI3L026488; Wed, 4 May 2022 12:56:04 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=message-id : date : mime-version : from : to : cc : subject : content-type : content-transfer-encoding; s=selector1; bh=Xnqc1e3qJr4B+kjFzuD5x/1NfqyggxJmLVsEsfcQXVA=; b=pjdrCkHh4i1GE1jqoe8WwOLEjYn4YeRDalJ2zTVDO6+Xkf+MUQPxWPQwt5+06Gq1J0pr ehaxxxRfwZ3+6OFrQPcbAHtv0liqfKmc6wnmJOMsNl+vOct3fbt0e5Xag5kh7ItFvD1p aS9Rx+bRY2JYJKDrFNLyqGkOK9IwqiobHTBubm6GjDkPPjZO9P1RVnpWLSjh9Au5hXuu Ynict6fYEPKOzA3r2cmF5tEkhilIWZxPK4CAlm2QJa172zqxbgJvbUw1ZXL94/fE+Xf2 XWpJd+0bSUTKRxio1fFWQc5nwc6FRML232E34RXWgL7lobt5e05bmHOXCYB18kvTqTDZ 2Q== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3frt88w04h-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 May 2022 12:56:04 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 8039710002A; Wed, 4 May 2022 12:56:03 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 7414F21B505; Wed, 4 May 2022 12:56:03 +0200 (CEST) Received: from [10.201.21.93] (10.75.127.47) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2308.20; Wed, 4 May 2022 12:56:03 +0200 Message-ID: <5818c943-882d-7e50-430d-ae3299a108ee@foss.st.com> Date: Wed, 4 May 2022 12:56:02 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Content-Language: en-US From: Alexandre TORGUE To: Arnd Bergmann , Olof Johansson , Kevin Hilman , SoC Team , arm-soc CC: Alexandre TORGUE , "linux-arm-kernel@lists.infradead.org" , "linux-stm32@st-md-mailman.stormreply.com" Subject: [GIT PULL] STM32 DT changes for v5.19 #1 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-04_03,2022-05-04_01,2022-02-23_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220504_035618_006469_FA1C8466 X-CRM114-Status: GOOD ( 18.46 ) X-Spam-Score: -0.8 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Hi ARM SoC maintainers, Please consider this first round of STM32 DT updates for v5.19. Main updates are related to new Protonic 10BaseT boards support and the addition of a secure version of STM32MP15 boards (ED1/EV1/DK1/DK [...] Content analysis details: (-0.8 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [91.207.212.93 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org Hi ARM SoC maintainers, Please consider this first round of STM32 DT updates for v5.19. Main updates are related to new Protonic 10BaseT boards support and the addition of a secure version of STM32MP15 boards (ED1/EV1/DK1/DK2) based on OP-TEE OS and SCMI protocol. Note, that patch "dt-bindings: rcc: Add optional external ethernet RX clock properties" (https://lore.kernel.org/r/20220410220514.21779-1-marex@denx.de) is already merged in Rob tree. regards Alex The following changes since commit 3123109284176b1532874591f7c81f3837bbdc17: Linux 5.18-rc1 (2022-04-03 14:08:21 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git tags/stm32-dt-for-v5.19-1 for you to fetch changes up to 5b7e58313a77e951850586cfaa9f5d60122f908f: ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1) (2022-05-04 11:03:08 +0200) ---------------------------------------------------------------- STM32 DT for v5.19, round 1 Highlights: ---------- -MCU: -Fix pinctrl node names to match with pinctrl yaml. - MPU: -General: - Fix pinctrl node names to match with pinctrl yaml. - Add Protonics boards support based on STM32MP151A SoC: - PRTT1C - 10BaseT1L switch: mainly embeds a sja1105q switch with TI and Micrel 10BaseT Phys and wifi support. - PRTT1S - 10BaseT1L CO2 sensor board: mainly embeds I2C humidity and CO2 sensors. - PRTT1A - 10BaseT1L multi functional controller. - ST boards: - Add RTC support on stm32mp13. - Add button and heartbit support on stm32mp13 DK board. - Add a secure version of STM32MP15 ED1/EV1/DK1/DK2 boards based on OP-TEE OS and SCMI protocol. - DH boards: - Use MCO2 to generate PHY clock and ETHRX clock in order to release internal PLL for a better SD card usage. - Add 1ms PHY post-reset on Avenger96 board to match with PHY requirements. ---------------------------------------------------------------- Alexandre Torgue (6): dt-bindings: clock: stm32mp1: describes clocks if "st,stm32mp1-rcc-secure" dt-bindings: clock: stm32mp15: rename CK_SCMI define dt-bindings: reset: stm32mp15: rename RST_SCMI define ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15 dt-bindings: arm: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1) ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1) Fabien Dessenne (5): ARM: dts: stm32: fix pinctrl node name warnings (MCU soc) ARM: dts: stm32: fix pinctrl node name warnings (MPU soc) ARM: dts: stm32: add EXTI interrupt-parent to pinctrl node on stm32mp131 ARM: dts: stm32: add blue led (Linux heartbeat) on stm32mp135f-dk ARM: dts: stm32: add UserPA13 button on stm32mp135f-dk Krzysztof Kozlowski (2): dt-bindings: arm: stm32: narrow DH STM32MP1 SoM boards dt-bindings: arm: stm32: correct blank lines Marek Vasut (5): ARM: dts: stm32: Add alternate pinmux for ethernet0 pins ARM: dts: stm32: Add alternate pinmux for mco2 pins ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM ARM: dts: stm32: Fix PHY post-reset delay on Avenger96 dt-bindings: rcc: Add optional external ethernet RX clock properties Oleksij Rempel (4): dt-bindings: arm: stm32: Add compatible strings for Protonic T1L boards dt-bindings: net: silabs,wfx: add prt,prtt1c-wfm200 antenna variant ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group ARM: dts: stm32: add support for Protonic PRTT1x boards Valentin Caron (2): ARM: dts: stm32: add RTC node on stm32mp131 ARM: dts: stm32: enable RTC support on stm32mp135f-dk .../devicetree/bindings/arm/stm32/stm32.yaml | 63 ++++- .../devicetree/bindings/clock/st,stm32mp1-rcc.yaml | 34 +++ .../bindings/staging/net/wireless/silabs,wfx.yaml | 1 + arch/arm/boot/dts/Makefile | 7 + arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 2 +- arch/arm/boot/dts/stm32f7-pinctrl.dtsi | 2 +- arch/arm/boot/dts/stm32h743.dtsi | 2 +- arch/arm/boot/dts/stm32mp131.dtsi | 19 +- arch/arm/boot/dts/stm32mp135f-dk.dts | 29 ++ arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 64 +++++ arch/arm/boot/dts/stm32mp151.dtsi | 45 ++- arch/arm/boot/dts/stm32mp151a-prtt1a.dts | 52 ++++ arch/arm/boot/dts/stm32mp151a-prtt1c.dts | 304 +++++++++++++++++++++ arch/arm/boot/dts/stm32mp151a-prtt1l.dtsi | 229 ++++++++++++++++ arch/arm/boot/dts/stm32mp151a-prtt1s.dts | 63 +++++ arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts | 86 ++++++ arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts | 95 +++++++ arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts | 91 ++++++ arch/arm/boot/dts/stm32mp157c-ev1-scmi.dts | 100 +++++++ arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi | 22 +- arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi | 1 + include/dt-bindings/clock/stm32mp1-clks.h | 46 ++-- include/dt-bindings/reset/stm32mp1-resets.h | 24 +- 23 files changed, 1319 insertions(+), 62 deletions(-) create mode 100644 arch/arm/boot/dts/stm32mp151a-prtt1a.dts create mode 100644 arch/arm/boot/dts/stm32mp151a-prtt1c.dts create mode 100644 arch/arm/boot/dts/stm32mp151a-prtt1l.dtsi create mode 100644 arch/arm/boot/dts/stm32mp151a-prtt1s.dts create mode 100644 arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts create mode 100644 arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts create mode 100644 arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts create mode 100644 arch/arm/boot/dts/stm32mp157c-ev1-scmi.dts