From patchwork Wed Apr 27 11:28:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 1622971 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=baylibre-com.20210112.gappssmtp.com header.i=@baylibre-com.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=oOZ3hn7U; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KpGjD6ZpVz9s3q for ; Wed, 27 Apr 2022 21:28:48 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6E8C483E15; Wed, 27 Apr 2022 13:28:45 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=baylibre-com.20210112.gappssmtp.com header.i=@baylibre-com.20210112.gappssmtp.com header.b="oOZ3hn7U"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 2CC4C83C05; Wed, 27 Apr 2022 13:28:29 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4AEEE83D3D for ; Wed, 27 Apr 2022 13:28:25 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=narmstrong@baylibre.com Received: by mail-wr1-x42b.google.com with SMTP id e24so2037657wrc.9 for ; Wed, 27 Apr 2022 04:28:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GWu4PuE0OLhX6ez4WasiUpS7u/QoUQRROpTewumoq48=; b=oOZ3hn7UiTGM2XO0hlEOoYoWTcZB1RPXiQ09UObjRnv+ZZPngCwUwgrKC5Mrp9Fz/+ I3yI25p+UkpNYFXupCK9IWk7OqvYK9CHSNkDIgoneLquvQhqDBbj4gBAnnN8BNFP90Rj JA9Kln6X1kXUlrHDPYR6cEiqO2+UKqQH809tbGHHXXRNdcwh3DFJVsugcJ6z5H8HgLjt 25Nmd3wjq+RqjJEQo/e1iveRpU0gtWidvp7r4T0grBnk0r8GfSsjM3XoRW59QMdJKRuM uLTb623TSKSgTWu9S3tqktTL2mIn03zF966ykhsP0mnaC99tXGg2g6JvSRPVKlKO1QHI XVyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GWu4PuE0OLhX6ez4WasiUpS7u/QoUQRROpTewumoq48=; b=SNMDOtFJJY40o0jyzpByKwandeIvvA4IPE2bcaJ3Zf6sJd0rHx3sf0CtoCHZ6JGy0U iLfK5IH2pr5a9A1Pb4PWbCVVv/Q+u61LZo4n/6jX6/k0PvGlnRXm/vgMTpyWFBRgV1jR HHu9Y6+tk2/sfN/OGA9LMXeQYOFZJC47tjxNJKj0gVXvz7nn/5pfullQeCJCHIb9u6n0 6qCa4hlQNjf5bDknF78Ww9b3XabFqN/CiNcuHSa/L+L2Eb1vKNpBfdGkbVNGdVrXyT2B kPa//KNnhF/ljohPiV7cjcgGvBySc1YNnGmjgj2gEJzqnY7UYd6LoAMBgUAtH12phusn mHFw== X-Gm-Message-State: AOAM533wxEh1I6bDouzMHCy7zNyxWw4ORizWMDCHvlRYUhSya6Gh930/ WApwZXknW/LXkA5y8/VPa1JE7d49FJOWUw== X-Google-Smtp-Source: ABdhPJxlNCLxVY3DCHNuNv5IX1w5UMkl2sFssTnLmK7rt45XL+xl7ApQeP7spDXQ/5I/mcznD2e5Bw== X-Received: by 2002:adf:f4c5:0:b0:20a:ece1:1e91 with SMTP id h5-20020adff4c5000000b0020aece11e91mr3090864wrp.172.1651058904769; Wed, 27 Apr 2022 04:28:24 -0700 (PDT) Received: from localhost.localdomain ([2001:861:44c0:66c0:b735:88a0:c43a:20c8]) by smtp.gmail.com with ESMTPSA id u19-20020a05600c19d300b00393f081d49fsm1452622wmq.2.2022.04.27.04.28.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Apr 2022 04:28:23 -0700 (PDT) From: Neil Armstrong To: d-gerlach@ti.com, jh80.chung@samsung.com Cc: u-boot@lists.denx.de, khilman@baylibre.com, Neil Armstrong Subject: [PATCH 1/4] power: add driver for the TPS65219 PMIC Date: Wed, 27 Apr 2022 13:28:09 +0200 Message-Id: <20220427112812.2991816-2-narmstrong@baylibre.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220427112812.2991816-1-narmstrong@baylibre.com> References: <20220427112812.2991816-1-narmstrong@baylibre.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean The TPS65219 I2S PMIC features 3 Buck converters and 4 linear regulators, 2 GPOs, 1 GPIO, and 3 multi-function-pin. This adds the PMIC driver, loading the regulator sub-nodes. Signed-off-by: Neil Armstrong --- drivers/power/pmic/Kconfig | 6 +++ drivers/power/pmic/Makefile | 1 + drivers/power/pmic/tps65219.c | 88 +++++++++++++++++++++++++++++++++++ include/power/tps65219.h | 46 ++++++++++++++++++ 4 files changed, 141 insertions(+) create mode 100644 drivers/power/pmic/tps65219.c create mode 100644 include/power/tps65219.h diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index 953c92e212..bb3960020d 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -367,6 +367,12 @@ config PMIC_TPS65941 The TPS65941 is a PMIC containing a bunch of SMPS & LDOs. This driver binds the pmic children. +config PMIC_TPS65219 + bool "Enable driver for Texas Instruments TPS65219 PMIC" + depends on DM_PMIC + help + The TPS65219 is a PMIC containing a bunch of SMPS & LDOs. + This driver binds the pmic children. endif config PMIC_TPS65217 diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index 584d6e0e78..f73b326255 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -43,3 +43,4 @@ obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o obj-$(CONFIG_POWER_HI6553) += pmic_hi6553.o obj-$(CONFIG_POWER_MC34VR500) += pmic_mc34vr500.o obj-$(CONFIG_PMIC_TPS65941) += tps65941.o +obj-$(CONFIG_PMIC_TPS65219) += tps65219.o diff --git a/drivers/power/pmic/tps65219.c b/drivers/power/pmic/tps65219.c new file mode 100644 index 0000000000..9462afee77 --- /dev/null +++ b/drivers/power/pmic/tps65219.c @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2022 BayLibre, SAS + * Author: Neil Armstrong + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static const struct pmic_child_info pmic_children_info[] = { + { .prefix = "ldo", .driver = TPS65219_LDO_DRIVER }, + { .prefix = "buck", .driver = TPS65219_BUCK_DRIVER }, + { }, +}; + +static int tps65219_reg_count(struct udevice *dev) +{ + return 0x41; +} + +static int tps65219_write(struct udevice *dev, uint reg, const uint8_t *buff, + int len) +{ + if (dm_i2c_write(dev, reg, buff, len)) { + pr_err("write error to device: %p register: %#x!\n", dev, reg); + return -EIO; + } + + return 0; +} + +static int tps65219_read(struct udevice *dev, uint reg, uint8_t *buff, int len) +{ + if (dm_i2c_read(dev, reg, buff, len)) { + pr_err("read error from device: %p register: %#x!\n", dev, reg); + return -EIO; + } + + return 0; +} + +static int tps65219_bind(struct udevice *dev) +{ + ofnode regulators_node; + int children; + + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { + debug("%s: %s regulators subnode not found!\n", __func__, + dev->name); + } + + debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); + + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) + printf("%s: %s - no child found\n", __func__, dev->name); + + /* Probe all the child devices */ + return dm_scan_fdt_dev(dev); +} + +static struct dm_pmic_ops tps65219_ops = { + .reg_count = tps65219_reg_count, + .read = tps65219_read, + .write = tps65219_write, +}; + +static const struct udevice_id tps65219_ids[] = { + { .compatible = "ti,tps65219" }, + { } +}; + +U_BOOT_DRIVER(pmic_tps65219) = { + .name = "tps65219_pmic", + .id = UCLASS_PMIC, + .of_match = tps65219_ids, + .bind = tps65219_bind, + .ops = &tps65219_ops, +}; diff --git a/include/power/tps65219.h b/include/power/tps65219.h new file mode 100644 index 0000000000..aa81b92266 --- /dev/null +++ b/include/power/tps65219.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2022 BayLibre, SAS + * Author: Neil Armstrong + */ + +#ifndef TPS65219_H +#define TPS65219_H + +/* I2C device address for pmic tps65219 */ +#define TPS65219_I2C_ADDR 0x30 +#define TPS65219_LDO_NUM 4 +#define TPS65219_BUCK_NUM 3 + +/* Drivers name */ +#define TPS65219_LDO_DRIVER "tps65219_ldo" +#define TPS65219_BUCK_DRIVER "tps65219_buck" + +#define TPS65219_VOLT_MASK 0x3F +#define TPS65219_BUCK_VOLT_MAX 3400000 + +#define TPS65219_ENABLE_CTRL_REG 0x2 + +#define TPS65219_BUCK1_VOUT_REG 0xa +#define TPS65219_BUCK2_VOUT_REG 0x9 +#define TPS65219_BUCK3_VOUT_REG 0x8 + +#define TPS65219_LDO1_VOUT_REG 0x7 +#define TPS65219_LDO2_VOUT_REG 0x6 + +#define TPS65219_LDO12_BYP_CONFIG 6 + +#define TPS65219_LDO3_VOUT_REG 0x5 +#define TPS65219_LDO4_VOUT_REG 0x4 + +#define TPS65219_LDO12_VOLT_BYP_MIN 1500000 +#define TPS65219_LDO12_VOLT_MIN 600000 +#define TPS65219_LDO12_VOLT_MAX 3400000 +#define TPS65219_LDO12_VOLT_REG_MIN 0 +#define TPS65219_LDO12_VOLT_REG_MAX 0x56 +#define TPS65219_LDO34_VOLT_MIN 1200000 +#define TPS65219_LDO34_VOLT_MAX 3300000 +#define TPS65219_LDO34_VOLT_REG_MIN 0x12 +#define TPS65219_LDO34_VOLT_REG_MAX 0x54 + +#endif /* TPS65219_H */ From patchwork Wed Apr 27 11:28:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 1622974 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=baylibre-com.20210112.gappssmtp.com header.i=@baylibre-com.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=ScMg2BCE; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KpGk14swGz9s3q for ; Wed, 27 Apr 2022 21:29:29 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B9A9D83EDE; Wed, 27 Apr 2022 13:29:11 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=baylibre-com.20210112.gappssmtp.com header.i=@baylibre-com.20210112.gappssmtp.com header.b="ScMg2BCE"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id A796783E9D; Wed, 27 Apr 2022 13:28:36 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 47A7183E15 for ; Wed, 27 Apr 2022 13:28:28 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=narmstrong@baylibre.com Received: by mail-wr1-x42b.google.com with SMTP id b19so2028743wrh.11 for ; Wed, 27 Apr 2022 04:28:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MMa3uJerbqwGhs381i59ycWV3sHESPhcnv8Kt4nWU+k=; b=ScMg2BCEzrewyHhwczxWyv5fmYeP+w+oDlcu+NTtbmGZ7XwH7czDAPeTmSU8Slr3F5 jjvqxV0jeQWrV3BQBUL5Dcydmq2zHUi2RlngQfdyu/jOasOoNRf2obdo+R2uVIB5Xj+Q WsEtmNQ/XZF9KeTjQMbYK4wnQNNUVjQ+1Mmd2CMSjYU/PHt+x+Vnb8jjh51wpvh5FxUH PZoJvigzkHibgwd9p5hZlyM2KNUizODppLHzhGclw3hSeaoI63C/gJVbgqdro/njSQcM HQh1cXdPYthxtdraV6BzaWKND/eghfnS5PzHhXnRFnZ8IBvU8SxNSMwz6EIOk0NR0147 7laA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MMa3uJerbqwGhs381i59ycWV3sHESPhcnv8Kt4nWU+k=; b=Q4bRiXav9of4y9/G01TUU5Sa+BXKc0vU09nCAhJ2Br/gSgyIUwVTiF+fNSrV6WvV2I pxffdtyTZqMzFWu4UCxx+RutHErbcf8hifnbhoWrY9at8RU7UNyQaFwoZA9whEqZozc/ OQARynur14dU6Huaol44fuaZZNSe2/70wzBxh6ytFzBt6jx+sIVszDN7SUqZy145d75P cYZ5KzSVYt+j+OwSN0PaF/TSgV+8QnRWz1BMUJmr/jDoUx1mSwDp7c6DZNUhtpPYoh4Z 1N0yCneHpHt9fMcEPo+NOEusf/kyfwh9A+T+d1noI4QK2N5c6VlX3n/Ief9Ps95eRx3n 23vQ== X-Gm-Message-State: AOAM531AoE3xL3EOhhPiwQSM4ZxX7NSMVGfnckGIdhmNubb8X5bnvRue 54e0HbEHzE7vMY1LIVh1M5YTKQgwpzyxMg== X-Google-Smtp-Source: ABdhPJyVPLFUO3VlrjdQBQDRYtMNVkHRroVkDK4r0Hy2x7Nk/Mcwetw2lWMcN71vKHP/6x3h1zB58Q== X-Received: by 2002:a5d:5966:0:b0:20a:e810:5e9d with SMTP id e38-20020a5d5966000000b0020ae8105e9dmr5371247wri.240.1651058907755; Wed, 27 Apr 2022 04:28:27 -0700 (PDT) Received: from localhost.localdomain ([2001:861:44c0:66c0:b735:88a0:c43a:20c8]) by smtp.gmail.com with ESMTPSA id u19-20020a05600c19d300b00393f081d49fsm1452622wmq.2.2022.04.27.04.28.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Apr 2022 04:28:27 -0700 (PDT) From: Neil Armstrong To: d-gerlach@ti.com, jh80.chung@samsung.com Cc: u-boot@lists.denx.de, khilman@baylibre.com, Neil Armstrong Subject: [PATCH 2/4] regulator: add driver for the TPS65219 BUCK & LDO regulators Date: Wed, 27 Apr 2022 13:28:10 +0200 Message-Id: <20220427112812.2991816-3-narmstrong@baylibre.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220427112812.2991816-1-narmstrong@baylibre.com> References: <20220427112812.2991816-1-narmstrong@baylibre.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean The TPS65219 I2S PMIC features 3 Buck converters and 4 linear regulators, 2 GPOs, 1 GPIO, and 3 multi-function-pin. This adds the driver for the Buck converters & linear regulators. Signed-off-by: Neil Armstrong --- drivers/power/regulator/Kconfig | 9 + drivers/power/regulator/Makefile | 1 + drivers/power/regulator/tps65219_regulator.c | 380 +++++++++++++++++++ 3 files changed, 390 insertions(+) create mode 100644 drivers/power/regulator/tps65219_regulator.c diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index cd253b95f2..9145408b3c 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -371,3 +371,12 @@ config DM_REGULATOR_SCMI help Enable this option if you want to support regulators exposed through the SCMI voltage domain protocol by a SCMI server. + +config DM_REGULATOR_TPS65219 + bool "Enable driver for TPS65219 PMIC regulators" + depends on PMIC_TPS65219 + help + This enables implementation of driver-model regulator uclass + features for REGULATOR TPS65219 and the family of TPS65219 PMICs. + TPS65219 series of PMICs have 3 single phase BUCKs & 4 LDOs. + The driver implements get/set api for value and enable. diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile index 4efb32a322..b9883df928 100644 --- a/drivers/power/regulator/Makefile +++ b/drivers/power/regulator/Makefile @@ -32,3 +32,4 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_STPMIC1) += stpmic1.o obj-$(CONFIG_DM_REGULATOR_TPS65941) += tps65941_regulator.o obj-$(CONFIG_DM_REGULATOR_SCMI) += scmi_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_ANATOP) += anatop_regulator.o +obj-$(CONFIG_DM_REGULATOR_TPS65219) += tps65219_regulator.o diff --git a/drivers/power/regulator/tps65219_regulator.c b/drivers/power/regulator/tps65219_regulator.c new file mode 100644 index 0000000000..023cf211fc --- /dev/null +++ b/drivers/power/regulator/tps65219_regulator.c @@ -0,0 +1,380 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2022 BayLibre, SAS + * Author: Neil Armstrong + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static const unsigned int tps65219_buck_vout[TPS65219_BUCK_NUM] = { + [0] = TPS65219_BUCK1_VOUT_REG, + [1] = TPS65219_BUCK2_VOUT_REG, + [2] = TPS65219_BUCK3_VOUT_REG +}; + +static const unsigned int tps65219_ldo_vout[TPS65219_LDO_NUM] = { + [0] = TPS65219_LDO1_VOUT_REG, + [1] = TPS65219_LDO2_VOUT_REG, + [2] = TPS65219_LDO3_VOUT_REG, + [3] = TPS65219_LDO4_VOUT_REG, +}; + +static int tps65219_reg_enable(struct udevice *dev, unsigned int adr, int idx, + int op, bool *enable) +{ + int ret; + + ret = pmic_reg_read(dev->parent, adr); + if (ret < 0) + return ret; + + if (op == PMIC_OP_GET) { + if (ret & BIT(idx)) + *enable = true; + else + *enable = false; + + return 0; + } else if (op == PMIC_OP_SET) { + if (*enable) + ret |= BIT(idx); + else + ret &= ~BIT(idx); + + ret = pmic_reg_write(dev->parent, adr, ret); + if (ret) + return ret; + } + + return 0; +} + +static int tps65219_buck_enable(struct udevice *dev, int op, bool *enable) +{ + unsigned int adr; + struct dm_regulator_uclass_plat *uc_pdata; + int idx; + + idx = dev->driver_data - 1; + uc_pdata = dev_get_uclass_plat(dev); + adr = uc_pdata->ctrl_reg; + + return tps65219_reg_enable(dev, adr, idx, op, enable); +} + +static int tps65219_buck_volt2val(int uV) +{ + if (uV > TPS65219_BUCK_VOLT_MAX) + return -EINVAL; + else if (uV >= 1400000) + return (uV - 1400000) / 100000 + 0x20; + else if (uV >= 600000) + return (uV - 600000) / 25000 + 0x00; + else + return -EINVAL; +} + +static int tps65219_buck_val2volt(int val) +{ + if (val > TPS65219_VOLT_MASK) + return -EINVAL; + else if (val > 0x34) + return TPS65219_BUCK_VOLT_MAX; + else if (val > 0x20) + return 1400000 + (val - 0x20) * 100000; + else if (val >= 0) + return 600000 + val * 25000; + else + return -EINVAL; +} + +static int tps65219_buck_val(struct udevice *dev, int op, int *uV) +{ + unsigned int adr; + int ret, val; + struct dm_regulator_uclass_plat *uc_pdata; + + uc_pdata = dev_get_uclass_plat(dev); + adr = uc_pdata->volt_reg; + + ret = pmic_reg_read(dev->parent, adr); + if (ret < 0) + return ret; + + if (op == PMIC_OP_GET) { + *uV = 0; + + ret &= TPS65219_VOLT_MASK; + ret = tps65219_buck_val2volt(ret); + if (ret < 0) + return ret; + + *uV = ret; + return 0; + } + + val = tps65219_buck_volt2val(*uV); + if (val < 0) + return val; + + ret &= ~TPS65219_VOLT_MASK; + ret |= val; + + ret = pmic_reg_write(dev->parent, adr, ret); + + udelay(100); + + return ret; +} + +static int tps65219_ldo_enable(struct udevice *dev, int op, bool *enable) +{ + unsigned int adr; + struct dm_regulator_uclass_plat *uc_pdata; + int idx; + + idx = TPS65219_BUCK_NUM + (dev->driver_data - 1); + uc_pdata = dev_get_uclass_plat(dev); + adr = uc_pdata->ctrl_reg; + + return tps65219_reg_enable(dev, adr, idx, op, enable); +} + +static int tps65219_ldo_volt2val(int idx, int uV) +{ + int base = TPS65219_LDO12_VOLT_MIN; + int max = TPS65219_LDO12_VOLT_MAX; + + if (idx > 1) { + base = TPS65219_LDO34_VOLT_MIN; + max = TPS65219_LDO34_VOLT_MAX; + } + + if (uV > max) + return -EINVAL; + else if (uV >= base) + return (uV - TPS65219_LDO12_VOLT_MIN) / 50000; + else + return -EINVAL; +} + +static int tps65219_ldo_val2volt(int idx, int val) +{ + int reg_base = TPS65219_LDO12_VOLT_REG_MIN; + int reg_max = TPS65219_LDO12_VOLT_REG_MAX; + int base = TPS65219_LDO12_VOLT_MIN; + int max = TPS65219_LDO12_VOLT_MAX; + + if (idx > 1) { + base = TPS65219_LDO34_VOLT_MIN; + max = TPS65219_LDO34_VOLT_MAX; + reg_base = TPS65219_LDO34_VOLT_REG_MIN; + reg_max = TPS65219_LDO34_VOLT_REG_MAX; + } + + if (val > TPS65219_VOLT_MASK || val < 0) + return -EINVAL; + else if (val >= reg_max) + return max; + else if (val <= reg_base) + return base; + else if (val >= 0) + return TPS65219_LDO12_VOLT_MIN + (50000 * val); + else + return -EINVAL; +} + +static int tps65219_ldo_val(struct udevice *dev, int op, int *uV) +{ + unsigned int adr; + int ret, val; + struct dm_regulator_uclass_plat *uc_pdata; + int idx; + + idx = dev->driver_data - 1; + uc_pdata = dev_get_uclass_plat(dev); + adr = uc_pdata->volt_reg; + + ret = pmic_reg_read(dev->parent, adr); + if (ret < 0) + return ret; + + if (op == PMIC_OP_GET) { + *uV = 0; + + ret &= TPS65219_VOLT_MASK; + ret = tps65219_ldo_val2volt(idx, ret); + if (ret < 0) + return ret; + + *uV = ret; + return 0; + } + + /* LDO1 & LDO2 in BYPASS mode only supports 1.5V max */ + if (idx < 2 && + (ret & BIT(TPS65219_LDO12_BYP_CONFIG)) && + *uV < TPS65219_LDO12_VOLT_BYP_MIN) + return -EINVAL; + + val = tps65219_ldo_volt2val(idx, *uV); + if (val < 0) + return val; + + ret &= ~TPS65219_VOLT_MASK; + ret |= val; + + ret = pmic_reg_write(dev->parent, adr, ret); + + udelay(100); + + return ret; +} + +static int tps65219_ldo_probe(struct udevice *dev) +{ + struct dm_regulator_uclass_plat *uc_pdata; + int idx; + + uc_pdata = dev_get_uclass_plat(dev); + uc_pdata->type = REGULATOR_TYPE_LDO; + + /* idx must be in 1..TPS65219_LDO_NUM */ + idx = dev->driver_data; + if (idx < 1 || idx > TPS65219_LDO_NUM) { + printf("Wrong ID for regulator\n"); + return -EINVAL; + } + + uc_pdata->ctrl_reg = TPS65219_ENABLE_CTRL_REG; + uc_pdata->volt_reg = tps65219_ldo_vout[idx - 1]; + + return 0; +} + +static int tps65219_buck_probe(struct udevice *dev) +{ + struct dm_regulator_uclass_plat *uc_pdata; + int idx; + + uc_pdata = dev_get_uclass_plat(dev); + uc_pdata->type = REGULATOR_TYPE_BUCK; + + /* idx must be in 1..TPS65219_BUCK_NUM */ + idx = dev->driver_data; + if (idx < 1 || idx > TPS65219_BUCK_NUM) { + printf("Wrong ID for regulator\n"); + return -EINVAL; + } + + uc_pdata->ctrl_reg = TPS65219_ENABLE_CTRL_REG; + uc_pdata->volt_reg = tps65219_buck_vout[idx - 1]; + + return 0; +} + +static int ldo_get_value(struct udevice *dev) +{ + int uV; + int ret; + + ret = tps65219_ldo_val(dev, PMIC_OP_GET, &uV); + if (ret) + return ret; + + return uV; +} + +static int ldo_set_value(struct udevice *dev, int uV) +{ + return tps65219_ldo_val(dev, PMIC_OP_SET, &uV); +} + +static int ldo_get_enable(struct udevice *dev) +{ + bool enable = false; + int ret; + + ret = tps65219_ldo_enable(dev, PMIC_OP_GET, &enable); + if (ret) + return ret; + + return enable; +} + +static int ldo_set_enable(struct udevice *dev, bool enable) +{ + return tps65219_ldo_enable(dev, PMIC_OP_SET, &enable); +} + +static int buck_get_value(struct udevice *dev) +{ + int uV; + int ret; + + ret = tps65219_buck_val(dev, PMIC_OP_GET, &uV); + if (ret) + return ret; + + return uV; +} + +static int buck_set_value(struct udevice *dev, int uV) +{ + return tps65219_buck_val(dev, PMIC_OP_SET, &uV); +} + +static int buck_get_enable(struct udevice *dev) +{ + bool enable = false; + int ret; + + ret = tps65219_buck_enable(dev, PMIC_OP_GET, &enable); + if (ret) + return ret; + + return enable; +} + +static int buck_set_enable(struct udevice *dev, bool enable) +{ + return tps65219_buck_enable(dev, PMIC_OP_SET, &enable); +} + +static const struct dm_regulator_ops tps65219_ldo_ops = { + .get_value = ldo_get_value, + .set_value = ldo_set_value, + .get_enable = ldo_get_enable, + .set_enable = ldo_set_enable, +}; + +U_BOOT_DRIVER(tps65219_ldo) = { + .name = TPS65219_LDO_DRIVER, + .id = UCLASS_REGULATOR, + .ops = &tps65219_ldo_ops, + .probe = tps65219_ldo_probe, +}; + +static const struct dm_regulator_ops tps65219_buck_ops = { + .get_value = buck_get_value, + .set_value = buck_set_value, + .get_enable = buck_get_enable, + .set_enable = buck_set_enable, +}; + +U_BOOT_DRIVER(tps65219_buck) = { + .name = TPS65219_BUCK_DRIVER, + .id = UCLASS_REGULATOR, + .ops = &tps65219_buck_ops, + .probe = tps65219_buck_probe, +}; From patchwork Wed Apr 27 11:28:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 1622972 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=baylibre-com.20210112.gappssmtp.com header.i=@baylibre-com.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=tlHQhGKO; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KpGjR0RLxz9s3q for ; Wed, 27 Apr 2022 21:28:58 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 0D7EC83E9B; Wed, 27 Apr 2022 13:28:51 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=baylibre-com.20210112.gappssmtp.com header.i=@baylibre-com.20210112.gappssmtp.com header.b="tlHQhGKO"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 8412D83E9D; Wed, 27 Apr 2022 13:28:33 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 9A7DF83D3D for ; Wed, 27 Apr 2022 13:28:29 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=narmstrong@baylibre.com Received: by mail-wr1-x431.google.com with SMTP id q23so2076676wra.1 for ; Wed, 27 Apr 2022 04:28:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QYFLDQwd7HZiDAAnoQtjllXfMLw2CQAy+X62Ed2j4AQ=; b=tlHQhGKOGcVNb66hoFPztiDodoecj4t+Lf9HYRp/8M6rrZr+NS8gPBWJU29bYXTSjP vnvQAkO5LaXjhuhA39/gJdxta+jw7d4HEPNZtxsHa19P96/PXtTDb1N4A1MWr8bav2KA tX9ZHhAXheNAK7znmJ3naz8iUKri4DRN3z5626yOMCP6guJAw1VbclOr9aR5+KoW0HH9 y+Z3zZfI8vi28wrQExYErVcHHXZ60Bc+Cy+UZ8PhmzuHkGisY5PcOFiJFClWKZJrtXdE ED0ySKgseg0unoBiYyXs5nb7Y0LDNPtCY7E3yveJxMPISdPTtv1cytALGgQ6k2+b21r2 SOJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QYFLDQwd7HZiDAAnoQtjllXfMLw2CQAy+X62Ed2j4AQ=; b=WTr9g46LjVHJ+M+eZQn1Hf7rqHX+s7kZvaIb0Z7A4ihRnXsQldg1c7qtrT5SIUxYOb Jh+PIxJYJSFiSqGWP23OC2OxKSrtQugcE4kgfIgz/KLk76pLq73P/iNP5dS8kFgjitKS DPkE+flXElOrlN4wXXlXbji6vmeewEIqhw+M7r8VIzr/ottTSj/2iGU4Aco5dHiGopej ST2KYPjGtPasyspu8I11Ufh2V1GCUWwf9DHW8SsGos2B/rn/S5AF2DKVh2G8eaM1MmGP 3AZv4XUTxOoEfVhcHVejSGFQxHp+QZvLm4IlL1i7dpbg5gHY2cwUwlvN7AZX7pEHMsBC sg6w== X-Gm-Message-State: AOAM532JkaKCttBMmKty7LnmIR5P7LYcatrsT6qKjAkUJaQGHTnnkkz/ ydbp5KHOndk3e9FZFT8ltaVvEg== X-Google-Smtp-Source: ABdhPJyJo2YKdV4cw7U2XkGS2jcFUERo837QnyN6ICaRD4Ac+V6/epL/oqqqVUN/kZZVIxQKYiH1kA== X-Received: by 2002:a5d:4686:0:b0:20a:e8dc:fd99 with SMTP id u6-20020a5d4686000000b0020ae8dcfd99mr5007250wrq.478.1651058909115; Wed, 27 Apr 2022 04:28:29 -0700 (PDT) Received: from localhost.localdomain ([2001:861:44c0:66c0:b735:88a0:c43a:20c8]) by smtp.gmail.com with ESMTPSA id u19-20020a05600c19d300b00393f081d49fsm1452622wmq.2.2022.04.27.04.28.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Apr 2022 04:28:28 -0700 (PDT) From: Neil Armstrong To: d-gerlach@ti.com, jh80.chung@samsung.com Cc: u-boot@lists.denx.de, khilman@baylibre.com, Neil Armstrong Subject: [PATCH 3/4] config: enable TPS65219 for am64x_evm_a53 boards Date: Wed, 27 Apr 2022 13:28:11 +0200 Message-Id: <20220427112812.2991816-4-narmstrong@baylibre.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220427112812.2991816-1-narmstrong@baylibre.com> References: <20220427112812.2991816-1-narmstrong@baylibre.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean The E4 revision of the AM64 SKEVM embeds a TPS65219 PMIC, this enables the necessary options to load and control the PMIC regulators. Signed-off-by: Neil Armstrong --- configs/am64x_evm_a53_defconfig | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index 4149921afe..2863eea3c4 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -61,6 +61,8 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_TIME=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIST="k3-am642-evm k3-am642-sk" @@ -121,6 +123,10 @@ CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y CONFIG_K3_SYSTEM_CONTROLLER=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_TPS65219=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_TPS65219=y CONFIG_REMOTEPROC_TI_K3_ARM64=y CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y From patchwork Wed Apr 27 11:28:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 1622973 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=baylibre-com.20210112.gappssmtp.com header.i=@baylibre-com.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=Gohj1TzB; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KpGjk0D8Zz9s3q for ; Wed, 27 Apr 2022 21:29:13 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 39F2183EAB; Wed, 27 Apr 2022 13:28:58 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=baylibre-com.20210112.gappssmtp.com header.i=@baylibre-com.20210112.gappssmtp.com header.b="Gohj1TzB"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 2063E83E15; Wed, 27 Apr 2022 13:28:37 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C95B083E57 for ; Wed, 27 Apr 2022 13:28:31 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=narmstrong@baylibre.com Received: by mail-wm1-x331.google.com with SMTP id 129so987002wmz.0 for ; Wed, 27 Apr 2022 04:28:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=R3qsND6qw1VvsUQce7hv+phCgRmCzpMcgrhNizQrna0=; b=Gohj1TzBKvsoax4CJsqUWS2Hrb4813HS2pFRoD5Giyt8xR3G3mCUvrBQuuCVoyskyh PFiOUgAL46B7X32A3auX7mlUbUM2aypVm35RkgzApmwCtklDt5jyChf+TU4N6gB2HncZ 4ql7iXQWYsFTk5cFaSVxexazW5Ip11m5SOxZhLtvyvQmLeqXzZJiR4W6LcirhuoLkj7P J3l2VxkizyFZ9kr3vLGPya4JP6T6A/vlhttLPIJZ4VtZvmJmYJkqwrFgM5Ox9oLLDagV QZnSJNRCtx35rxGpRY+JT5+haHoOdF1ENwz6QNjVZxJCGL9dtug92n1kWaG5nGpblRyh Lrmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=R3qsND6qw1VvsUQce7hv+phCgRmCzpMcgrhNizQrna0=; b=kTM3bOQ0mQ54ojBP+zoadHAyJBmRDwQ/Kp0kq01rIJA+G2F1fIDKOQ3NOoSW1DSv74 ZyUVmxzxkwpyD/sKSM9yNgQBXCSGCmC8ssb5HdQwo/xNefMFbJfBr0k6MKjDkkKOetdc +fqhXr0tq4xsJs+It6/nWL3dNNU/OhnGfreSRBZ3/f9hR0dGFAWNt+2UNlGouurk7sET v8j+myecfS0My9YKBhPHtcL6bP329Slz2B8x4y6r7j+AUHUiAWjyVeZI30N+W6wOEgXs jcdjcSTzP0Q8VkpTnADgcAS8wAuQdRKCMDeN+0TyevWvy1ga4672eIUiaINWSBRa9DLX OLUg== X-Gm-Message-State: AOAM533tlxHeX/afQ/g5vLBZmULZ4EJwZRVgIkhwGFjK7e5BgOrsAgmc Ep9sTyfBFGmd+PCRlYmBIIbI6A== X-Google-Smtp-Source: ABdhPJyoGxRmnOMCYs373AbHBua0tNj7qKslgb3yySG+2q8IB6WWjEsSG+t7P9kShVkRA2sii6EfXA== X-Received: by 2002:a05:600c:1e1f:b0:393:fca0:159c with SMTP id ay31-20020a05600c1e1f00b00393fca0159cmr4600556wmb.164.1651058911237; Wed, 27 Apr 2022 04:28:31 -0700 (PDT) Received: from localhost.localdomain ([2001:861:44c0:66c0:b735:88a0:c43a:20c8]) by smtp.gmail.com with ESMTPSA id u19-20020a05600c19d300b00393f081d49fsm1452622wmq.2.2022.04.27.04.28.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Apr 2022 04:28:30 -0700 (PDT) From: Neil Armstrong To: d-gerlach@ti.com, jh80.chung@samsung.com Cc: u-boot@lists.denx.de, khilman@baylibre.com, Neil Armstrong Subject: [PATCH 4/4] ARM: dts: k3-am642-sk-u-boot: add PMIC node Date: Wed, 27 Apr 2022 13:28:12 +0200 Message-Id: <20220427112812.2991816-5-narmstrong@baylibre.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220427112812.2991816-1-narmstrong@baylibre.com> References: <20220427112812.2991816-1-narmstrong@baylibre.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean The E4 revision of the AM64 SKEVM embeds a TPS65219 PMIC, this adds the PMIC node with the required regulators voltages. Signed-off-by: Neil Armstrong --- arch/arm/dts/k3-am642-sk-u-boot.dtsi | 61 ++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi index afe5baba8c..6504228136 100644 --- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi @@ -48,6 +48,67 @@ pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; clock-frequency = <400000>; + + tps65219: pmic@30 { + compatible = "ti,tps65219"; + reg = <0x30>; + + regulators { + buck1_reg: buck1 { + regulator-name = "VDD_CORE"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-boot-on; + regulator-always-on; + }; + + buck2_reg: buck2 { + regulator-name = "VCC1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + buck3_reg: buck3 { + regulator-name = "VDD_LPDDR4"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo1_reg: ldo1 { + regulator-name = "VDDSHV_SD_IO_PMIC"; + regulator-min-microvolt = <33000000>; + regulator-max-microvolt = <33000000>; + }; + + ldo2_reg: ldo2 { + regulator-name = "VDDAR_CORE"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo3_reg: ldo3 { + regulator-name = "VDDA_1V8"; + regulator-min-microvolt = <18000000>; + regulator-max-microvolt = <18000000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo4_reg: ldo4 { + regulator-name = "VDD_PHY_2V5"; + regulator-min-microvolt = <25000000>; + regulator-max-microvolt = <25000000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; }; &main_uart0 {