From patchwork Tue Apr 19 16:20:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Van Haaren, Harry" X-Patchwork-Id: 1619018 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=ed8ocRBc; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=openvswitch.org (client-ip=140.211.166.133; helo=smtp2.osuosl.org; envelope-from=ovs-dev-bounces@openvswitch.org; receiver=) Received: from smtp2.osuosl.org (smtp2.osuosl.org [140.211.166.133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KjTYl2Bnqz9sG2 for ; Wed, 20 Apr 2022 02:20:43 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by smtp2.osuosl.org (Postfix) with ESMTP id C88A240480; Tue, 19 Apr 2022 16:20:41 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from smtp2.osuosl.org ([127.0.0.1]) by localhost (smtp2.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7UclfXk6vUOl; Tue, 19 Apr 2022 16:20:41 +0000 (UTC) Received: from lists.linuxfoundation.org (lf-lists.osuosl.org [IPv6:2605:bc80:3010:104::8cd3:938]) by smtp2.osuosl.org (Postfix) with ESMTPS id E1502400AF; Tue, 19 Apr 2022 16:20:39 +0000 (UTC) Received: from lf-lists.osuosl.org (localhost [127.0.0.1]) by lists.linuxfoundation.org (Postfix) with ESMTP id 9D228C002F; Tue, 19 Apr 2022 16:20:39 +0000 (UTC) X-Original-To: ovs-dev@openvswitch.org Delivered-To: ovs-dev@lists.linuxfoundation.org Received: from smtp3.osuosl.org (smtp3.osuosl.org [140.211.166.136]) by lists.linuxfoundation.org (Postfix) with ESMTP id 483D4C002C for ; Tue, 19 Apr 2022 16:20:38 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp3.osuosl.org (Postfix) with ESMTP id 208B860A84 for ; Tue, 19 Apr 2022 16:20:38 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Authentication-Results: smtp3.osuosl.org (amavisd-new); dkim=pass (2048-bit key) header.d=intel.com Received: from smtp3.osuosl.org ([127.0.0.1]) by localhost (smtp3.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 6Wsn0bBxRSM4 for ; Tue, 19 Apr 2022 16:20:37 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.8.0 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by smtp3.osuosl.org (Postfix) with ESMTPS id 2806960774 for ; Tue, 19 Apr 2022 16:20:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1650385237; x=1681921237; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=eKhFU78jRZD18LThN5Xc4mkKChi1a1Oxg2h6SyqFg+Q=; b=ed8ocRBcAEgXCH2UvzrTHy1LDQW/8pefVsuX55KQ29KTfb1K/HWY/8WF s5msmFb5e4VJEFmlYsAabUsmmCbHLg+9fKVmpQsipfcUbTF+lkPhlKhlr JVYMDLAJkH9xPdYumT8kl/qZp2QxVtvbR9Av+1Mbsb9cZMi08LI9DUKlm B3ItRBjB/WUPgrunuHKIdptVAHIHUdP/eaMpiIVX9q2PlYGC87Sh7VCrg oVDU7D1vM9trhuaBrxwu6CsFBiju9Zr+3ZotMmBw6QPObpMgIeGZGiwto 0NUWNLv7IW8rAHTDyTGaiNwEMuXEUK7KIxIHQs3Ce3coafUsEkCXeBd+E Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10322"; a="350255967" X-IronPort-AV: E=Sophos;i="5.90,273,1643702400"; d="scan'208";a="350255967" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2022 09:20:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,273,1643702400"; d="scan'208";a="530444566" Received: from silpixa00401120.ir.intel.com ([10.55.128.255]) by orsmga002.jf.intel.com with ESMTP; 19 Apr 2022 09:20:35 -0700 From: Harry van Haaren To: ovs-dev@openvswitch.org Date: Tue, 19 Apr 2022 16:20:31 +0000 Message-Id: <20220419162031.1463302-1-harry.van.haaren@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Cc: i.maximets@ovn.org Subject: [ovs-dev] [PATCH] dpif-netdev-avx512: fix ubsan shift error in bitmasks X-BeenThere: ovs-dev@openvswitch.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: ovs-dev-bounces@openvswitch.org Sender: "dev" The code changes here are to handle (1 << i) shifts where 'i' is the packet index in the batch, and 1 << 31 is an overflow of the signed '1'. Fixed by adding ULL suffix to the 1 character, ensuring compiler knows the 1 is unsigned (and 32-bits minimum). Undefined Behaviour sanitizer is now happy with the shifts at runtime. Suggested-by: Ilya Maximets Signed-off-by: Harry van Haaren --- Thanks Ilya for the detail in the email - reworked as commit message; https://mail.openvswitch.org/pipermail/ovs-dev/2022-April/393270.html --- lib/dpif-netdev-avx512.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/lib/dpif-netdev-avx512.c b/lib/dpif-netdev-avx512.c index b7131ba3f..fdefee230 100644 --- a/lib/dpif-netdev-avx512.c +++ b/lib/dpif-netdev-avx512.c @@ -183,7 +183,7 @@ dp_netdev_input_outer_avx512(struct dp_netdev_pmd_thread *pmd, * classifed by vector mfex else do a scalar miniflow extract * for that packet. */ - bool mfex_hit = !!(mf_mask & (1 << i)); + bool mfex_hit = !!(mf_mask & (1ULL << i)); /* Check for a partial hardware offload match. */ if (hwol_enabled) { @@ -204,7 +204,7 @@ dp_netdev_input_outer_avx512(struct dp_netdev_pmd_thread *pmd, pkt_meta[i].bytes = dp_packet_size(packet); phwol_hits++; - hwol_emc_smc_hitmask |= (1 << i); + hwol_emc_smc_hitmask |= (1ULL << i); continue; } } @@ -227,7 +227,7 @@ dp_netdev_input_outer_avx512(struct dp_netdev_pmd_thread *pmd, if (f) { rules[i] = &f->cr; emc_hits++; - hwol_emc_smc_hitmask |= (1 << i); + hwol_emc_smc_hitmask |= (1ULL << i); continue; } } @@ -237,7 +237,7 @@ dp_netdev_input_outer_avx512(struct dp_netdev_pmd_thread *pmd, if (f) { rules[i] = &f->cr; smc_hits++; - smc_hitmask |= (1 << i); + smc_hitmask |= (1ULL << i); continue; } }