From patchwork Fri Apr 1 12:11:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xi Ruoyao X-Patchwork-Id: 1612192 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=kLCMtOyg; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KVJvT1Ppkz9sV6 for ; Fri, 1 Apr 2022 23:12:19 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 29843394740B for ; Fri, 1 Apr 2022 12:12:17 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 29843394740B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1648815137; bh=w2h59qweeoNaknoS2/YSzKpSnXfCJ9Sds0mGB4WbMaU=; h=Subject:To:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=kLCMtOygy9Neix7UTZG0cqA6JUmuM9t42Iligu6pDeurfkc8K4Zja7qpgBq5edieq SH7g/JecE3aM7bBIC4NfOzZoc7mlMslHwrR8n7iNdF05xa1ACYpctUKWQ70+w6bCQY MPZImSN+6K8tftzkUfJ0/wU7wbDWlE17dDpgaOW4= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mengyan1223.wang (mengyan1223.wang [89.208.246.23]) by sourceware.org (Postfix) with ESMTPS id 552703858D28; Fri, 1 Apr 2022 12:11:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 552703858D28 Received: from [IPv6:240e:358:11c6:7500:f76e:267c:b511:b6a3] (unknown [IPv6:240e:358:11c6:7500:f76e:267c:b511:b6a3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@mengyan1223.wang) by mengyan1223.wang (Postfix) with ESMTPSA id 7A83365BD9; Fri, 1 Apr 2022 08:11:50 -0400 (EDT) Message-ID: Subject: [PATCH v2] Ignore zero width fields in arguments and issue -Wpsabi warning about C zero-width field ABI changes [PR102024] To: Jakub Jelinek Date: Fri, 01 Apr 2022 20:11:43 +0800 In-Reply-To: References: User-Agent: Evolution 3.44.0 MIME-Version: 1.0 X-Spam-Status: No, score=-3039.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, JMQ_SPF_NEUTRAL, KAM_SHORT, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Xi Ruoyao via Gcc-patches From: Xi Ruoyao Reply-To: Xi Ruoyao Cc: Richard Sandiford , gcc-patches@gcc.gnu.org, Jakub Jelinek , YunQiang Su Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" v1 -> v2: * "int has_zero_width_bf_abi_change" -> "bool zero_width_field_abi_change". "int" -> "bool" because it's only 0/1, "bf" -> "field" because the change also affects zero-length arrays and empty structs/unions, etc. * Add tests with zero-length array and empty struct. * Coding style fix. * "#zero_width_bitfields" -> "#mips_zero_width_fields" because this is not the exactly same change documented by #zero_width_bitfields. I'll send a wwwdoc patch after this is approved. gcc/ PR target/102024 * mips.cc (mips_function_arg): Ignore zero-width fields, and inform if it causes a psABI change. gcc/testsuite/ PR target/102024 * gcc.target/mips/pr102024-1.c: New test. * gcc.target/mips/pr102024-2.c: New test. * gcc.target/mips/pr102024-3.c: New test. --- gcc/config/mips/mips.cc | 46 ++++++++++++++++++++-- gcc/testsuite/gcc.target/mips/pr102024-1.c | 20 ++++++++++ gcc/testsuite/gcc.target/mips/pr102024-2.c | 20 ++++++++++ gcc/testsuite/gcc.target/mips/pr102024-3.c | 20 ++++++++++ 4 files changed, 102 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.target/mips/pr102024-1.c create mode 100644 gcc/testsuite/gcc.target/mips/pr102024-2.c create mode 100644 gcc/testsuite/gcc.target/mips/pr102024-3.c diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc index 83860b5d4b7..7681983186c 100644 --- a/gcc/config/mips/mips.cc +++ b/gcc/config/mips/mips.cc @@ -6042,11 +6042,27 @@ mips_function_arg (cumulative_args_t cum_v, const function_arg_info &arg) for (i = 0; i < info.reg_words; i++) { rtx reg; + bool zero_width_field_abi_change = false; for (; field; field = DECL_CHAIN (field)) - if (TREE_CODE (field) == FIELD_DECL - && int_bit_position (field) >= bitpos) - break; + { + if (TREE_CODE (field) != FIELD_DECL) + continue; + + /* Ignore zero-width fields. And, if the ignored + field is not a C++ zero-width bit-field, it may be + an ABI change. */ + if (DECL_FIELD_CXX_ZERO_WIDTH_BIT_FIELD (field)) + continue; + if (integer_zerop (DECL_SIZE (field))) + { + zero_width_field_abi_change = true; + continue; + } + + if (int_bit_position (field) >= bitpos) + break; + } if (field && int_bit_position (field) == bitpos @@ -6054,7 +6070,29 @@ mips_function_arg (cumulative_args_t cum_v, const function_arg_info &arg) && TYPE_PRECISION (TREE_TYPE (field)) == BITS_PER_WORD) reg = gen_rtx_REG (DFmode, FP_ARG_FIRST + info.reg_offset + i); else - reg = gen_rtx_REG (DImode, GP_ARG_FIRST + info.reg_offset + i); + { + reg = gen_rtx_REG (DImode, + GP_ARG_FIRST + info.reg_offset + i); + zero_width_field_abi_change = false; + } + + if (zero_width_field_abi_change && warn_psabi) + { + static unsigned last_reported_type_uid; + unsigned uid = TYPE_UID (TYPE_MAIN_VARIANT (arg.type)); + if (uid != last_reported_type_uid) + { + static const char *url + = CHANGES_ROOT_URL + "gcc-12/changes.html#mips_zero_width_fields"; + inform (input_location, + "the ABI for passing a value containing " + "zero-width fields before an adjacent " + "64-bit floating-point field was changed " + "in GCC %{12.1%}", url); + last_reported_type_uid = uid; + } + } XVECEXP (ret, 0, i) = gen_rtx_EXPR_LIST (VOIDmode, reg, diff --git a/gcc/testsuite/gcc.target/mips/pr102024-1.c b/gcc/testsuite/gcc.target/mips/pr102024-1.c new file mode 100644 index 00000000000..cf442863fc2 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/pr102024-1.c @@ -0,0 +1,20 @@ +// PR target/102024 +// { dg-do compile } +// { dg-options "-mabi=64 -mhard-float" } +// { dg-final { scan-assembler "\\\$f12" } } + +struct foo +{ + int : 0; + double a; +}; + +extern void func(struct foo); + +void +pass_foo(void) +{ + struct foo test; + test.a = 114; + func(test); // { dg-message "the ABI for passing a value containing zero-width fields before an adjacent 64-bit floating-point field was changed in GCC 12.1" } +} diff --git a/gcc/testsuite/gcc.target/mips/pr102024-2.c b/gcc/testsuite/gcc.target/mips/pr102024-2.c new file mode 100644 index 00000000000..89b26f86038 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/pr102024-2.c @@ -0,0 +1,20 @@ +// PR target/102024 +// { dg-do compile } +// { dg-options "-mabi=64 -mhard-float" } +// { dg-final { scan-assembler "\\\$f12" } } + +struct foo +{ + char empty[0]; + double a; +}; + +extern void func(struct foo); + +void +pass_foo(void) +{ + struct foo test; + test.a = 114; + func(test); // { dg-message "the ABI for passing a value containing zero-width fields before an adjacent 64-bit floating-point field was changed in GCC 12.1" } +} diff --git a/gcc/testsuite/gcc.target/mips/pr102024-3.c b/gcc/testsuite/gcc.target/mips/pr102024-3.c new file mode 100644 index 00000000000..477f07055a1 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/pr102024-3.c @@ -0,0 +1,20 @@ +// PR target/102024 +// { dg-do compile } +// { dg-options "-mabi=64 -mhard-float" } +// { dg-final { scan-assembler "\\\$f12" } } + +struct foo +{ + struct {} empty; + double a; +}; + +extern void func(struct foo); + +void +pass_foo(void) +{ + struct foo test; + test.a = 114; + func(test); // { dg-message "the ABI for passing a value containing zero-width fields before an adjacent 64-bit floating-point field was changed in GCC 12.1" } +}