From patchwork Mon Mar 21 21:27:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Qing Zhao X-Patchwork-Id: 1607938 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=lVmwAwhX; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KMnmc0nSqz9s3q for ; Tue, 22 Mar 2022 08:28:48 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 04379389A130 for ; Mon, 21 Mar 2022 21:28:46 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 04379389A130 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1647898126; bh=y/GcXn2XKB9OVAKAfrV8cWxjaPXzei9JqaRPkZUr374=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=lVmwAwhX98pmnV2AJYuBl3iDS1hygczrKGJoR+4TBmILH7u9eMPh6XNWE5Qk+Dgqy JFcVrBzKuZn6MU//Gwhnx4r5g5ywAyP30hLdRxTtja2hl5H8mBmnlXN0i6praujOtw K2iBy/RrXjAWUaXIk6x05b0U5yVKKetFtB7BL5mM= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0b-00069f02.pphosted.com (mx0b-00069f02.pphosted.com [205.220.177.32]) by sourceware.org (Postfix) with ESMTPS id 324193857404 for ; Mon, 21 Mar 2022 21:28:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 324193857404 Received: from pps.filterd (m0246631.ppops.net [127.0.0.1]) by mx0b-00069f02.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 22LJY53Y000408; Mon, 21 Mar 2022 21:27:58 GMT Received: from aserp3030.oracle.com ([141.146.126.71]) by mx0b-00069f02.pphosted.com with ESMTP id 3ew5y1vmrg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 21 Mar 2022 21:27:57 +0000 Received: from pps.filterd (aserp3030.oracle.com [127.0.0.1]) by aserp3030.oracle.com (8.16.1.2/8.16.1.2) with SMTP id 22LLHlXW138047; Mon, 21 Mar 2022 21:27:56 GMT Received: from nam10-bn7-obe.outbound.protection.outlook.com (mail-bn7nam10lp2100.outbound.protection.outlook.com [104.47.70.100]) by aserp3030.oracle.com with ESMTP id 3ew578tgfm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 21 Mar 2022 21:27:56 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=BY/O1qvkLk/IakorO1ZxLBTT4TfZATOul3IaHd5LiMUbkOi/ASf4Xv+PIjf4iBIPqcHLEFhN/3Lhe6zMqLHamE3fqPzUZGYA/jP/iROERjSwjLPiRoNJ51zyWD3l5wXygJCCriflFNkxMPE8sah+9GNTyTS9ITm/mQwbd/fdmWaE1Piq2M9+c8sD0ybroALVhZiVYZ8zqRTfGV2x+Os+5wdx6rrGAF+eS/Z1TwFpk75LXXjAIKy8aCn5PFkR3dXYEN9aRXDyWSVI6d003zoQ+DPEKrVMSZq9CC6AzgeJuMT3riD5uOUQkIH4C6vqeX70zhGDmsLT8wsDwcCGyBpFTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=y/GcXn2XKB9OVAKAfrV8cWxjaPXzei9JqaRPkZUr374=; b=ePsIKFxIjip1q8utKg7FMoiud1VkYCd5syuni0kiI1g/dQK3AZnWGXh2zOvrrFUZH3nZGShjKBkrIzdLrbFBDrsC3Z82OJaDRt68DYEFo/vGBntCportlQOdVEQlpHuisIIC/lKK0IP/3ZLd6Rby5LyT6msnU76XW5z/j7S+kZxk6eNEjfmU610D6mRaEvzKhq5ShVqbCaR4msQOStTKwTZBncqNonVrGdJRXOI1/STE9XN0BBTXJ7NIEbcfc5rfD9HSgS27TsURfiY+gFsmwrdREJ3oo+rrp//CZLIpkMwSF9GzU9kGvi7pZFLeITUvRvWMbc6Wre5/yH7n06eAQw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oracle.com; dmarc=pass action=none header.from=oracle.com; dkim=pass header.d=oracle.com; arc=none Received: from CH2PR10MB4344.namprd10.prod.outlook.com (2603:10b6:610:af::19) by MWHPR10MB1645.namprd10.prod.outlook.com (2603:10b6:301:a::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5081.18; Mon, 21 Mar 2022 21:27:54 +0000 Received: from CH2PR10MB4344.namprd10.prod.outlook.com ([fe80::a8c6:8b2:c197:7489]) by CH2PR10MB4344.namprd10.prod.outlook.com ([fe80::a8c6:8b2:c197:7489%6]) with mapi id 15.20.5081.023; Mon, 21 Mar 2022 21:27:54 +0000 To: richard Sandiford Subject: [patch]update the documentation for TARGET_ZERO_CALL_USED_REGS hook and add an assertion Thread-Topic: [patch]update the documentation for TARGET_ZERO_CALL_USED_REGS hook and add an assertion Thread-Index: AQHYPWqGtMB3P1AoD0C5EV0ExAep5Q== Date: Mon, 21 Mar 2022 21:27:54 +0000 Message-ID: <01D26A82-EED3-48AA-BF56-F6300AC2C7CC@oracle.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: Apple Mail (2.3608.120.23.2.7) x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 3a222a8c-37e5-4049-9532-08da0b81a90f x-ms-traffictypediagnostic: MWHPR10MB1645:EE_ x-microsoft-antispam-prvs: x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: EbOwSzvyhkWGe+J/V5QDwNgQ4Nm9dmgROmQFqqPvaS8G+YL9aOD/VK1lnGVhFdepKe15SSe4EnSNSUPprnOfkR6moZWHI/hwuU/ja2RGSn2GfU+4Sm/YqSu39s0MyMWmtX1nKOwFBhqzpjTjutHhEVfu+0ffXtOFmbd2nhjQYJDISb9VF8M5jSGOOmeJ/+CklFDWbHuIH8P6YuQJz1L/Na1AF/CCN2LO8FaKh00B8egpZSzByeJoULqC7oesLy0E4xl+chuYjXPnVl/OvjVTdFf8yFmLMKNEfuc6RZmcy+bjvYSV/fyygqbpLz9zxHM65C3ug7PN3MCrdHFMfzxtDg7MU4yv9U15IVpdITwdK/EU86LWQpk0SSRtaSbrUvLPXwzbLUHJAPVaK+pu3jfqBROSru3dXUK8hux6Z6Lkpndyahmr4nxiW6XjnC7lSbBdkhdl5ixJtKfOc4DX34NQCqw4p7PiUfO8fK5DViYCGD/+c5lok0FI058fHyiqjPaCK5NtVS0aWTdzl9oOQErDz7saQh7EyTY+NW81yvKs7S5UUREPcMxf+zm57NS5A892qHzswkzwtX8m22InV2gmnG97gBNi/qAz43V0o/HslCHd9WUq1JB3n1jeSEJSpJbdL0SxncLgYcBl0khPonOjJtI3kif2zv7GLgMLz4XMUxeohNxnNm4Q/oJtix16/zWVR0BXzM5PRaEtYDMtL++/YgRCNpDxfLuEumYUBC1gpoP7YXaayMcwBFvGruwcmOwJdI7g1EYzNlk+DpHCkdsniZiIY3tUL1U0W2k853f/cEsEBkJCp5ZvPaWp8J6sIkRQ3q0NVU1ajJpUgVomSuGxlQ== x-forefront-antispam-report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:CH2PR10MB4344.namprd10.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230001)(366004)(86362001)(316002)(54906003)(66946007)(2616005)(6916009)(186003)(76116006)(66476007)(66446008)(66556008)(64756008)(4326008)(8676002)(15650500001)(38100700002)(122000001)(91956017)(2906002)(38070700005)(83380400001)(36756003)(966005)(71200400001)(6486002)(44832011)(6506007)(508600001)(53546011)(33656002)(8936002)(6512007)(5660300002)(45980500001); DIR:OUT; SFP:1101; x-ms-exchange-antispam-messagedata-chunkcount: 1 x-ms-exchange-antispam-messagedata-0: =?utf-8?q?XKw5D+PNoIw2ng/uvTr9AIUVYlWB?= =?utf-8?q?Bdh2I3SMD1IcJuoCcDdglirGc8wI0XCdLSvrrZn1xrKV6tm9yIwLmUTQFvgT8YdlY?= =?utf-8?q?P4v4ctDBbsTb+x55bEPioO4wNHTKc4QoLZ3Tgou1Bwx5Bk4oieZHv1EHBwbtDEBk4?= =?utf-8?q?bxfIFO6M45Cmf4G7TDKT/HOZZvVnvcnaWVadG3PCC9EEPQtlzquCw34LnG6S3pxl2?= =?utf-8?q?UlRwLsrhNSSg3q1j1gbtzIq4zQYF+YGtDFryPpcK1uZMmXJ141lqdR/IHhK8X/r+c?= =?utf-8?q?qDqjMgnW9wQrYtFQGfnbkMa56ts91phoWaFtDSrXWaiW0zvPaX6ArNcwpZGsOBPJB?= =?utf-8?q?hMx6WeEkTh+s9w9/MW7HJKCgzCvKOoUm5DzWqB8OtFxYxSlqNKM6RLqf8OAMWlxbZ?= =?utf-8?q?DxtTbiW2TqvjgtgTo5rAd7BZAXf+sd1L7gQmUbvv2xa7r1xH4KQT5GxWA/c6NQDiS?= =?utf-8?q?vDPhK68Rp9Nus+Z2DnyOMzeDzP0zzDgO5M2W5I/YdpwBXmqhhsuVjXsGsuqIGbHr6?= =?utf-8?q?LUrOEg5ds2SfMYoWxERwMR6MNjscVTipDNV2nKyuoc3d7lX37DycJ6Nz1UmVdV5mn?= =?utf-8?q?7JiTPEuPfDE7+8pxscvNj788JDA3WEjNWy5IJDOMQk61ncqYl+F4Qqw7rYKktPK/H?= =?utf-8?q?IKFs4KSUD+zKKsM5gwy30h5cw90hJLqa4juoJ8gVSVKCZUST35eHUCebnAjDDuuNd?= =?utf-8?q?yBlQWf3JvtI/IbjItj+Papbfc4vQKlMJk4Z3pbCvpsANWdvP2F5P0cjMaoADqvu8K?= =?utf-8?q?eCqbXacUwJVfHLBXA4E9JvQ96tFki/xVozae2TwEkfZudiFqCTTgLa39QJrh8vorG?= =?utf-8?q?/Bq60uIVqxt6HK2EoMinsOdx5WHfQS0tnfWdKhujJMSxpiPn4Y1fwVa//sBxlGoHR?= =?utf-8?q?wlS48IttTp7FsnA+ygthXVCPxjs3aJEOjJb5xBDMh/Oax8fJO4aI3iAWv1cACbevV?= =?utf-8?q?IYbN3njYXQMFXMUO8KixEQHWRxyOm1Z4ohw/OhDURkVknm6twXbbpAR6nvwCnZB3q?= =?utf-8?q?HQ6ZNXPBx+Ec8nvlQES3ZdgxgX6Y7u04bIBgEhhzyInSFKIGk1eQ0NsL9CTW47Nf6?= =?utf-8?q?GKpJYsbhm9D/O+Rx24y0tCghDh7/TE3jnY/iFNDLzquHcPTyLNGBug7RO3UI94ZnI?= =?utf-8?q?/nDfrNL33WDlTOnZnR8To1KtRNptwlFY/biM6vj6POrGjjkUgeqln8ZcgRVAvqltS?= =?utf-8?q?tuUkT6XMrV8LCcivvwblPb8IyREqdCNtgnAG3YrIUU3xabFMfbY+Hjx3yYQDGhk9B?= =?utf-8?q?DW00CaH829JTOyVu9Y/9RlEESBCpLkMke60kBWXNcmgyR/S0vqfItBVt9NzcqJf5X?= =?utf-8?q?Qdd9ETA5yo6ALBl88uCij8qsNbvabkNnjq40EJb/4tMRbsxZFB8tThdWDt/n/AusD?= =?utf-8?q?JR8za30ksHpi9SBm0DdLP3WwwN9oMyBw0jS8uUfjSFY9khlQ9CVA+VITo=3D?= Content-ID: MIME-Version: 1.0 X-OriginatorOrg: oracle.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CH2PR10MB4344.namprd10.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3a222a8c-37e5-4049-9532-08da0b81a90f X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Mar 2022 21:27:54.0310 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 4e2c6054-71cb-48f1-bd6c-3a9705aca71b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 8bRNIiohkHD/y2whJSUglQsaCS15nkzguRJbGlhKz5vcZrk0Z0hgjLlfp+vHWv3StiA5disQF9yKiKsP7MNLdQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR10MB1645 X-Proofpoint-Virus-Version: vendor=nai engine=6300 definitions=10293 signatures=694221 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 adultscore=0 suspectscore=0 spamscore=0 mlxlogscore=999 phishscore=0 bulkscore=0 malwarescore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2203210136 X-Proofpoint-GUID: oJj6-zOAGHs2AhTI7pLjZBLtf2tWRKq9 X-Proofpoint-ORIG-GUID: oJj6-zOAGHs2AhTI7pLjZBLtf2tWRKq9 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Qing Zhao via Gcc-patches From: Qing Zhao Reply-To: Qing Zhao Cc: gcc-patches Paul A Clarke via Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi, Per our discussion on: https://gcc.gnu.org/pipermail/gcc-patches/2022-March/592002.html I come up with the following patch to: 1. Update the documentation for TARGET_ZERO_CALL_USED_REGS hook; 2. Add an assertion in function.cc to make sure the actually zeroed_regs is a subset of all call used regs; (The reason I didn’t add a new parameter to TARGET_ZERO_CALL_USED_REGS is, I think adding the assertion in the common place function.cc is simpler to be implemented). 3. This new assertion identified a bug in i386 implementation. Fix this bug in i386. This patch is bootstrapped on both x86 and aarch64, no regression. Okay for commit? thanks. Qing =================================== From 2e5bc1b25a707c6a17afbf03da2a8bec5b03454d Mon Sep 17 00:00:00 2001 From: Qing Zhao Date: Fri, 18 Mar 2022 20:49:56 +0000 Subject: [PATCH] Add an assertion: the zeroed_hardregs set is a subset of all call used regs. We should make sure that the hard register set that is actually cleared by the target hook zero_call_used_regs should be a subset of all call used registers. At the same time, update documentation for the target hook TARGET_ZERO_CALL_USED_REGS. This new assertion identified a bug in the i386 implemenation, which incorrectly set the zeroed_hardregs for stack registers. Fixed this bug in i386 implementation. gcc/ChangeLog: 2022-03-21 Qing Zhao * config/i386/i386.cc (zero_all_st_registers): Return the value of num_of_st. (ix86_zero_call_used_regs): Update zeroed_hardregs set according to the return value of zero_all_st_registers. * doc/tm.texi: Update the documentation of TARGET_ZERO_CALL_USED_REGS. * function.cc (gen_call_used_regs_seq): Add an assertion. * target.def: Update the documentation of TARGET_ZERO_CALL_USED_REGS. --- gcc/config/i386/i386.cc | 27 ++++++++++++++++++--------- gcc/doc/tm.texi | 7 +++++++ gcc/function.cc | 22 ++++++++++++++++++---- gcc/target.def | 7 +++++++ 4 files changed, 50 insertions(+), 13 deletions(-) diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index 5a561966eb44..d84047a4bc1b 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -3753,16 +3753,17 @@ zero_all_vector_registers (HARD_REG_SET need_zeroed_hardregs) needs to be cleared, the whole stack should be cleared. However, x87 stack registers that hold the return value should be excluded. x87 returns in the top (two for complex values) register, so - num_of_st should be 7/6 when x87 returns, otherwise it will be 8. */ + num_of_st should be 7/6 when x87 returns, otherwise it will be 8. + return the value of num_of_st. */ -static bool +static int zero_all_st_registers (HARD_REG_SET need_zeroed_hardregs) { /* If the FPU is disabled, no need to zero all st registers. */ if (! (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387)) - return false; + return 0; unsigned int num_of_st = 0; for (unsigned int regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) @@ -3774,7 +3775,7 @@ zero_all_st_registers (HARD_REG_SET need_zeroed_hardregs) } if (num_of_st == 0) - return false; + return 0; bool return_with_x87 = false; return_with_x87 = (crtl->return_rtx @@ -3802,7 +3803,7 @@ zero_all_st_registers (HARD_REG_SET need_zeroed_hardregs) insn = emit_insn (gen_rtx_SET (st_reg, st_reg)); add_reg_note (insn, REG_DEAD, st_reg); } - return true; + return num_of_st; } @@ -3851,7 +3852,7 @@ ix86_zero_call_used_regs (HARD_REG_SET need_zeroed_hardregs) { HARD_REG_SET zeroed_hardregs; bool all_sse_zeroed = false; - bool all_st_zeroed = false; + int all_st_zeroed_num = 0; bool all_mm_zeroed = false; CLEAR_HARD_REG_SET (zeroed_hardregs); @@ -3881,9 +3882,17 @@ ix86_zero_call_used_regs (HARD_REG_SET need_zeroed_hardregs) if (!exit_with_mmx_mode) /* x87 exit mode, we should zero all st registers together. */ { - all_st_zeroed = zero_all_st_registers (need_zeroed_hardregs); - if (all_st_zeroed) - SET_HARD_REG_BIT (zeroed_hardregs, FIRST_STACK_REG); + all_st_zeroed_num = zero_all_st_registers (need_zeroed_hardregs); + + if (all_st_zeroed_num > 0) + for (unsigned int regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++) + /* x87 stack registers that hold the return value should be excluded. + x87 returns in the top (two for complex values) register. */ + if (all_st_zeroed_num == 8 + || !((all_st_zeroed_num >= 6 && regno == REGNO (crtl->return_rtx)) + || (all_st_zeroed_num == 6 + && (regno == (REGNO (crtl->return_rtx) + 1))))) + SET_HARD_REG_BIT (zeroed_hardregs, regno); } else /* MMX exit mode, check whether we can zero all mm registers. */ diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index 2f92d37da8c0..c5006afc00d2 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -12330,6 +12330,13 @@ This target hook emits instructions to zero the subset of @var{selected_regs} that could conceivably contain values that are useful to an attacker. Return the set of registers that were actually cleared. +For most targets, the returned set of registers is a subset of +@var{selected_regs}, however, for some of the targets (for example MIPS), +clearing some registers that are in the @var{selected_regs} requires +clearing other call used registers that are not in the @var{selected_regs}, +under such situation, the returned set of registers must be a subset of all +call used registers. + The default implementation uses normal move instructions to zero all the registers in @var{selected_regs}. Define this hook if the target has more efficient ways of zeroing certain registers, diff --git a/gcc/function.cc b/gcc/function.cc index d5ed51a6a663..ad0096a43eff 100644 --- a/gcc/function.cc +++ b/gcc/function.cc @@ -5892,7 +5892,9 @@ gen_call_used_regs_seq (rtx_insn *ret, unsigned int zero_regs_type) df_simulate_one_insn_backwards (bb, ret, live_out); HARD_REG_SET selected_hardregs; + HARD_REG_SET all_call_used_regs; CLEAR_HARD_REG_SET (selected_hardregs); + CLEAR_HARD_REG_SET (all_call_used_regs); for (unsigned int regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) { if (!crtl->abi->clobbers_full_reg_p (regno)) @@ -5901,6 +5903,13 @@ gen_call_used_regs_seq (rtx_insn *ret, unsigned int zero_regs_type) continue; if (REGNO_REG_SET_P (live_out, regno)) continue; +#ifdef LEAF_REG_REMAP + if (crtl->uses_only_leaf_regs && LEAF_REG_REMAP (regno) < 0) + continue; +#endif + /* This is a call used register that is dead at return. */ + SET_HARD_REG_BIT (all_call_used_regs, regno); + if (only_gpr && !TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], regno)) continue; @@ -5908,10 +5917,6 @@ gen_call_used_regs_seq (rtx_insn *ret, unsigned int zero_regs_type) continue; if (only_arg && !FUNCTION_ARG_REGNO_P (regno)) continue; -#ifdef LEAF_REG_REMAP - if (crtl->uses_only_leaf_regs && LEAF_REG_REMAP (regno) < 0) - continue; -#endif /* Now this is a register that we might want to zero. */ SET_HARD_REG_BIT (selected_hardregs, regno); @@ -5925,6 +5930,15 @@ gen_call_used_regs_seq (rtx_insn *ret, unsigned int zero_regs_type) HARD_REG_SET zeroed_hardregs; start_sequence (); zeroed_hardregs = targetm.calls.zero_call_used_regs (selected_hardregs); + + /* For most targets, the returned set of registers is a subset of + selected_hardregs, however, for some of the targets (for example MIPS), + clearing some registers that are in selected_hardregs requires clearing + other call used registers that are not in the selected_hardregs, under + such situation, the returned set of registers must be a subset of + all call used registers. */ + gcc_assert (hard_reg_set_subset_p (zeroed_hardregs, all_call_used_regs)); + rtx_insn *seq = get_insns (); end_sequence (); if (seq) diff --git a/gcc/target.def b/gcc/target.def index 72c2e1ef756c..d85adf36a391 100644 --- a/gcc/target.def +++ b/gcc/target.def @@ -5122,6 +5122,13 @@ DEFHOOK that could conceivably contain values that are useful to an attacker.\n\ Return the set of registers that were actually cleared.\n\ \n\ +For most targets, the returned set of registers is a subset of\n\ +@var{selected_regs}, however, for some of the targets (for example MIPS),\n\ +clearing some registers that are in the @var{selected_regs} requires\n\ +clearing other call used registers that are not in the @var{selected_regs},\n\ +under such situation, the returned set of registers must be a subset of all\n\ +call used registers.\n\ +\n\ The default implementation uses normal move instructions to zero\n\ all the registers in @var{selected_regs}. Define this hook if the\n\ target has more efficient ways of zeroing certain registers,\n\