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Wed, 16 Mar 2022 07:51:57 -0700 (PDT) Received: from [10.1.38.140] (E121495.Arm.com [10.1.38.140]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7ED023F7D7; Wed, 16 Mar 2022 07:51:57 -0700 (PDT) Message-ID: <2c189f25-f37d-9ff1-130a-93a00f1c1cd0@arm.com> Date: Wed, 16 Mar 2022 14:51:51 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.2 Content-Language: en-US To: "gcc-patches@gcc.gnu.org" Subject: [aarch64] Update regmove costs for neoverse-v1 and neoverse-512tvb tunings X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, BODY_8BITS, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "Andre Vieira \(lists\) via Gcc-patches" From: "Andre Vieira (lists)" Reply-To: "Andre Vieira \(lists\)" Cc: Richard Sandiford Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi, This patch updates the register move tunings for -mcpu/-mtune={neoverse-v1,neoverse-512tvb}. 2022-03-16  Tamar Christina                         Andre Vieira         * config/aarch64/aarch64.cc (neoversev1_regmove_cost): New tuning struct.         (neoversev1_tunings): Use neoversev1_regmove_cost and update store_int cost.         (neoverse512tvb_tunings): Likewise. diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index 9b6f67dc592d8a447d6b28390c90abe5dcfa5f08..f0485574528c47221e17a3aa5aee70a56508f61e 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -670,6 +670,16 @@ static const struct cpu_regmove_cost neoversen2_regmove_cost = 2 /* FP2FP */ }; +static const struct cpu_regmove_cost neoversev1_regmove_cost = +{ + 1, /* GP2GP */ + /* Spilling to int<->fp instead of memory is recommended so set + realistic costs compared to memmv_cost. */ + 3, /* GP2FP */ + 2, /* FP2GP */ + 2 /* FP2FP */ +}; + static const struct cpu_regmove_cost demeter_regmove_cost = { 1, /* GP2GP */ @@ -2063,13 +2073,13 @@ static const struct tune_params neoversev1_tunings = { &cortexa76_extra_costs, &neoversev1_addrcost_table, - &generic_regmove_cost, + &neoversev1_regmove_cost, &neoversev1_vector_cost, &generic_branch_cost, &generic_approx_modes, SVE_256, /* sve_width */ { 4, /* load_int. */ - 1, /* store_int. */ + 2, /* store_int. */ 6, /* load_fp. */ 2, /* store_fp. */ 6, /* load_pred. */ @@ -2200,13 +2210,13 @@ static const struct tune_params neoverse512tvb_tunings = { &cortexa76_extra_costs, &neoversev1_addrcost_table, - &generic_regmove_cost, + &neoversev1_regmove_cost, &neoverse512tvb_vector_cost, &generic_branch_cost, &generic_approx_modes, SVE_128 | SVE_256, /* sve_width */ { 4, /* load_int. */ - 1, /* store_int. */ + 2, /* store_int. */ 6, /* load_fp. */ 2, /* store_fp. */ 6, /* load_pred. */