From patchwork Tue Mar 8 15:19:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Andre Vieira (lists)" X-Patchwork-Id: 1603065 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=o/CtN3oT; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCfCT3fmRz9sG2 for ; Wed, 9 Mar 2022 02:20:20 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 53AF1385B829 for ; Tue, 8 Mar 2022 15:20:18 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 53AF1385B829 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1646752818; bh=VbypygU+O4i5UM6ePVBtkqUdRAoOMa8BeNGNItrGqtQ=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=o/CtN3oTMrZYkOQjXqmQr8MUBkRgvDmaLHGdn8Di46Yw413m0ZptfdC9CwrdBGnvP 7DQwG8YoR17xg9oI817S3i83byb7zBcTRq4qkzZTZkVFx3vXB1+rnYJtXkhRh35941 Pfg+tCvYbn8PYIB2UfuQnUKElNzYrWU3hV8eAwt4= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 0B7CD3858C83 for ; Tue, 8 Mar 2022 15:19:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0B7CD3858C83 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AD8BC139F; Tue, 8 Mar 2022 07:19:37 -0800 (PST) Received: from [10.57.21.215] (unknown [10.57.21.215]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 22AC63F793; Tue, 8 Mar 2022 07:19:37 -0800 (PST) Message-ID: <9196175c-df7d-8cf1-b95e-8722d98737b1@arm.com> Date: Tue, 8 Mar 2022 15:19:41 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Content-Language: en-US To: "gcc-patches@gcc.gnu.org" Subject: [aarch64] Enable FP16 feature by default for Armv9 X-Spam-Status: No, score=-11.3 required=5.0 tests=BAYES_00, BODY_8BITS, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_NUMSUBJECT, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "Andre Vieira \(lists\) via Gcc-patches" From: "Andre Vieira (lists)" Reply-To: "Andre Vieira \(lists\)" Cc: Richard Sandiford Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi all, This patch adds the feature bit for FP16 to the feature set for Armv9 since Armv9 requires SVE to be implemented and SVE requires FP16 to be implemented. 2022-03-04  Andre Vieira          * config/aarch64/aarch64.h (AARCH64_FL_FOR_ARCH9): Add FP16 feature bit. diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 27ba4f4ca3fa78585733cfe68e2dee32c55282a7..efa46ac0b8799b5849b609d591186e26e5cb37ff 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -278,7 +278,8 @@ extern unsigned aarch64_architecture_version; #define AARCH64_FL_FOR_ARCH8_R \ (AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_V8_R) #define AARCH64_FL_FOR_ARCH9 \ - (AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_SVE | AARCH64_FL_SVE2 | AARCH64_FL_V9) + (AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_SVE | AARCH64_FL_SVE2 | AARCH64_FL_V9 \ + | AARCH64_FL_F16) /* Macros to test ISA flags. */