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Tue, 08 Mar 2022 00:24:11 +0000 From: Tim Harvey To: u-boot@lists.denx.de, Stefano Babic , Fabio Estevam Cc: Tim Harvey Subject: [PATCH 1/7] board: gateworks: gw_ventana: convert to DM_I2C Date: Mon, 7 Mar 2022 16:24:00 -0800 Message-Id: <20220308002406.22433-2-tharvey@gateworks.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220308002406.22433-1-tharvey@gateworks.com> References: <20220308002406.22433-1-tharvey@gateworks.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean convert to DM_I2C for U-Boot while leaving SPL legacy I2C: - Move I2C config from common to SPL - Move PMIC config from common to SPL (no need to re-configure pmic) - add DM_I2C support to eeprom/gsc functions shared by SPL and U-Boot Signed-off-by: Tim Harvey --- board/gateworks/gw_ventana/common.c | 266 -------------------- board/gateworks/gw_ventana/common.h | 4 - board/gateworks/gw_ventana/eeprom.c | 9 + board/gateworks/gw_ventana/gsc.c | 60 ++++- board/gateworks/gw_ventana/gsc.h | 1 + board/gateworks/gw_ventana/gw_ventana.c | 17 +- board/gateworks/gw_ventana/gw_ventana_spl.c | 266 ++++++++++++++++++++ configs/gwventana_emmc_defconfig | 2 +- configs/gwventana_gw5904_defconfig | 2 +- configs/gwventana_nand_defconfig | 2 +- 10 files changed, 334 insertions(+), 295 deletions(-) diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 7ec931c8a831..2be6518b63e0 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -16,10 +16,6 @@ #include #include #include -#include -#include -#include -#include #include "common.h" @@ -83,98 +79,6 @@ static iomux_v3_cfg_t const usdhc3_pads[] = { IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), }; -/* - * I2C pad configs: - * I2C1: GSC - * I2C2: PMIC,PCIe Switch,Clock,Mezz - * I2C3: Multimedia/Expansion - */ -static struct i2c_pads_info mx6q_i2c_pad_info[] = { - { - .scl = { - .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC, - .gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | PC, - .gp = IMX_GPIO_NR(3, 21) - }, - .sda = { - .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC, - .gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | PC, - .gp = IMX_GPIO_NR(3, 28) - } - }, { - .scl = { - .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC, - .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC, - .gp = IMX_GPIO_NR(4, 12) - }, - .sda = { - .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, - .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC, - .gp = IMX_GPIO_NR(4, 13) - } - }, { - .scl = { - .i2c_mode = MX6Q_PAD_GPIO_3__I2C3_SCL | PC, - .gpio_mode = MX6Q_PAD_GPIO_3__GPIO1_IO03 | PC, - .gp = IMX_GPIO_NR(1, 3) - }, - .sda = { - .i2c_mode = MX6Q_PAD_GPIO_6__I2C3_SDA | PC, - .gpio_mode = MX6Q_PAD_GPIO_6__GPIO1_IO06 | PC, - .gp = IMX_GPIO_NR(1, 6) - } - } -}; - -static struct i2c_pads_info mx6dl_i2c_pad_info[] = { - { - .scl = { - .i2c_mode = MX6DL_PAD_EIM_D21__I2C1_SCL | PC, - .gpio_mode = MX6DL_PAD_EIM_D21__GPIO3_IO21 | PC, - .gp = IMX_GPIO_NR(3, 21) - }, - .sda = { - .i2c_mode = MX6DL_PAD_EIM_D28__I2C1_SDA | PC, - .gpio_mode = MX6DL_PAD_EIM_D28__GPIO3_IO28 | PC, - .gp = IMX_GPIO_NR(3, 28) - } - }, { - .scl = { - .i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | PC, - .gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | PC, - .gp = IMX_GPIO_NR(4, 12) - }, - .sda = { - .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC, - .gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC, - .gp = IMX_GPIO_NR(4, 13) - } - }, { - .scl = { - .i2c_mode = MX6DL_PAD_GPIO_3__I2C3_SCL | PC, - .gpio_mode = MX6DL_PAD_GPIO_3__GPIO1_IO03 | PC, - .gp = IMX_GPIO_NR(1, 3) - }, - .sda = { - .i2c_mode = MX6DL_PAD_GPIO_6__I2C3_SDA | PC, - .gpio_mode = MX6DL_PAD_GPIO_6__GPIO1_IO06 | PC, - .gp = IMX_GPIO_NR(1, 6) - } - } -}; - -void setup_ventana_i2c(int i2c) -{ - struct i2c_pads_info *p; - - if (is_cpu_type(MXC_CPU_MX6Q)) - p = &mx6q_i2c_pad_info[i2c]; - else - p = &mx6dl_i2c_pad_info[i2c]; - - setup_i2c(i2c, CONFIG_SYS_I2C_SPEED, 0x7f, p); -} - /* * Baseboard specific GPIO */ @@ -1402,176 +1306,6 @@ void setup_board_gpio(int board, struct ventana_board_info *info) } } -/* setup board specific PMIC */ -void setup_pmic(void) -{ - struct pmic *p; - struct ventana_board_info ventana_info; - int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info); - const int i2c_pmic = 1; - u32 reg; - char rev; - int i; - - /* determine board revision */ - rev = 'A'; - for (i = sizeof(ventana_info.model) - 1; i > 0; i--) { - if (ventana_info.model[i] >= 'A') { - rev = ventana_info.model[i]; - break; - } - } - - i2c_set_bus_num(i2c_pmic); - - /* configure PFUZE100 PMIC */ - if (!i2c_probe(CONFIG_POWER_PFUZE100_I2C_ADDR)) { - debug("probed PFUZE100@0x%x\n", CONFIG_POWER_PFUZE100_I2C_ADDR); - power_pfuze100_init(i2c_pmic); - p = pmic_get("PFUZE100"); - if (p && !pmic_probe(p)) { - pmic_reg_read(p, PFUZE100_DEVICEID, ®); - printf("PMIC: PFUZE100 ID=0x%02x\n", reg); - - /* Set VGEN1 to 1.5V and enable */ - pmic_reg_read(p, PFUZE100_VGEN1VOL, ®); - reg &= ~(LDO_VOL_MASK); - reg |= (LDOA_1_50V | LDO_EN); - pmic_reg_write(p, PFUZE100_VGEN1VOL, reg); - - /* Set SWBST to 5.0V and enable */ - pmic_reg_read(p, PFUZE100_SWBSTCON1, ®); - reg &= ~(SWBST_MODE_MASK | SWBST_VOL_MASK); - reg |= (SWBST_5_00V | (SWBST_MODE_AUTO << SWBST_MODE_SHIFT)); - pmic_reg_write(p, PFUZE100_SWBSTCON1, reg); - - if (board == GW54xx && (rev == 'G')) { - /* Disable VGEN5 */ - pmic_reg_write(p, PFUZE100_VGEN5VOL, 0); - - /* Set VGEN6 to 2.5V and enable */ - pmic_reg_read(p, PFUZE100_VGEN6VOL, ®); - reg &= ~(LDO_VOL_MASK); - reg |= (LDOB_2_50V | LDO_EN); - pmic_reg_write(p, PFUZE100_VGEN6VOL, reg); - } - } - - /* put all switchers in continuous mode */ - pmic_reg_read(p, PFUZE100_SW1ABMODE, ®); - reg &= ~(SW_MODE_MASK); - reg |= PWM_PWM; - pmic_reg_write(p, PFUZE100_SW1ABMODE, reg); - - pmic_reg_read(p, PFUZE100_SW2MODE, ®); - reg &= ~(SW_MODE_MASK); - reg |= PWM_PWM; - pmic_reg_write(p, PFUZE100_SW2MODE, reg); - - pmic_reg_read(p, PFUZE100_SW3AMODE, ®); - reg &= ~(SW_MODE_MASK); - reg |= PWM_PWM; - pmic_reg_write(p, PFUZE100_SW3AMODE, reg); - - pmic_reg_read(p, PFUZE100_SW3BMODE, ®); - reg &= ~(SW_MODE_MASK); - reg |= PWM_PWM; - pmic_reg_write(p, PFUZE100_SW3BMODE, reg); - - pmic_reg_read(p, PFUZE100_SW4MODE, ®); - reg &= ~(SW_MODE_MASK); - reg |= PWM_PWM; - pmic_reg_write(p, PFUZE100_SW4MODE, reg); - } - - /* configure LTC3676 PMIC */ - else if (!i2c_probe(CONFIG_POWER_LTC3676_I2C_ADDR)) { - debug("probed LTC3676@0x%x\n", CONFIG_POWER_LTC3676_I2C_ADDR); - power_ltc3676_init(i2c_pmic); - p = pmic_get("LTC3676_PMIC"); - if (!p || pmic_probe(p)) - return; - puts("PMIC: LTC3676\n"); - /* - * set board-specific scalar for max CPU frequency - * per CPU based on the LDO enabled Operating Ranges - * defined in the respective IMX6DQ and IMX6SDL - * datasheets. The voltage resulting from the R1/R2 - * feedback inputs on Ventana is 1308mV. Note that this - * is a bit shy of the Vmin of 1350mV in the datasheet - * for LDO enabled mode but is as high as we can go. - */ - switch (board) { - case GW560x: - /* mask PGOOD during SW3 transition */ - pmic_reg_write(p, LTC3676_DVB3B, - 0x1f | LTC3676_PGOOD_MASK); - /* set SW3 (VDD_ARM) */ - pmic_reg_write(p, LTC3676_DVB3A, 0x1f); - break; - case GW5903: - /* mask PGOOD during SW3 transition */ - pmic_reg_write(p, LTC3676_DVB3B, - 0x1f | LTC3676_PGOOD_MASK); - /* set SW3 (VDD_ARM) */ - pmic_reg_write(p, LTC3676_DVB3A, 0x1f); - - /* mask PGOOD during SW4 transition */ - pmic_reg_write(p, LTC3676_DVB4B, - 0x1f | LTC3676_PGOOD_MASK); - /* set SW4 (VDD_SOC) */ - pmic_reg_write(p, LTC3676_DVB4A, 0x1f); - break; - case GW5905: - /* mask PGOOD during SW1 transition */ - pmic_reg_write(p, LTC3676_DVB1B, - 0x1f | LTC3676_PGOOD_MASK); - /* set SW1 (VDD_ARM) */ - pmic_reg_write(p, LTC3676_DVB1A, 0x1f); - - /* mask PGOOD during SW3 transition */ - pmic_reg_write(p, LTC3676_DVB3B, - 0x1f | LTC3676_PGOOD_MASK); - /* set SW3 (VDD_SOC) */ - pmic_reg_write(p, LTC3676_DVB3A, 0x1f); - break; - default: - /* mask PGOOD during SW1 transition */ - pmic_reg_write(p, LTC3676_DVB1B, - 0x1f | LTC3676_PGOOD_MASK); - /* set SW1 (VDD_SOC) */ - pmic_reg_write(p, LTC3676_DVB1A, 0x1f); - - /* mask PGOOD during SW3 transition */ - pmic_reg_write(p, LTC3676_DVB3B, - 0x1f | LTC3676_PGOOD_MASK); - /* set SW3 (VDD_ARM) */ - pmic_reg_write(p, LTC3676_DVB3A, 0x1f); - } - - /* put all switchers in continuous mode */ - pmic_reg_write(p, LTC3676_BUCK1, 0xc0); - pmic_reg_write(p, LTC3676_BUCK2, 0xc0); - pmic_reg_write(p, LTC3676_BUCK3, 0xc0); - pmic_reg_write(p, LTC3676_BUCK4, 0xc0); - } - - /* configure MP5416 PMIC */ - else if (!i2c_probe(0x69)) { - puts("PMIC: MP5416\n"); - switch (board) { - case GW5910: - /* SW1: VDD_ARM 1.2V -> (1.275 to 1.475) */ - reg = MP5416_VSET_EN | MP5416_VSET_SW1_SVAL(1475000); - i2c_write(0x69, MP5416_VSET_SW1, 1, (uint8_t *)®, 1); - /* SW4: VDD_SOC 1.2V -> (1.350 to 1.475) */ - reg = MP5416_VSET_EN | MP5416_VSET_SW4_SVAL(1475000); - i2c_write(0x69, MP5416_VSET_SW4, 1, (uint8_t *)®, 1); - break; - } - } -} - #include #define WDOG1_ADDR 0x20bc000 #define WDOG2_ADDR 0x20c0000 diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h index edfb065f6a70..526ff066b629 100644 --- a/board/gateworks/gw_ventana/common.h +++ b/board/gateworks/gw_ventana/common.h @@ -79,12 +79,8 @@ struct ventana { extern struct ventana gpio_cfg[GW_UNKNOWN]; -/* configure i2c iomux */ -void setup_ventana_i2c(int); /* configure uart iomux */ void setup_iomux_uart(void); -/* conifgure PMIC */ -void setup_pmic(void); /* configure gpio iomux/defaults */ void setup_iomux_gpio(int board, struct ventana_board_info *); /* late setup of GPIO (configuration per baseboard and env) */ diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c index d21aa3c38ff2..c3a2bbe9ca48 100644 --- a/board/gateworks/gw_ventana/eeprom.c +++ b/board/gateworks/gw_ventana/eeprom.c @@ -13,6 +13,7 @@ #include #include #include +#include #include "gsc.h" #include "ventana_eeprom.h" @@ -34,12 +35,20 @@ read_eeprom(int bus, struct ventana_board_info *info) * board may be ready to probe the GSC before its firmware is * running. We will wait here indefinately for the GSC/EEPROM. */ +#if CONFIG_IS_ENABLED(DM_I2C) + while (1) { + if (i2c_get_dev(bus, GSC_EEPROM_ADDR)) + break; + mdelay(1); + } +#else while (1) { if (0 == i2c_set_bus_num(bus) && 0 == i2c_probe(GSC_EEPROM_ADDR)) break; mdelay(1); } +#endif /* read eeprom config section */ mdelay(10); diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c index 324e5dbed2c8..3c8707578c2f 100644 --- a/board/gateworks/gw_ventana/gsc.c +++ b/board/gateworks/gw_ventana/gsc.c @@ -16,12 +16,31 @@ #include #include +#include +#include #include "ventana_eeprom.h" #include "gsc.h" DECLARE_GLOBAL_DATA_PTR; +#if CONFIG_IS_ENABLED(DM_I2C) +struct udevice *i2c_get_dev(int busno, int slave) +{ + struct udevice *dev, *bus; + int ret; + + ret = uclass_get_device_by_seq(UCLASS_I2C, busno, &bus); + if (ret) + return NULL; + ret = dm_i2c_probe(bus, slave, 0, &dev); + if (ret) + return NULL; + + return dev; +} +#endif + /* * The Gateworks System Controller will fail to ACK a master transaction if * it is busy, which can occur during its 1HZ timer tick while reading ADC's. @@ -34,9 +53,27 @@ int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len) int retry = 3; int n = 0; int ret; +#if CONFIG_IS_ENABLED(DM_I2C) + struct udevice *dev; + + dev = i2c_get_dev(CONFIG_I2C_GSC, chip); + if (!dev) + return -ENODEV; + ret = i2c_set_chip_offset_len(dev, alen); + if (ret) { + puts("EEPROM: Failed to set alen\n"); + return ret; + } +#else + i2c_set_bus_num(CONFIG_I2C_GSC); +#endif while (n++ < retry) { +#if CONFIG_IS_ENABLED(DM_I2C) + ret = dm_i2c_read(dev, addr, buf, len); +#else ret = i2c_read(chip, addr, alen, buf, len); +#endif if (!ret) break; debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr, @@ -53,9 +90,25 @@ int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len) int retry = 3; int n = 0; int ret; +#if CONFIG_IS_ENABLED(DM_I2C) + struct udevice *dev; + + dev = i2c_get_dev(CONFIG_I2C_GSC, chip); + if (!dev) + return -ENODEV; + ret = i2c_set_chip_offset_len(dev, alen); + if (ret) { + puts("EEPROM: Failed to set alen\n"); + return ret; + } +#endif while (n++ < retry) { +#if CONFIG_IS_ENABLED(DM_I2C) + ret = dm_i2c_write(dev, addr, buf, len); +#else ret = i2c_write(chip, addr, alen, buf, len); +#endif if (!ret) break; debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr, @@ -79,7 +132,6 @@ int gsc_get_board_temp(void) node = fdt_node_offset_by_compatible(fdt, -1, "gw,gsc-adc"); if (node <= 0) return node; - i2c_set_bus_num(0); /* iterate over hwmon nodes */ node = fdt_first_subnode(fdt, node); @@ -122,7 +174,6 @@ int gsc_hwmon(void) node = fdt_node_offset_by_compatible(fdt, -1, "gw,gsc-adc"); if (node <= 0) return node; - i2c_set_bus_num(0); /* iterate over hwmon nodes */ node = fdt_first_subnode(fdt, node); @@ -184,7 +235,6 @@ int gsc_info(int verbose) { unsigned char buf[16]; - i2c_set_bus_num(0); if (gsc_i2c_read(GSC_SC_ADDR, 0, 1, buf, 16)) return CMD_RET_FAILURE; @@ -225,7 +275,6 @@ int gsc_boot_wd_disable(void) { u8 reg; - i2c_set_bus_num(CONFIG_I2C_GSC); if (!gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1)) { reg |= (1 << GSC_SC_CTRL1_WDDIS); if (!gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1)) @@ -334,7 +383,6 @@ static int do_gsc_sleep(struct cmd_tbl *cmdtp, int flag, int argc, secs = dectoul(argv[1], NULL); printf("GSC Sleeping for %ld seconds\n", secs); - i2c_set_bus_num(0); reg = (secs >> 24) & 0xff; if (gsc_i2c_write(GSC_SC_ADDR, 9, 1, ®, 1)) goto error; @@ -377,7 +425,6 @@ static int do_gsc_wd(struct cmd_tbl *cmdtp, int flag, int argc, if (argc > 2) timeout = dectoul(argv[2], NULL); - i2c_set_bus_num(0); if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1)) return CMD_RET_FAILURE; reg &= ~((1 << GSC_SC_CTRL1_WDEN) | (1 << GSC_SC_CTRL1_WDTIME)); @@ -391,7 +438,6 @@ static int do_gsc_wd(struct cmd_tbl *cmdtp, int flag, int argc, printf("GSC Watchdog enabled with timeout=%d seconds\n", timeout); } else if (strcasecmp(argv[1], "disable") == 0) { - i2c_set_bus_num(0); if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1)) return CMD_RET_FAILURE; reg &= ~((1 << GSC_SC_CTRL1_WDEN) | (1 << GSC_SC_CTRL1_WDTIME)); diff --git a/board/gateworks/gw_ventana/gsc.h b/board/gateworks/gw_ventana/gsc.h index 5c349888280e..2e1d25bc6f04 100644 --- a/board/gateworks/gw_ventana/gsc.h +++ b/board/gateworks/gw_ventana/gsc.h @@ -68,4 +68,5 @@ int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len); int gsc_info(int verbose); int gsc_boot_wd_disable(void); const char *gsc_get_dtb_name(int level, char *buf, int sz); +struct udevice *i2c_get_dev(int busno, int slave); #endif diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 8cf791467024..a76f0ea62f9d 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -138,8 +138,7 @@ static int detect_lvds(struct display_info_t const *dev) return 0; } - return i2c_set_bus_num(dev->bus) == 0 && - i2c_probe(dev->addr) == 0; + return (i2c_get_dev(dev->bus, dev->addr) ? 1 : 0); } static void enable_lvds(struct display_info_t const *dev) @@ -355,13 +354,6 @@ static void setup_display(void) } #endif /* CONFIG_VIDEO_IPUV3 */ -/* setup board specific PMIC */ -int power_init_board(void) -{ - setup_pmic(); - return 0; -} - /* * Most Ventana boards have a PLX PEX860x PCIe switch onboard and use its * GPIO's as PERST# signals for its downstream ports - configure the GPIO's @@ -490,12 +482,8 @@ int board_init(void) gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; /* read Gateworks EEPROM into global struct (used later) */ - setup_ventana_i2c(0); board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info); - setup_ventana_i2c(1); - setup_ventana_i2c(2); - setup_iomux_gpio(board_type, &ventana_info); return 0; @@ -925,8 +913,7 @@ void ft_board_pci_fixup(void *blob, struct bd_info *bd) */ if ((dev->vendor == PCI_VENDOR_ID_TI) && (dev->device == 0x8240) && - (i2c_set_bus_num(1) == 0) && - (i2c_probe(0x50) == 0)) + i2c_get_dev(1, 0x50)) { np = fdt_add_pci_path(blob, dev); if (np > 0) diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c index 5a69aff67172..60e2768d2eba 100644 --- a/board/gateworks/gw_ventana/gw_ventana_spl.c +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c @@ -20,6 +20,10 @@ #include #include #include +#include +#include +#include +#include #include "gsc.h" #include "common.h" @@ -667,6 +671,268 @@ static void ccgr_init(void) writel(0x000003FF, &ccm->CCGR6); } +/* + * I2C pad configs: + * I2C1: GSC + * I2C2: PMIC,PCIe Switch,Clock,Mezz + * I2C3: Multimedia/Expansion + */ +static struct i2c_pads_info mx6q_i2c_pad_info[] = { + { + .scl = { + .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } + }, { + .scl = { + .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } + }, { + .scl = { + .i2c_mode = MX6Q_PAD_GPIO_3__I2C3_SCL | PC, + .gpio_mode = MX6Q_PAD_GPIO_3__GPIO1_IO03 | PC, + .gp = IMX_GPIO_NR(1, 3) + }, + .sda = { + .i2c_mode = MX6Q_PAD_GPIO_6__I2C3_SDA | PC, + .gpio_mode = MX6Q_PAD_GPIO_6__GPIO1_IO06 | PC, + .gp = IMX_GPIO_NR(1, 6) + } + } +}; + +static struct i2c_pads_info mx6dl_i2c_pad_info[] = { + { + .scl = { + .i2c_mode = MX6DL_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6DL_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6DL_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6DL_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } + }, { + .scl = { + .i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } + }, { + .scl = { + .i2c_mode = MX6DL_PAD_GPIO_3__I2C3_SCL | PC, + .gpio_mode = MX6DL_PAD_GPIO_3__GPIO1_IO03 | PC, + .gp = IMX_GPIO_NR(1, 3) + }, + .sda = { + .i2c_mode = MX6DL_PAD_GPIO_6__I2C3_SDA | PC, + .gpio_mode = MX6DL_PAD_GPIO_6__GPIO1_IO06 | PC, + .gp = IMX_GPIO_NR(1, 6) + } + } +}; + +static void setup_ventana_i2c(int i2c) +{ + struct i2c_pads_info *p; + + if (is_cpu_type(MXC_CPU_MX6Q)) + p = &mx6q_i2c_pad_info[i2c]; + else + p = &mx6dl_i2c_pad_info[i2c]; + + setup_i2c(i2c, CONFIG_SYS_I2C_SPEED, 0x7f, p); +} + +/* setup board specific PMIC */ +void setup_pmic(void) +{ + struct pmic *p; + struct ventana_board_info ventana_info; + int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info); + const int i2c_pmic = 1; + u32 reg; + char rev; + int i; + + /* determine board revision */ + rev = 'A'; + for (i = sizeof(ventana_info.model) - 1; i > 0; i--) { + if (ventana_info.model[i] >= 'A') { + rev = ventana_info.model[i]; + break; + } + } + + i2c_set_bus_num(i2c_pmic); + + /* configure PFUZE100 PMIC */ + if (!i2c_probe(CONFIG_POWER_PFUZE100_I2C_ADDR)) { + debug("probed PFUZE100@0x%x\n", CONFIG_POWER_PFUZE100_I2C_ADDR); + power_pfuze100_init(i2c_pmic); + p = pmic_get("PFUZE100"); + if (p && !pmic_probe(p)) { + pmic_reg_read(p, PFUZE100_DEVICEID, ®); + printf("PMIC: PFUZE100 ID=0x%02x\n", reg); + + /* Set VGEN1 to 1.5V and enable */ + pmic_reg_read(p, PFUZE100_VGEN1VOL, ®); + reg &= ~(LDO_VOL_MASK); + reg |= (LDOA_1_50V | LDO_EN); + pmic_reg_write(p, PFUZE100_VGEN1VOL, reg); + + /* Set SWBST to 5.0V and enable */ + pmic_reg_read(p, PFUZE100_SWBSTCON1, ®); + reg &= ~(SWBST_MODE_MASK | SWBST_VOL_MASK); + reg |= (SWBST_5_00V | (SWBST_MODE_AUTO << SWBST_MODE_SHIFT)); + pmic_reg_write(p, PFUZE100_SWBSTCON1, reg); + + if (board == GW54xx && (rev == 'G')) { + /* Disable VGEN5 */ + pmic_reg_write(p, PFUZE100_VGEN5VOL, 0); + + /* Set VGEN6 to 2.5V and enable */ + pmic_reg_read(p, PFUZE100_VGEN6VOL, ®); + reg &= ~(LDO_VOL_MASK); + reg |= (LDOB_2_50V | LDO_EN); + pmic_reg_write(p, PFUZE100_VGEN6VOL, reg); + } + } + + /* put all switchers in continuous mode */ + pmic_reg_read(p, PFUZE100_SW1ABMODE, ®); + reg &= ~(SW_MODE_MASK); + reg |= PWM_PWM; + pmic_reg_write(p, PFUZE100_SW1ABMODE, reg); + + pmic_reg_read(p, PFUZE100_SW2MODE, ®); + reg &= ~(SW_MODE_MASK); + reg |= PWM_PWM; + pmic_reg_write(p, PFUZE100_SW2MODE, reg); + + pmic_reg_read(p, PFUZE100_SW3AMODE, ®); + reg &= ~(SW_MODE_MASK); + reg |= PWM_PWM; + pmic_reg_write(p, PFUZE100_SW3AMODE, reg); + + pmic_reg_read(p, PFUZE100_SW3BMODE, ®); + reg &= ~(SW_MODE_MASK); + reg |= PWM_PWM; + pmic_reg_write(p, PFUZE100_SW3BMODE, reg); + + pmic_reg_read(p, PFUZE100_SW4MODE, ®); + reg &= ~(SW_MODE_MASK); + reg |= PWM_PWM; + pmic_reg_write(p, PFUZE100_SW4MODE, reg); + } + + /* configure LTC3676 PMIC */ + else if (!i2c_probe(CONFIG_POWER_LTC3676_I2C_ADDR)) { + debug("probed LTC3676@0x%x\n", CONFIG_POWER_LTC3676_I2C_ADDR); + power_ltc3676_init(i2c_pmic); + p = pmic_get("LTC3676_PMIC"); + if (!p || pmic_probe(p)) + return; + puts("PMIC: LTC3676\n"); + /* + * set board-specific scalar for max CPU frequency + * per CPU based on the LDO enabled Operating Ranges + * defined in the respective IMX6DQ and IMX6SDL + * datasheets. The voltage resulting from the R1/R2 + * feedback inputs on Ventana is 1308mV. Note that this + * is a bit shy of the Vmin of 1350mV in the datasheet + * for LDO enabled mode but is as high as we can go. + */ + switch (board) { + case GW560x: + /* mask PGOOD during SW3 transition */ + pmic_reg_write(p, LTC3676_DVB3B, + 0x1f | LTC3676_PGOOD_MASK); + /* set SW3 (VDD_ARM) */ + pmic_reg_write(p, LTC3676_DVB3A, 0x1f); + break; + case GW5903: + /* mask PGOOD during SW3 transition */ + pmic_reg_write(p, LTC3676_DVB3B, + 0x1f | LTC3676_PGOOD_MASK); + /* set SW3 (VDD_ARM) */ + pmic_reg_write(p, LTC3676_DVB3A, 0x1f); + + /* mask PGOOD during SW4 transition */ + pmic_reg_write(p, LTC3676_DVB4B, + 0x1f | LTC3676_PGOOD_MASK); + /* set SW4 (VDD_SOC) */ + pmic_reg_write(p, LTC3676_DVB4A, 0x1f); + break; + case GW5905: + /* mask PGOOD during SW1 transition */ + pmic_reg_write(p, LTC3676_DVB1B, + 0x1f | LTC3676_PGOOD_MASK); + /* set SW1 (VDD_ARM) */ + pmic_reg_write(p, LTC3676_DVB1A, 0x1f); + + /* mask PGOOD during SW3 transition */ + pmic_reg_write(p, LTC3676_DVB3B, + 0x1f | LTC3676_PGOOD_MASK); + /* set SW3 (VDD_SOC) */ + pmic_reg_write(p, LTC3676_DVB3A, 0x1f); + break; + default: + /* mask PGOOD during SW1 transition */ + pmic_reg_write(p, LTC3676_DVB1B, + 0x1f | LTC3676_PGOOD_MASK); + /* set SW1 (VDD_SOC) */ + pmic_reg_write(p, LTC3676_DVB1A, 0x1f); + + /* mask PGOOD during SW3 transition */ + pmic_reg_write(p, LTC3676_DVB3B, + 0x1f | LTC3676_PGOOD_MASK); + /* set SW3 (VDD_ARM) */ + pmic_reg_write(p, LTC3676_DVB3A, 0x1f); + } + + /* put all switchers in continuous mode */ + pmic_reg_write(p, LTC3676_BUCK1, 0xc0); + pmic_reg_write(p, LTC3676_BUCK2, 0xc0); + pmic_reg_write(p, LTC3676_BUCK3, 0xc0); + pmic_reg_write(p, LTC3676_BUCK4, 0xc0); + } + + /* configure MP5416 PMIC */ + else if (!i2c_probe(0x69)) { + puts("PMIC: MP5416\n"); + switch (board) { + case GW5910: + /* SW1: VDD_ARM 1.2V -> (1.275 to 1.475) */ + reg = MP5416_VSET_EN | MP5416_VSET_SW1_SVAL(1475000); + i2c_write(0x69, MP5416_VSET_SW1, 1, (uint8_t *)®, 1); + /* SW4: VDD_SOC 1.2V -> (1.350 to 1.475) */ + reg = MP5416_VSET_EN | MP5416_VSET_SW4_SVAL(1475000); + i2c_write(0x69, MP5416_VSET_SW4, 1, (uint8_t *)®, 1); + break; + } + } +} + /* * called from C runtime startup code (arch/arm/lib/crt0.S:_main) * - we have a stack and a place to store GD, both in SRAM diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index fc33dd26ae52..8f73f102c119 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -92,7 +92,7 @@ CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y CONFIG_LED=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 93fd748eabac..0d128872317d 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -92,7 +92,7 @@ CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y CONFIG_LED=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 7d23ea32cdf5..07a2b8c95725 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -94,7 +94,7 @@ CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y CONFIG_LED=y From patchwork Tue Mar 8 00:24:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Harvey X-Patchwork-Id: 1602640 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCGLM0hZrz9s5P for ; Tue, 8 Mar 2022 11:24:59 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id AB400830F8; Tue, 8 Mar 2022 01:24:41 +0100 (CET) Authentication-Results: phobos.denx.de; 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Tue, 08 Mar 2022 00:24:12 +0000 From: Tim Harvey To: u-boot@lists.denx.de, Stefano Babic , Fabio Estevam Cc: Tim Harvey Subject: [PATCH 2/7] board: gateworks: gw_ventana: move SPL uart config out of common Date: Mon, 7 Mar 2022 16:24:01 -0800 Message-Id: <20220308002406.22433-3-tharvey@gateworks.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220308002406.22433-1-tharvey@gateworks.com> References: <20220308002406.22433-1-tharvey@gateworks.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Since DM_SERIAL is used for U-Boot we no longer need legacy UART code in common.c shared by the SPL and U-Boot. Move the legacy UART config to the non-DM SPL. Signed-off-by: Tim Harvey --- board/gateworks/gw_ventana/common.c | 11 ----------- board/gateworks/gw_ventana/common.h | 2 -- board/gateworks/gw_ventana/gw_ventana_spl.c | 11 +++++++++++ 3 files changed, 11 insertions(+), 13 deletions(-) diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 2be6518b63e0..6b8900e45ba7 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -19,17 +19,6 @@ #include "common.h" -/* UART2: Serial Console */ -static iomux_v3_cfg_t const uart2_pads[] = { - IOMUX_PADS(PAD_SD4_DAT7__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT4__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), -}; - -void setup_iomux_uart(void) -{ - SETUP_IOMUX_PADS(uart2_pads); -} - /* MMC */ static iomux_v3_cfg_t const gw5904_emmc_pads[] = { IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h index 526ff066b629..d7f60a0b5d92 100644 --- a/board/gateworks/gw_ventana/common.h +++ b/board/gateworks/gw_ventana/common.h @@ -79,8 +79,6 @@ struct ventana { extern struct ventana gpio_cfg[GW_UNKNOWN]; -/* configure uart iomux */ -void setup_iomux_uart(void); /* configure gpio iomux/defaults */ void setup_iomux_gpio(int board, struct ventana_board_info *); /* late setup of GPIO (configuration per baseboard and env) */ diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c index 60e2768d2eba..2d6ef30b9b5a 100644 --- a/board/gateworks/gw_ventana/gw_ventana_spl.c +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c @@ -671,6 +671,17 @@ static void ccgr_init(void) writel(0x000003FF, &ccm->CCGR6); } +/* UART2: Serial Console */ +static const iomux_v3_cfg_t uart2_pads[] = { + IOMUX_PADS(PAD_SD4_DAT7__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT4__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), +}; + +void setup_iomux_uart(void) +{ + SETUP_IOMUX_PADS(uart2_pads); +} + /* * I2C pad configs: * I2C1: GSC From patchwork Tue Mar 8 00:24:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Harvey X-Patchwork-Id: 1602641 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCGLk3Jznz9s5P for ; Tue, 8 Mar 2022 11:25:18 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id CB505829FF; Tue, 8 Mar 2022 01:24:51 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id B9033830F8; Tue, 8 Mar 2022 01:24:33 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from finn.localdomain (finn.gateworks.com [108.161.129.64]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id E07D082DD7 for ; Tue, 8 Mar 2022 01:24:14 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=tharvey@gateworks.com Received: from 068-189-091-139.biz.spectrum.com ([68.189.91.139] helo=tharvey.pdc.gateworks.com) by finn.localdomain with esmtp (Exim 4.93) (envelope-from ) id 1nRNe8-00BP0Q-Hc; Tue, 08 Mar 2022 00:24:12 +0000 From: Tim Harvey To: u-boot@lists.denx.de, Stefano Babic , Fabio Estevam Cc: Tim Harvey Subject: [PATCH 3/7] board: gateworks: gw_ventana: move GPIO config out of common Date: Mon, 7 Mar 2022 16:24:02 -0800 Message-Id: <20220308002406.22433-4-tharvey@gateworks.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220308002406.22433-1-tharvey@gateworks.com> References: <20220308002406.22433-1-tharvey@gateworks.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Move gpio configuration out of common and into u-boot code as it is not used by the SPL. Signed-off-by: Tim Harvey --- board/gateworks/gw_ventana/common.c | 86 ------------------------- board/gateworks/gw_ventana/common.h | 2 - board/gateworks/gw_ventana/gw_ventana.c | 85 ++++++++++++++++++++++++ 3 files changed, 85 insertions(+), 88 deletions(-) diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 6b8900e45ba7..725f948b874b 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -1209,92 +1209,6 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info) } } -/* setup GPIO pinmux and default configuration per baseboard and env */ -void setup_board_gpio(int board, struct ventana_board_info *info) -{ - const char *s; - char arg[10]; - size_t len; - int i; - int quiet = simple_strtol(env_get("quiet"), NULL, 10); - - if (board >= GW_UNKNOWN) - return; - - /* RS232_EN# */ - if (gpio_cfg[board].rs232_en) { - gpio_direction_output(gpio_cfg[board].rs232_en, - (hwconfig("rs232")) ? 0 : 1); - } - - /* MSATA Enable */ - if (gpio_cfg[board].msata_en && is_cpu_type(MXC_CPU_MX6Q)) { - gpio_direction_output(GP_MSATA_SEL, - (hwconfig("msata")) ? 1 : 0); - } - - /* USBOTG Select (PCISKT or FrontPanel) */ - if (gpio_cfg[board].usb_sel) { - gpio_direction_output(gpio_cfg[board].usb_sel, - (hwconfig("usb_pcisel")) ? 1 : 0); - } - - /* - * Configure DIO pinmux/padctl registers - * see IMX6DQRM/IMX6SDLRM IOMUXC_SW_PAD_CTL_PAD_* register definitions - */ - for (i = 0; i < gpio_cfg[board].dio_num; i++) { - struct dio_cfg *cfg = &gpio_cfg[board].dio_cfg[i]; - iomux_v3_cfg_t ctrl = DIO_PAD_CFG; - unsigned cputype = is_cpu_type(MXC_CPU_MX6Q) ? 0 : 1; - - if (!cfg->gpio_padmux[0] && !cfg->gpio_padmux[1]) - continue; - sprintf(arg, "dio%d", i); - if (!hwconfig(arg)) - continue; - s = hwconfig_subarg(arg, "padctrl", &len); - if (s) { - ctrl = MUX_PAD_CTRL(hextoul(s, NULL) - & 0x1ffff) | MUX_MODE_SION; - } - if (hwconfig_subarg_cmp(arg, "mode", "gpio")) { - if (!quiet) { - printf("DIO%d: GPIO%d_IO%02d (gpio-%d)\n", i, - (cfg->gpio_param/32)+1, - cfg->gpio_param%32, - cfg->gpio_param); - } - imx_iomux_v3_setup_pad(cfg->gpio_padmux[cputype] | - ctrl); - gpio_requestf(cfg->gpio_param, "dio%d", i); - gpio_direction_input(cfg->gpio_param); - } else if (hwconfig_subarg_cmp(arg, "mode", "pwm") && - cfg->pwm_padmux) { - if (!cfg->pwm_param) { - printf("DIO%d: Error: pwm config invalid\n", - i); - continue; - } - if (!quiet) - printf("DIO%d: pwm%d\n", i, cfg->pwm_param); - imx_iomux_v3_setup_pad(cfg->pwm_padmux[cputype] | - MUX_PAD_CTRL(ctrl)); - } - } - - if (!quiet) { - if (gpio_cfg[board].msata_en && is_cpu_type(MXC_CPU_MX6Q)) { - printf("MSATA: %s\n", (hwconfig("msata") ? - "enabled" : "disabled")); - } - if (gpio_cfg[board].rs232_en) { - printf("RS232: %s\n", (hwconfig("rs232")) ? - "enabled" : "disabled"); - } - } -} - #include #define WDOG1_ADDR 0x20bc000 #define WDOG2_ADDR 0x20c0000 diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h index d7f60a0b5d92..a03663487f9f 100644 --- a/board/gateworks/gw_ventana/common.h +++ b/board/gateworks/gw_ventana/common.h @@ -81,8 +81,6 @@ extern struct ventana gpio_cfg[GW_UNKNOWN]; /* configure gpio iomux/defaults */ void setup_iomux_gpio(int board, struct ventana_board_info *); -/* late setup of GPIO (configuration per baseboard and env) */ -void setup_board_gpio(int board, struct ventana_board_info *); /* early model/revision ft fixups */ void ft_early_fixup(void *fdt, int board_type); diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index a76f0ea62f9d..9b8f7b517749 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -576,6 +576,91 @@ static const struct boot_mode board_boot_modes[] = { }; #endif +/* setup GPIO pinmux and default configuration per baseboard and env */ +void setup_board_gpio(int board, struct ventana_board_info *info) +{ + const char *s; + char arg[10]; + size_t len; + int i; + int quiet = simple_strtol(env_get("quiet"), NULL, 10); + + if (board >= GW_UNKNOWN) + return; + + /* RS232_EN# */ + if (gpio_cfg[board].rs232_en) { + gpio_direction_output(gpio_cfg[board].rs232_en, + (hwconfig("rs232")) ? 0 : 1); + } + + /* MSATA Enable */ + if (gpio_cfg[board].msata_en && is_cpu_type(MXC_CPU_MX6Q)) { + gpio_direction_output(GP_MSATA_SEL, + (hwconfig("msata")) ? 1 : 0); + } + + /* USBOTG Select (PCISKT or FrontPanel) */ + if (gpio_cfg[board].usb_sel) { + gpio_direction_output(gpio_cfg[board].usb_sel, + (hwconfig("usb_pcisel")) ? 1 : 0); + } + + /* + * Configure DIO pinmux/padctl registers + * see IMX6DQRM/IMX6SDLRM IOMUXC_SW_PAD_CTL_PAD_* register definitions + */ + for (i = 0; i < gpio_cfg[board].dio_num; i++) { + struct dio_cfg *cfg = &gpio_cfg[board].dio_cfg[i]; + iomux_v3_cfg_t ctrl = DIO_PAD_CFG; + unsigned int cputype = is_cpu_type(MXC_CPU_MX6Q) ? 0 : 1; + + if (!cfg->gpio_padmux[0] && !cfg->gpio_padmux[1]) + continue; + sprintf(arg, "dio%d", i); + if (!hwconfig(arg)) + continue; + s = hwconfig_subarg(arg, "padctrl", &len); + if (s) { + ctrl = MUX_PAD_CTRL(hextoul(s, NULL) + & 0x1ffff) | MUX_MODE_SION; + } + if (hwconfig_subarg_cmp(arg, "mode", "gpio")) { + if (!quiet) { + printf("DIO%d: GPIO%d_IO%02d (gpio-%d)\n", i, + (cfg->gpio_param / 32) + 1, + cfg->gpio_param % 32, + cfg->gpio_param); + } + imx_iomux_v3_setup_pad(cfg->gpio_padmux[cputype] | + ctrl); + gpio_requestf(cfg->gpio_param, "dio%d", i); + gpio_direction_input(cfg->gpio_param); + } else if (hwconfig_subarg_cmp(arg, "mode", "pwm") && + cfg->pwm_padmux) { + if (!cfg->pwm_param) { + printf("DIO%d: Error: pwm config invalid\n", + i); + continue; + } + if (!quiet) + printf("DIO%d: pwm%d\n", i, cfg->pwm_param); + imx_iomux_v3_setup_pad(cfg->pwm_padmux[cputype] | + MUX_PAD_CTRL(ctrl)); + } + } + + if (!quiet) { + if (gpio_cfg[board].msata_en && is_cpu_type(MXC_CPU_MX6Q)) { + printf("MSATA: %s\n", (hwconfig("msata") ? + "enabled" : "disabled")); + } + if (gpio_cfg[board].rs232_en) { + printf("RS232: %s\n", (hwconfig("rs232")) ? + "enabled" : "disabled"); + } + } +} /* late init */ int misc_init_r(void) { From patchwork Tue Mar 8 00:24:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Harvey X-Patchwork-Id: 1602643 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCGML5S1Zz9s5P for ; Tue, 8 Mar 2022 11:25:50 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id F2EFE8382F; Tue, 8 Mar 2022 01:25:39 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 4F4B8829FF; Tue, 8 Mar 2022 01:24:45 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from finn.localdomain (finn.gateworks.com [108.161.129.64]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 6C447830F1 for ; Tue, 8 Mar 2022 01:24:15 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=tharvey@gateworks.com Received: from 068-189-091-139.biz.spectrum.com ([68.189.91.139] helo=tharvey.pdc.gateworks.com) by finn.localdomain with esmtp (Exim 4.93) (envelope-from ) id 1nRNe9-00BP0Q-0I; Tue, 08 Mar 2022 00:24:13 +0000 From: Tim Harvey To: u-boot@lists.denx.de, Stefano Babic , Fabio Estevam Cc: Tim Harvey Subject: [PATCH 4/7] board: gateworks: gw_ventana: move ft_early_fixups out of common Date: Mon, 7 Mar 2022 16:24:03 -0800 Message-Id: <20220308002406.22433-5-tharvey@gateworks.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220308002406.22433-1-tharvey@gateworks.com> References: <20220308002406.22433-1-tharvey@gateworks.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean DM is not used for the SPL and a generic DT is used in the SPL which requires no fixups. Remove the call in the SPL and move the function into the U-Boot code. Signed-off-by: Tim Harvey --- board/gateworks/gw_ventana/common.c | 148 -------------------- board/gateworks/gw_ventana/common.h | 2 - board/gateworks/gw_ventana/gw_ventana.c | 146 +++++++++++++++++++ board/gateworks/gw_ventana/gw_ventana_spl.c | 5 - 4 files changed, 146 insertions(+), 155 deletions(-) diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 725f948b874b..414406461e26 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -1209,154 +1209,6 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info) } } -#include -#define WDOG1_ADDR 0x20bc000 -#define WDOG2_ADDR 0x20c0000 -#define GPIO3_ADDR 0x20a4000 -#define USDHC3_ADDR 0x2198000 - -static void ft_board_wdog_fixup(void *blob, phys_addr_t addr) -{ - int off = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-wdt", addr); - - if (off) { - fdt_delprop(blob, off, "ext-reset-output"); - fdt_delprop(blob, off, "fsl,ext-reset-output"); - } -} - -void ft_early_fixup(void *blob, int board_type) -{ - struct ventana_board_info *info = &ventana_info; - char rev = 0; - int i; - - /* determine board revision */ - for (i = sizeof(ventana_info.model) - 1; i > 0; i--) { - if (ventana_info.model[i] >= 'A') { - rev = ventana_info.model[i]; - break; - } - } - - /* - * Board model specific fixups - */ - switch (board_type) { - case GW51xx: - /* - * disable wdog node for GW51xx-A/B to work around - * errata causing wdog timer to be unreliable. - */ - if (rev >= 'A' && rev < 'C') { - i = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-wdt", - WDOG1_ADDR); - if (i) - fdt_status_disabled(blob, i); - } - - /* GW51xx-E adds WDOG1_B external reset */ - if (rev < 'E') - ft_board_wdog_fixup(blob, WDOG1_ADDR); - break; - - case GW52xx: - /* GW522x Uses GPIO3_IO23 instead of GPIO1_IO29 */ - if (info->model[4] == '2') { - u32 handle = 0; - u32 *range = NULL; - - i = fdt_node_offset_by_compatible(blob, -1, - "fsl,imx6q-pcie"); - if (i) - range = (u32 *)fdt_getprop(blob, i, - "reset-gpio", NULL); - - if (range) { - i = fdt_node_offset_by_compat_reg(blob, - "fsl,imx6q-gpio", GPIO3_ADDR); - if (i) - handle = fdt_get_phandle(blob, i); - if (handle) { - range[0] = cpu_to_fdt32(handle); - range[1] = cpu_to_fdt32(23); - } - } - - /* these have broken usd_vsel */ - if (strstr((const char *)info->model, "SP318-B") || - strstr((const char *)info->model, "SP331-B")) - gpio_cfg[board_type].usd_vsel = 0; - - /* GW522x-B adds WDOG1_B external reset */ - if (rev < 'B') - ft_board_wdog_fixup(blob, WDOG1_ADDR); - } - - /* GW520x-E adds WDOG1_B external reset */ - else if (info->model[4] == '0' && rev < 'E') - ft_board_wdog_fixup(blob, WDOG1_ADDR); - break; - - case GW53xx: - /* GW53xx-E adds WDOG1_B external reset */ - if (rev < 'E') - ft_board_wdog_fixup(blob, WDOG1_ADDR); - - /* GW53xx-G has an adv7280 instead of an adv7180 */ - else if (rev > 'F') { - i = fdt_node_offset_by_compatible(blob, -1, "adi,adv7180"); - if (i) { - fdt_setprop_string(blob, i, "compatible", "adi,adv7280"); - fdt_setprop_empty(blob, i, "adv,force-bt656-4"); - } - } - break; - - case GW54xx: - /* - * disable serial2 node for GW54xx for compatibility with older - * 3.10.x kernel that improperly had this node enabled in the DT - */ - fdt_set_status_by_alias(blob, "serial2", FDT_STATUS_DISABLED); - - /* GW54xx-E adds WDOG2_B external reset */ - if (rev < 'E') - ft_board_wdog_fixup(blob, WDOG2_ADDR); - - /* GW54xx-G has an adv7280 instead of an adv7180 */ - else if (rev > 'F') { - i = fdt_node_offset_by_compatible(blob, -1, "adi,adv7180"); - if (i) { - fdt_setprop_string(blob, i, "compatible", "adi,adv7280"); - fdt_setprop_empty(blob, i, "adv,force-bt656-4"); - } - } - break; - - case GW551x: - /* GW551x-C adds WDOG1_B external reset */ - if (rev < 'C') - ft_board_wdog_fixup(blob, WDOG1_ADDR); - break; - case GW5901: - case GW5902: - /* GW5901/GW5901 revB adds WDOG1_B as an external reset */ - if (rev < 'B') - ft_board_wdog_fixup(blob, WDOG1_ADDR); - break; - } - - /* remove no-1-8-v if UHS-I support is present */ - if (gpio_cfg[board_type].usd_vsel) { - debug("Enabling UHS-I support\n"); - i = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-usdhc", - USDHC3_ADDR); - if (i) - fdt_delprop(blob, i, "no-1-8-v"); - } -} - #ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[2]; diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h index a03663487f9f..7a60db73853a 100644 --- a/board/gateworks/gw_ventana/common.h +++ b/board/gateworks/gw_ventana/common.h @@ -81,7 +81,5 @@ extern struct ventana gpio_cfg[GW_UNKNOWN]; /* configure gpio iomux/defaults */ void setup_iomux_gpio(int board, struct ventana_board_info *); -/* early model/revision ft fixups */ -void ft_early_fixup(void *fdt, int board_type); #endif /* #ifndef _GWVENTANA_COMMON_H_ */ diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 9b8f7b517749..8748878eb3dc 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -1017,6 +1017,152 @@ void ft_board_pci_fixup(void *blob, struct bd_info *bd) } #endif /* if defined(CONFIG_CMD_PCI) */ +#define WDOG1_ADDR 0x20bc000 +#define WDOG2_ADDR 0x20c0000 +#define GPIO3_ADDR 0x20a4000 +#define USDHC3_ADDR 0x2198000 +static void ft_board_wdog_fixup(void *blob, phys_addr_t addr) +{ + int off = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-wdt", addr); + + if (off) { + fdt_delprop(blob, off, "ext-reset-output"); + fdt_delprop(blob, off, "fsl,ext-reset-output"); + } +} + +void ft_early_fixup(void *blob, int board_type) +{ + struct ventana_board_info *info = &ventana_info; + char rev = 0; + int i; + + /* determine board revision */ + for (i = sizeof(ventana_info.model) - 1; i > 0; i--) { + if (ventana_info.model[i] >= 'A') { + rev = ventana_info.model[i]; + break; + } + } + + /* + * Board model specific fixups + */ + switch (board_type) { + case GW51xx: + /* + * disable wdog node for GW51xx-A/B to work around + * errata causing wdog timer to be unreliable. + */ + if (rev >= 'A' && rev < 'C') { + i = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-wdt", + WDOG1_ADDR); + if (i) + fdt_status_disabled(blob, i); + } + + /* GW51xx-E adds WDOG1_B external reset */ + if (rev < 'E') + ft_board_wdog_fixup(blob, WDOG1_ADDR); + break; + + case GW52xx: + /* GW522x Uses GPIO3_IO23 instead of GPIO1_IO29 */ + if (info->model[4] == '2') { + u32 handle = 0; + u32 *range = NULL; + + i = fdt_node_offset_by_compatible(blob, -1, + "fsl,imx6q-pcie"); + if (i) + range = (u32 *)fdt_getprop(blob, i, + "reset-gpio", NULL); + + if (range) { + i = fdt_node_offset_by_compat_reg(blob, + "fsl,imx6q-gpio", GPIO3_ADDR); + if (i) + handle = fdt_get_phandle(blob, i); + if (handle) { + range[0] = cpu_to_fdt32(handle); + range[1] = cpu_to_fdt32(23); + } + } + + /* these have broken usd_vsel */ + if (strstr((const char *)info->model, "SP318-B") || + strstr((const char *)info->model, "SP331-B")) + gpio_cfg[board_type].usd_vsel = 0; + + /* GW522x-B adds WDOG1_B external reset */ + if (rev < 'B') + ft_board_wdog_fixup(blob, WDOG1_ADDR); + } + + /* GW520x-E adds WDOG1_B external reset */ + else if (info->model[4] == '0' && rev < 'E') + ft_board_wdog_fixup(blob, WDOG1_ADDR); + break; + + case GW53xx: + /* GW53xx-E adds WDOG1_B external reset */ + if (rev < 'E') + ft_board_wdog_fixup(blob, WDOG1_ADDR); + + /* GW53xx-G has an adv7280 instead of an adv7180 */ + else if (rev > 'F') { + i = fdt_node_offset_by_compatible(blob, -1, "adi,adv7180"); + if (i) { + fdt_setprop_string(blob, i, "compatible", "adi,adv7280"); + fdt_setprop_empty(blob, i, "adv,force-bt656-4"); + } + } + break; + + case GW54xx: + /* + * disable serial2 node for GW54xx for compatibility with older + * 3.10.x kernel that improperly had this node enabled in the DT + */ + fdt_set_status_by_alias(blob, "serial2", FDT_STATUS_DISABLED); + + /* GW54xx-E adds WDOG2_B external reset */ + if (rev < 'E') + ft_board_wdog_fixup(blob, WDOG2_ADDR); + + /* GW54xx-G has an adv7280 instead of an adv7180 */ + else if (rev > 'F') { + i = fdt_node_offset_by_compatible(blob, -1, "adi,adv7180"); + if (i) { + fdt_setprop_string(blob, i, "compatible", "adi,adv7280"); + fdt_setprop_empty(blob, i, "adv,force-bt656-4"); + } + } + break; + + case GW551x: + /* GW551x-C adds WDOG1_B external reset */ + if (rev < 'C') + ft_board_wdog_fixup(blob, WDOG1_ADDR); + break; + case GW5901: + case GW5902: + /* GW5901/GW5901 revB adds WDOG1_B as an external reset */ + if (rev < 'B') + ft_board_wdog_fixup(blob, WDOG1_ADDR); + break; + } + + /* remove no-1-8-v if UHS-I support is present */ + if (gpio_cfg[board_type].usd_vsel) { + debug("Enabling UHS-I support\n"); + i = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-usdhc", + USDHC3_ADDR); + if (i) + fdt_delprop(blob, i, "no-1-8-v"); + } +} + /* * called prior to booting kernel or by 'fdt boardsetup' command * diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c index 2d6ef30b9b5a..3149e8831544 100644 --- a/board/gateworks/gw_ventana/gw_ventana_spl.c +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c @@ -1062,8 +1062,3 @@ int spl_start_uboot(void) return ret; } #endif - -void spl_perform_fixups(struct spl_image_info *spl_image) -{ - ft_early_fixup(spl_image->fdt_addr, board_type); -} From patchwork Tue Mar 8 00:24:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Harvey X-Patchwork-Id: 1602644 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCGMg2lTRz9s5S for ; Tue, 8 Mar 2022 11:26:07 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 751DF836C0; Tue, 8 Mar 2022 01:25:54 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 1DCD683938; Tue, 8 Mar 2022 01:25:33 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.2 Received: from finn.localdomain (finn.gateworks.com [108.161.129.64]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 62BFE8309E for ; Tue, 8 Mar 2022 01:24:16 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=tharvey@gateworks.com Received: from 068-189-091-139.biz.spectrum.com ([68.189.91.139] helo=tharvey.pdc.gateworks.com) by finn.localdomain with esmtp (Exim 4.93) (envelope-from ) id 1nRNe9-00BP0Q-Ek; Tue, 08 Mar 2022 00:24:13 +0000 From: Tim Harvey To: u-boot@lists.denx.de, Stefano Babic , Fabio Estevam Cc: Tim Harvey Subject: [PATCH 5/7] drivers: misc: add Gateworks System Controller driver Date: Mon, 7 Mar 2022 16:24:04 -0800 Message-Id: <20220308002406.22433-6-tharvey@gateworks.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220308002406.22433-1-tharvey@gateworks.com> References: <20220308002406.22433-1-tharvey@gateworks.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Add a driver for the Gateworks System Controller used on Gateworks boards which provides a boot watchdog, power control, temperature monitor, and voltage ADCs. Signed-off-by: Tim Harvey --- MAINTAINERS | 6 + drivers/misc/Kconfig | 8 + drivers/misc/Makefile | 1 + drivers/misc/gsc.c | 633 ++++++++++++++++++++++++++++++++++++++++++ include/gsc.h | 21 ++ 5 files changed, 669 insertions(+) create mode 100644 drivers/misc/gsc.c create mode 100644 include/gsc.h diff --git a/MAINTAINERS b/MAINTAINERS index 0f39bc6bc923..a80d2a6f76da 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -853,6 +853,12 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq.git F: drivers/watchdog/sp805_wdt.c F: drivers/watchdog/sbsa_gwdt.c +GATEWORKS_SC +M: Tim Harvey +S: Maintained +F: drivers/misc/gsc.c +F: include/gsc.h + I2C M: Heiko Schocher S: Maintained diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 7029bb7b5c58..10fd601278ef 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -46,6 +46,14 @@ config ATSHA204A CryptoAuthentication module found for example on the Turris Omnia board. +config GATEWORKS_SC + bool "Gateworks System Controller Support" + depends on MISC + help + Enable access for the Gateworks System Controller used on Gateworks + boards to provide a boot watchdog, power control, temperature monitor, + voltage ADCs, and EEPROM. + config ROCKCHIP_EFUSE bool "Rockchip e-fuse support" depends on MISC diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index f22eff601a1e..6150d01e8840 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -38,6 +38,7 @@ obj-$(CONFIG_FSL_IIM) += fsl_iim.o obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o obj-$(CONFIG_$(SPL_)FS_LOADER) += fs_loader.o +obj-$(CONFIG_GATEWORKS_SC) += gsc.o obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o diff --git a/drivers/misc/gsc.c b/drivers/misc/gsc.c new file mode 100644 index 000000000000..ec24ca807b07 --- /dev/null +++ b/drivers/misc/gsc.c @@ -0,0 +1,633 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2022 Gateworks Corporation + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define GSC_BUSNO 0 +#define GSC_SC_ADDR 0x20 +#define GSC_HWMON_ADDR 0x29 +#define GSC_RTC_ADDR 0x68 + +/* System Controller registers */ +enum { + GSC_SC_CTRL0 = 0, + GSC_SC_CTRL1 = 1, + GSC_SC_TIME = 2, + GSC_SC_TIME_ADD = 6, + GSC_SC_STATUS = 10, + GSC_SC_FWCRC = 12, + GSC_SC_FWVER = 14, + GSC_SC_WP = 15, + GSC_SC_RST_CAUSE = 16, + GSC_SC_THERM_PROTECT = 19, +}; + +/* System Controller Control1 bits */ +enum { + GSC_SC_CTRL1_SLEEP_EN = 0, /* 1 = enable sleep */ + GSC_SC_CTRL1_SLEEP_ACTIVATE = 1, /* 1 = activate sleep */ + GSC_SC_CTRL1_SLEEP_ADD = 2, /* 1 = latch and add sleep time */ + GSC_SC_CTRL1_SLEEP_NOWAKEPB = 3, /* 1 = do not wake on sleep on button press */ + GSC_SC_CTRL1_WDTIME = 4, /* 1 = 60s timeout, 0 = 30s timeout */ + GSC_SC_CTRL1_WDEN = 5, /* 1 = enable, 0 = disable */ + GSC_SC_CTRL1_BOOT_CHK = 6, /* 1 = enable alt boot check */ + GSC_SC_CTRL1_WDDIS = 7, /* 1 = disable boot watchdog */ +}; + +/* System Controller Interrupt bits */ +enum { + GSC_SC_IRQ_PB = 0, /* Pushbutton switch */ + GSC_SC_IRQ_SECURE = 1, /* Secure Key erase operation complete */ + GSC_SC_IRQ_EEPROM_WP = 2, /* EEPROM write violation */ + GSC_SC_IRQ_GPIO = 4, /* GPIO change */ + GSC_SC_IRQ_TAMPER = 5, /* Tamper detect */ + GSC_SC_IRQ_WATCHDOG = 6, /* Watchdog trip */ + GSC_SC_IRQ_PBLONG = 7, /* Pushbutton long hold */ +}; + +/* System Controller WP bits */ +enum { + GSC_SC_WP_ALL = 0, /* Write Protect All EEPROM regions */ + GSC_SC_WP_BOARDINFO = 1, /* Write Protect Board Info region */ +}; + +/* System Controller Reset Cause */ +enum { + GSC_SC_RST_CAUSE_VIN = 0, + GSC_SC_RST_CAUSE_PB = 1, + GSC_SC_RST_CAUSE_WDT = 2, + GSC_SC_RST_CAUSE_CPU = 3, + GSC_SC_RST_CAUSE_TEMP_LOCAL = 4, + GSC_SC_RST_CAUSE_TEMP_REMOTE = 5, + GSC_SC_RST_CAUSE_SLEEP = 6, + GSC_SC_RST_CAUSE_BOOT_WDT = 7, + GSC_SC_RST_CAUSE_BOOT_WDT_MAN = 8, + GSC_SC_RST_CAUSE_SOFT_PWR = 9, + GSC_SC_RST_CAUSE_MAX = 10, +}; + +#if (IS_ENABLED(CONFIG_DM_I2C)) + +struct gsc_priv { + int gscver; + int fwver; + int fwcrc; + struct udevice *hwmon; + struct udevice *rtc; +}; + +/* + * GSCv2 will fail to ACK an I2C transaction if it is busy, which can occur + * during its 1HZ timer tick while reading ADC's. When this does occur, + * it will never be busy longer than 2 back-to-back transfers so retry 3 times. + */ +static int gsc_i2c_read(struct udevice *dev, uint addr, u8 *buf, int len) +{ + struct gsc_priv *priv = dev_get_priv(dev); + int retry = (priv->gscver == 3) ? 1 : 3; + int n = 0; + int ret; + + while (n++ < retry) { + ret = dm_i2c_read(dev, addr, buf, len); + if (!ret) + break; + if (ret != -EREMOTEIO) + break; + mdelay(10); + } + return ret; +} + +static int gsc_i2c_write(struct udevice *dev, uint addr, const u8 *buf, int len) +{ + struct gsc_priv *priv = dev_get_priv(dev); + int retry = (priv->gscver == 3) ? 1 : 3; + int n = 0; + int ret; + + while (n++ < retry) { + ret = dm_i2c_write(dev, addr, buf, len); + if (!ret) + break; + if (ret != -EREMOTEIO) + break; + mdelay(10); + } + return ret; +} + +static struct udevice *gsc_get_dev(int busno, int slave) +{ + struct udevice *dev, *bus; + int ret; + + ret = uclass_get_device_by_seq(UCLASS_I2C, busno, &bus); + if (ret) + return NULL; + ret = dm_i2c_probe(bus, slave, 0, &dev); + if (ret) + return NULL; + + return dev; +} + +static int gsc_thermal_get_info(struct udevice *dev, u8 *outreg, int *tmax, bool *enable) +{ + struct gsc_priv *priv = dev_get_priv(dev); + int ret; + u8 reg; + + if (priv->gscver > 2 && priv->fwver > 52) { + ret = gsc_i2c_read(dev, GSC_SC_THERM_PROTECT, ®, 1); + if (!ret) { + if (outreg) + *outreg = reg; + if (tmax) { + *tmax = ((reg & 0xf8) >> 3) * 2; + if (*tmax) + *tmax += 70; + else + *tmax = 120; + } + if (enable) + *enable = reg & 1; + } + } else { + ret = -ENODEV; + } + + return ret; +} + +static int gsc_thermal_get_temp(struct udevice *dev) +{ + struct gsc_priv *priv = dev_get_priv(dev); + u32 reg, mode, val; + const char *label; + ofnode node; + u8 buf[2]; + + ofnode_for_each_subnode(node, dev_read_subnode(dev, "adc")) { + if (ofnode_read_u32(node, "reg", ®)) + reg = -1; + if (ofnode_read_u32(node, "gw,mode", &mode)) + mode = -1; + label = ofnode_read_string(node, "label"); + + if ((reg == -1) || (mode == -1) || !label) + continue; + + if (mode != 0 || strcmp(label, "temp")) + continue; + + memset(buf, 0, sizeof(buf)); + if (!gsc_i2c_read(priv->hwmon, reg, buf, sizeof(buf))) { + val = buf[0] | buf[1] << 8; + if (val > 0x8000) + val -= 0xffff; + return val; + } + } + + return 0; +} + +static void gsc_thermal_info(struct udevice *dev) +{ + struct gsc_priv *priv = dev_get_priv(dev); + + switch (priv->gscver) { + case 2: + printf("board_temp:%dC ", gsc_thermal_get_temp(dev) / 10); + break; + case 3: + if (priv->fwver > 52) { + bool enabled; + int tmax; + + if (!gsc_thermal_get_info(dev, NULL, &tmax, &enabled)) { + puts("Thermal protection:"); + if (enabled) + printf("enabled at %dC ", tmax); + else + puts("disabled "); + } + } + break; + } +} + +static void gsc_reset_info(struct udevice *dev) +{ + struct gsc_priv *priv = dev_get_priv(dev); + static const char * const names[] = { + "VIN", + "PB", + "WDT", + "CPU", + "TEMP_L", + "TEMP_R", + "SLEEP", + "BOOT_WDT1", + "BOOT_WDT2", + "SOFT_PWR", + }; + u8 reg; + + /* reset cause */ + switch (priv->gscver) { + case 2: + if (!gsc_i2c_read(dev, GSC_SC_STATUS, ®, 1)) { + if (reg & BIT(GSC_SC_IRQ_WATCHDOG)) { + puts("RST:WDT"); + reg &= ~BIT(GSC_SC_IRQ_WATCHDOG); + gsc_i2c_write(dev, GSC_SC_STATUS, ®, 1); + } else { + puts("RST:VIN"); + } + printf(" WDT:%sabled ", + (reg & BIT(GSC_SC_CTRL1_WDEN)) ? "en" : "dis"); + } + break; + case 3: + if (priv->fwver > 52 && + !gsc_i2c_read(dev, GSC_SC_RST_CAUSE, ®, 1)) { + puts("RST:"); + if (reg < ARRAY_SIZE(names)) + printf("%s ", names[reg]); + else + printf("0x%02x ", reg); + } + break; + } +} + +/* display hardware monitor ADC channels */ +static int gsc_hwmon(struct udevice *dev) +{ + struct gsc_priv *priv = dev_get_priv(dev); + u32 reg, mode, val, offset; + const char *label; + ofnode node; + u8 buf[2]; + u32 r[2]; + int ret; + + /* iterate over hwmon nodes */ + ofnode_for_each_subnode(node, dev_read_subnode(dev, "adc")) { + if (ofnode_read_u32(node, "reg", ®)) + reg = -1; + if (ofnode_read_u32(node, "gw,mode", &mode)) + mode = -1; + label = ofnode_read_string(node, "label"); + if ((reg == -1) || (mode == -1) || !label) + continue; + + memset(buf, 0, sizeof(buf)); + ret = gsc_i2c_read(priv->hwmon, reg, buf, sizeof(buf)); + if (ret) { + printf("i2c error: %d\n", ret); + continue; + } + val = buf[0] | buf[1] << 8; + + switch (mode) { + case 0: /* temperature (C*10) */ + if (val > 0x8000) + val -= 0xffff; + printf("%-8s: %d.%ldC\n", label, val / 10, abs(val % 10)); + break; + case 1: /* prescaled voltage */ + if (val != 0xffff) + printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000); + break; + case 2: /* scaled based on ref volt and resolution */ + val *= 2500; + val /= 1 << 12; + + /* apply pre-scaler voltage divider */ + if (!ofnode_read_u32_index(node, "gw,voltage-divider-ohms", 0, &r[0]) && + !ofnode_read_u32_index(node, "gw,voltage-divider-ohms", 1, &r[1]) && + r[0] && r[1]) { + val *= (r[0] + r[1]); + val /= r[1]; + } + + /* adjust by offset */ + val += (offset / 1000); + + printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000); + break; + } + } + + return 0; +} + +static int gsc_banner(struct udevice *dev) +{ + struct gsc_priv *priv = dev_get_priv(dev); + + /* banner */ + printf("GSCv%d : v%d 0x%04x ", priv->gscver, priv->fwver, priv->fwcrc); + gsc_reset_info(dev); + gsc_thermal_info(dev); + puts("\n"); + + /* Display RTC */ + if (priv->rtc) { + u8 buf[4]; + time_t timestamp; + struct rtc_time tm; + + if (!gsc_i2c_read(priv->rtc, 0, buf, 4)) { + timestamp = get_unaligned_le32(buf); + rtc_to_tm(timestamp, &tm); + printf("RTC : %4d-%02d-%02d %2d:%02d:%02d UTC\n", + tm.tm_year, tm.tm_mon, tm.tm_mday, + tm.tm_hour, tm.tm_min, tm.tm_sec); + } + } + + return 0; +} + +static int gsc_probe(struct udevice *dev) +{ + struct gsc_priv *priv = dev_get_priv(dev); + u8 buf[32]; + int ret; + + ret = gsc_i2c_read(dev, 0, buf, sizeof(buf)); + if (ret) + return ret; + + /* + * GSC chip version: + * GSCv2 has 16 registers (which overlap) + * GSCv3 has 32 registers + */ + priv->gscver = memcmp(buf, buf + 16, 16) ? 3 : 2; + priv->fwver = buf[GSC_SC_FWVER]; + priv->fwcrc = buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC + 1] << 8; + priv->hwmon = gsc_get_dev(GSC_BUSNO, GSC_HWMON_ADDR); + if (priv->hwmon) + dev_set_priv(priv->hwmon, priv); + priv->rtc = gsc_get_dev(GSC_BUSNO, GSC_RTC_ADDR); + if (priv->rtc) + dev_set_priv(priv->rtc, priv); + +#ifdef CONFIG_SPL_BUILD + gsc_banner(dev); +#endif + + return 0; +}; + +static const struct udevice_id gsc_ids[] = { + { .compatible = "gw,gsc", }, + { } +}; + +U_BOOT_DRIVER(gsc) = { + .name = "gsc", + .id = UCLASS_MISC, + .of_match = gsc_ids, + .probe = gsc_probe, + .priv_auto = sizeof(struct gsc_priv), + .flags = DM_FLAG_PRE_RELOC, +}; + +static int gsc_sleep(struct udevice *dev, unsigned long secs) +{ + u8 regs[4]; + int ret; + + printf("GSC Sleeping for %ld seconds\n", secs); + put_unaligned_le32(secs, regs); + ret = gsc_i2c_write(dev, GSC_SC_TIME_ADD, regs, sizeof(regs)); + if (ret) + goto err; + ret = gsc_i2c_read(dev, GSC_SC_CTRL1, regs, 1); + if (ret) + goto err; + regs[0] |= BIT(GSC_SC_CTRL1_SLEEP_ADD); + ret = gsc_i2c_write(dev, GSC_SC_CTRL1, regs, 1); + if (ret) + goto err; + regs[0] &= ~BIT(GSC_SC_CTRL1_SLEEP_ADD); + regs[0] |= BIT(GSC_SC_CTRL1_SLEEP_EN) | BIT(GSC_SC_CTRL1_SLEEP_ACTIVATE); + ret = gsc_i2c_write(dev, GSC_SC_CTRL1, regs, 1); + if (ret) + goto err; + + return 0; + +err: + printf("i2c error: %d\n", ret); + return ret; +} + +static int gsc_wd_disable(struct udevice *dev) +{ + int ret; + u8 reg; + + ret = gsc_i2c_read(dev, GSC_SC_CTRL1, ®, 1); + if (ret) + goto err; + reg |= BIT(GSC_SC_CTRL1_WDDIS); + reg &= ~BIT(GSC_SC_CTRL1_BOOT_CHK); + ret = gsc_i2c_write(dev, GSC_SC_CTRL1, ®, 1); + if (ret) + goto err; + puts("GSC : boot watchdog disabled\n"); + + return 0; + +err: + puts("i2c error"); + return ret; +} + +static int gsc_thermal(struct udevice *dev, const char *cmd, const char *val) +{ + struct gsc_priv *priv = dev_get_priv(dev); + int ret, tmax; + bool enabled; + u8 reg; + + if (priv->gscver < 3 || priv->fwver < 53) + return -EINVAL; + ret = gsc_thermal_get_info(dev, ®, &tmax, &enabled); + if (ret) + return ret; + if (cmd && !strcmp(cmd, "enable")) { + if (val && *val) { + tmax = clamp((int)simple_strtoul(val, NULL, 0), 72, 122); + reg &= ~0xf8; + reg |= ((tmax - 70) / 2) << 3; + } + reg |= BIT(0); + gsc_i2c_write(dev, GSC_SC_THERM_PROTECT, ®, 1); + } else if (cmd && !strcmp(cmd, "disable")) { + reg &= ~BIT(0); + gsc_i2c_write(dev, GSC_SC_THERM_PROTECT, ®, 1); + } else if (cmd) { + return -EINVAL; + } + + /* show status */ + gsc_thermal_info(dev); + puts("\n"); + + return 0; +} + +/* override in board files to display additional board EEPROM info */ +__weak void board_gsc_info(void) +{ +} + +static void gsc_info(struct udevice *dev) +{ + gsc_banner(dev); + board_gsc_info(); +} + +static int do_gsc(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]) +{ + struct udevice *dev; + int ret; + + /* get/probe driver */ + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(gsc), &dev); + if (ret) + return CMD_RET_USAGE; + if (argc < 2) { + gsc_info(dev); + return CMD_RET_SUCCESS; + } else if (strcasecmp(argv[1], "sleep") == 0) { + if (argc < 3) + return CMD_RET_USAGE; + if (!gsc_sleep(dev, dectoul(argv[2], NULL))) + return CMD_RET_SUCCESS; + } else if (strcasecmp(argv[1], "hwmon") == 0) { + if (!gsc_hwmon(dev)) + return CMD_RET_SUCCESS; + } else if (strcasecmp(argv[1], "wd-disable") == 0) { + if (!gsc_wd_disable(dev)) + return CMD_RET_SUCCESS; + } else if (strcasecmp(argv[1], "thermal") == 0) { + char *cmd, *val; + + cmd = (argc > 2) ? argv[2] : NULL; + val = (argc > 3) ? argv[3] : NULL; + if (!gsc_thermal(dev, cmd, val)) + return CMD_RET_SUCCESS; + } + + return CMD_RET_USAGE; +} + +U_BOOT_CMD(gsc, 4, 1, do_gsc, "Gateworks System Controller", + "[sleep ]|[hwmon]|[wd-disable][thermal [disable|enable [temp]]]\n"); + +/* disable boot watchdog - useful for an SPL that wants to use falcon mode */ +int gsc_boot_wd_disable(void) +{ + struct udevice *dev; + int ret; + + /* get/probe driver */ + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(gsc), &dev); + if (!ret) + ret = gsc_wd_disable(dev); + + return ret; +} + +# else + +/* + * GSCv2 will fail to ACK an I2C transaction if it is busy, which can occur + * during its 1HZ timer tick while reading ADC's. When this does occur, + * it will never be busy longer than 2 back-to-back transfers so retry 3 times. + */ +static int gsc_i2c_read(uint chip, uint addr, u8 *buf, int len) +{ + int retry = 3; + int n = 0; + int ret; + + while (n++ < retry) { + ret = i2c_read(chip, addr, 1, buf, len); + if (!ret) + break; + if (ret != -EREMOTEIO) + break; +printf("%s 0x%02x retry %d\n", __func__, addr, n); + mdelay(10); + } + return ret; +} + +static int gsc_i2c_write(uint chip, uint addr, u8 *buf, int len) +{ + int retry = 3; + int n = 0; + int ret; + + while (n++ < retry) { + ret = i2c_write(chip, addr, 1, buf, len); + if (!ret) + break; + if (ret != -EREMOTEIO) + break; +printf("%s 0x%02x retry %d\n", __func__, addr, n); + mdelay(10); + } + return ret; +} + +/* disable boot watchdog - useful for an SPL that wants to use falcon mode */ +int gsc_boot_wd_disable(void) +{ + u8 buf[32]; + int ret; + + i2c_set_bus_num(GSC_BUSNO); + ret = gsc_i2c_read(GSC_SC_ADDR, 0, buf, sizeof(buf)); + if (!ret) { + buf[GSC_SC_CTRL1] |= BIT(GSC_SC_CTRL1_WDDIS); + ret = gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, &buf[GSC_SC_CTRL1], 1); + printf("GSCv%d: v%d 0x%04x ", + memcmp(buf, buf + 16, 16) ? 3 : 2, + buf[GSC_SC_FWVER], + buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC + 1] << 8); + if (buf[GSC_SC_STATUS] & BIT(GSC_SC_IRQ_WATCHDOG)) { + puts("RST:WDT "); + buf[GSC_SC_STATUS] &= ~BIT(GSC_SC_IRQ_WATCHDOG); + gsc_i2c_write(GSC_SC_ADDR, GSC_SC_STATUS, &buf[GSC_SC_STATUS], 1); + } else { + puts("RST:VIN "); + } + puts("WDT:disabled\n"); + } + + return ret; +} + +#endif diff --git a/include/gsc.h b/include/gsc.h new file mode 100644 index 000000000000..132c3121825e --- /dev/null +++ b/include/gsc.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2022 Gateworks Corporation + */ + +#ifndef _GSC_H_ +#define _GSC_H_ + +/* + * board_gsc_info - Display additional board info + */ +void board_gsc_info(void); + +/* + * gsc_boot_wd_disable - disable the BOOT watchdog + * + * Return: 0 on success or negative error on failure + */ +int gsc_boot_wd_disable(void); + +#endif From patchwork Tue Mar 8 00:24:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Harvey X-Patchwork-Id: 1602646 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCGZp4Twtz9s5S for ; Tue, 8 Mar 2022 11:35:46 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 5FB5681433; Tue, 8 Mar 2022 01:35:40 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 47E84836BC; Tue, 8 Mar 2022 01:25:44 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.2 Received: from finn.localdomain (finn.gateworks.com [108.161.129.64]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 71E4D830FC for ; Tue, 8 Mar 2022 01:24:16 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=tharvey@gateworks.com Received: from 068-189-091-139.biz.spectrum.com ([68.189.91.139] helo=tharvey.pdc.gateworks.com) by finn.localdomain with esmtp (Exim 4.93) (envelope-from ) id 1nRNe9-00BP0Q-Sc; Tue, 08 Mar 2022 00:24:14 +0000 From: Tim Harvey To: u-boot@lists.denx.de, Stefano Babic , Fabio Estevam Cc: Tim Harvey Subject: [PATCH 6/7] board: gateworks: gw_ventana: use comomn GSC driver Date: Mon, 7 Mar 2022 16:24:05 -0800 Message-Id: <20220308002406.22433-7-tharvey@gateworks.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220308002406.22433-1-tharvey@gateworks.com> References: <20220308002406.22433-1-tharvey@gateworks.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Use the common GSC driver. This allows us to do some additional cleanup: - use the GSC driver functions - move waiting for the EEPROM to the SPL int (it will always be ready after this) - move eeprom functions into eeprom file and elimate GSC_I2C_BUS - eliminate some redundant EEPROM reads (the EEPROM must be read in SPL before relocation, in SPL after relocation, and in U-Boot init. All subsequent uses can use the global structure) - remove unnecessary header files and alphabatize includes Signed-off-by: Tim Harvey --- arch/arm/mach-imx/mx6/Kconfig | 2 + board/gateworks/gw_ventana/Kconfig | 8 - board/gateworks/gw_ventana/Makefile | 2 +- board/gateworks/gw_ventana/common.c | 16 +- board/gateworks/gw_ventana/common.h | 4 +- board/gateworks/gw_ventana/eeprom.c | 233 +++++++-- .../gw_ventana/{ventana_eeprom.h => eeprom.h} | 16 +- board/gateworks/gw_ventana/gsc.c | 471 ------------------ board/gateworks/gw_ventana/gsc.h | 72 --- board/gateworks/gw_ventana/gw_ventana.c | 44 +- board/gateworks/gw_ventana/gw_ventana_spl.c | 43 +- configs/gwventana_emmc_defconfig | 2 +- configs/gwventana_gw5904_defconfig | 2 +- configs/gwventana_nand_defconfig | 2 +- include/configs/gw_ventana.h | 3 - scripts/config_whitelist.txt | 1 - 16 files changed, 266 insertions(+), 655 deletions(-) rename board/gateworks/gw_ventana/{ventana_eeprom.h => eeprom.h} (82%) delete mode 100644 board/gateworks/gw_ventana/gsc.c delete mode 100644 board/gateworks/gw_ventana/gsc.h diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 98df4d4e4281..8e74e5601b8c 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -227,6 +227,8 @@ config TARGET_GW_VENTANA bool "gw_ventana" depends on MX6QDL select SUPPORT_SPL + select GATEWORKS_SC + select MISC imply CMD_SATA imply CMD_SPL diff --git a/board/gateworks/gw_ventana/Kconfig b/board/gateworks/gw_ventana/Kconfig index fee910ca837d..c82e8aeb9d7a 100644 --- a/board/gateworks/gw_ventana/Kconfig +++ b/board/gateworks/gw_ventana/Kconfig @@ -17,12 +17,4 @@ config CMD_EECONFIG help Provides access to EEPROM configuration on Gateworks Ventana -config CMD_GSC - bool "Enable the 'gsc' command" - help - Provides access to the GSC configuration: - - gsc sleep - sleeps for a period of seconds - gsc wd - enables / disables the watchdog - endif diff --git a/board/gateworks/gw_ventana/Makefile b/board/gateworks/gw_ventana/Makefile index 360d1d4c123f..c407f8e6c54c 100644 --- a/board/gateworks/gw_ventana/Makefile +++ b/board/gateworks/gw_ventana/Makefile @@ -6,5 +6,5 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y := gw_ventana.o gsc.o eeprom.o common.o +obj-y := gw_ventana.o eeprom.o common.o obj-$(CONFIG_SPL_BUILD) += gw_ventana_spl.o diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 414406461e26..74328b2e1b31 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -6,15 +6,15 @@ */ #include +#include +#include +#include #include #include #include #include #include #include -#include -#include -#include #include #include "common.h" @@ -1045,7 +1045,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = { #define SETUP_GPIO_INPUT(gpio, name) \ gpio_request(gpio, name); \ gpio_direction_input(gpio); -void setup_iomux_gpio(int board, struct ventana_board_info *info) +void setup_iomux_gpio(int board) { if (board >= GW_UNKNOWN) return; @@ -1214,8 +1214,6 @@ static struct fsl_esdhc_cfg usdhc_cfg[2]; int board_mmc_init(struct bd_info *bis) { - struct ventana_board_info ventana_info; - int board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info); int ret; switch (board_type) { @@ -1279,13 +1277,11 @@ int board_mmc_init(struct bd_info *bis) int board_mmc_getcd(struct mmc *mmc) { - struct ventana_board_info ventana_info; struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info); - int gpio = gpio_cfg[board].mmc_cd; + int gpio = gpio_cfg[board_type].mmc_cd; /* Card Detect */ - switch (board) { + switch (board_type) { case GW560x: /* emmc is always present */ if (cfg->esdhc_base == USDHC2_BASE_ADDR) diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h index 7a60db73853a..480c6675d7b0 100644 --- a/board/gateworks/gw_ventana/common.h +++ b/board/gateworks/gw_ventana/common.h @@ -8,7 +8,7 @@ #ifndef _GWVENTANA_COMMON_H_ #define _GWVENTANA_COMMON_H_ -#include "ventana_eeprom.h" +#include "eeprom.h" /* GPIO's common to all baseboards */ #define GP_RS232_EN IMX_GPIO_NR(2, 11) @@ -80,6 +80,6 @@ struct ventana { extern struct ventana gpio_cfg[GW_UNKNOWN]; /* configure gpio iomux/defaults */ -void setup_iomux_gpio(int board, struct ventana_board_info *); +void setup_iomux_gpio(int board); #endif /* #ifndef _GWVENTANA_COMMON_H_ */ diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c index c3a2bbe9ca48..e622a9ba9e4d 100644 --- a/board/gateworks/gw_ventana/eeprom.c +++ b/board/gateworks/gw_ventana/eeprom.c @@ -4,23 +4,211 @@ * Author: Tim Harvey */ -#include #include -#include +#include +#include #include #include -#include -#include -#include -#include +#include +#include #include +#include +#include + +#include "eeprom.h" + +/* + * EEPROM board info struct populated by read_eeprom so that we only have to + * read it once. + */ +struct ventana_board_info ventana_info; +int board_type; + +#if CONFIG_IS_ENABLED(DM_I2C) +struct udevice *i2c_get_dev(int busno, int slave) +{ + struct udevice *dev, *bus; + int ret; + + ret = uclass_get_device_by_seq(UCLASS_I2C, busno, &bus); + if (ret) + return NULL; + ret = dm_i2c_probe(bus, slave, 0, &dev); + if (ret) + return NULL; + + return dev; +} +#endif + +/* + * The Gateworks System Controller will fail to ACK a master transaction if + * it is busy, which can occur during its 1HZ timer tick while reading ADC's. + * When this does occur, it will never be busy long enough to fail more than + * 2 back-to-back transfers. Thus we wrap i2c_read and i2c_write with + * 3 retries. + */ +int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len) +{ + int retry = 3; + int n = 0; + int ret; +#if CONFIG_IS_ENABLED(DM_I2C) + struct udevice *dev; + + dev = i2c_get_dev(BOARD_EEPROM_BUSNO, chip); + if (!dev) + return -ENODEV; + ret = i2c_set_chip_offset_len(dev, alen); + if (ret) { + puts("EEPROM: Failed to set alen\n"); + return ret; + } +#else + i2c_set_bus_num(BOARD_EEPROM_BUSNO); +#endif + + while (n++ < retry) { +#if CONFIG_IS_ENABLED(DM_I2C) + ret = dm_i2c_read(dev, addr, buf, len); +#else + ret = i2c_read(chip, addr, alen, buf, len); +#endif + if (!ret) + break; + debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr, + n, ret); + if (ret != -ENODEV) + break; + mdelay(10); + } + return ret; +} + +int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len) +{ + int retry = 3; + int n = 0; + int ret; +#if CONFIG_IS_ENABLED(DM_I2C) + struct udevice *dev; + + dev = i2c_get_dev(BOARD_EEPROM_BUSNO, chip); + if (!dev) + return -ENODEV; + ret = i2c_set_chip_offset_len(dev, alen); + if (ret) { + puts("EEPROM: Failed to set alen\n"); + return ret; + } +#endif + + while (n++ < retry) { +#if CONFIG_IS_ENABLED(DM_I2C) + ret = dm_i2c_write(dev, addr, buf, len); +#else + ret = i2c_write(chip, addr, alen, buf, len); +#endif + if (!ret) + break; + debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr, + n, ret); + if (ret != -ENODEV) + break; + mdelay(10); + } + mdelay(100); + return ret; +} + +/* determine BOM revision from model */ +int get_bom_rev(const char *str) +{ + int rev_bom = 0; + int i; + + for (i = strlen(str) - 1; i > 0; i--) { + if (str[i] == '-') + break; + if (str[i] >= '1' && str[i] <= '9') { + rev_bom = str[i] - '0'; + break; + } + } + return rev_bom; +} -#include "gsc.h" -#include "ventana_eeprom.h" +/* determine PCB revision from model */ +char get_pcb_rev(const char *str) +{ + char rev_pcb = 'A'; + int i; + for (i = strlen(str) - 1; i > 0; i--) { + if (str[i] == '-') + break; + if (str[i] >= 'A') { + rev_pcb = str[i]; + break; + } + } + return rev_pcb; +} + +/* + * get dt name based on model and detail level: + */ +const char *gsc_get_dtb_name(int level, char *buf, int sz) +{ + const char *model = (const char *)ventana_info.model; + const char *pre = is_mx6dq() ? "imx6q-" : "imx6dl-"; + int modelno, rev_pcb, rev_bom; + + /* a few board models are dt equivalents to other models */ + if (strncasecmp(model, "gw5906", 6) == 0) + model = "gw552x-d"; + else if (strncasecmp(model, "gw5908", 6) == 0) + model = "gw53xx-f"; + else if (strncasecmp(model, "gw5905", 6) == 0) + model = "gw5904-a"; + + modelno = ((model[2] - '0') * 1000) + + ((model[3] - '0') * 100) + + ((model[4] - '0') * 10) + + (model[5] - '0'); + rev_pcb = tolower(get_pcb_rev(model)); + rev_bom = get_bom_rev(model); + + /* compare model/rev/bom in order of most specific to least */ + snprintf(buf, sz, "%s%04d", pre, modelno); + switch (level) { + case 0: /* full model first (ie gw5400-a1) */ + if (rev_bom) { + snprintf(buf, sz, "%sgw%04d-%c%d", pre, modelno, rev_pcb, rev_bom); + break; + } + fallthrough; + case 1: /* don't care about bom rev (ie gw5400-a) */ + snprintf(buf, sz, "%sgw%04d-%c", pre, modelno, rev_pcb); + break; + case 2: /* don't care about the pcb rev (ie gw5400) */ + snprintf(buf, sz, "%sgw%04d", pre, modelno); + break; + case 3: /* look for generic model (ie gw540x) */ + snprintf(buf, sz, "%sgw%03dx", pre, modelno / 10); + break; + case 4: /* look for more generic model (ie gw54xx) */ + snprintf(buf, sz, "%sgw%02dxx", pre, modelno / 100); + break; + default: /* give up */ + return NULL; + } + + return buf; +} /* read ventana EEPROM, check for validity, and return baseboard type */ int -read_eeprom(int bus, struct ventana_board_info *info) +read_eeprom(struct ventana_board_info *info) { int i; int chksum; @@ -30,29 +218,8 @@ read_eeprom(int bus, struct ventana_board_info *info) memset(info, 0, sizeof(*info)); - /* - * On a board with a missing/depleted backup battery for GSC, the - * board may be ready to probe the GSC before its firmware is - * running. We will wait here indefinately for the GSC/EEPROM. - */ -#if CONFIG_IS_ENABLED(DM_I2C) - while (1) { - if (i2c_get_dev(bus, GSC_EEPROM_ADDR)) - break; - mdelay(1); - } -#else - while (1) { - if (0 == i2c_set_bus_num(bus) && - 0 == i2c_probe(GSC_EEPROM_ADDR)) - break; - mdelay(1); - } -#endif - /* read eeprom config section */ - mdelay(10); - if (gsc_i2c_read(GSC_EEPROM_ADDR, 0x00, 1, buf, sizeof(*info))) { + if (gsc_i2c_read(BOARD_EEPROM_ADDR, 0x00, 1, buf, sizeof(*info))) { puts("EEPROM: Failed to read EEPROM\n"); return GW_UNKNOWN; } @@ -219,14 +386,14 @@ static int do_econfig(struct cmd_tbl *cmdtp, int flag, int argc, info->chksum[1] = chksum & 0xff; /* write new config data */ - if (gsc_i2c_write(GSC_EEPROM_ADDR, info->config - (u8 *)info, + if (gsc_i2c_write(BOARD_EEPROM_ADDR, info->config - (u8 *)info, 1, econfig_bytes, sizeof(econfig_bytes))) { printf("EEPROM: Failed updating config\n"); return CMD_RET_FAILURE; } /* write new config data */ - if (gsc_i2c_write(GSC_EEPROM_ADDR, info->chksum - (u8 *)info, + if (gsc_i2c_write(BOARD_EEPROM_ADDR, info->chksum - (u8 *)info, 1, info->chksum, 2)) { printf("EEPROM: Failed updating checksum\n"); return CMD_RET_FAILURE; diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/eeprom.h similarity index 82% rename from board/gateworks/gw_ventana/ventana_eeprom.h rename to board/gateworks/gw_ventana/eeprom.h index 2d5c27261ea3..2354205e72a4 100644 --- a/board/gateworks/gw_ventana/ventana_eeprom.h +++ b/board/gateworks/gw_ventana/eeprom.h @@ -6,6 +6,9 @@ #ifndef _VENTANA_EEPROM_ #define _VENTANA_EEPROM_ +#define BOARD_EEPROM_BUSNO 0 +#define BOARD_EEPROM_ADDR 0x51 + struct ventana_board_info { u8 mac0[6]; /* 0x00: MAC1 */ u8 mac1[6]; /* 0x06: MAC2 */ @@ -137,7 +140,18 @@ struct ventana_eeprom_config { extern struct ventana_eeprom_config econfig[]; extern struct ventana_board_info ventana_info; +extern int board_type; + +int read_eeprom(struct ventana_board_info *info); -int read_eeprom(int bus, struct ventana_board_info *); +/* + * I2C transactions to the GSC are done via these functions which + * perform retries in the case of a busy GSC NAK'ing the transaction + */ +int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len); +int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len); +const char *gsc_get_dtb_name(int level, char *buf, int sz); +struct udevice *i2c_get_dev(int busno, int slave); +const char *eeprom_get_model(void); #endif diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c deleted file mode 100644 index 3c8707578c2f..000000000000 --- a/board/gateworks/gw_ventana/gsc.c +++ /dev/null @@ -1,471 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2013 Gateworks Corporation - * - * Author: Tim Harvey - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "ventana_eeprom.h" -#include "gsc.h" - -DECLARE_GLOBAL_DATA_PTR; - -#if CONFIG_IS_ENABLED(DM_I2C) -struct udevice *i2c_get_dev(int busno, int slave) -{ - struct udevice *dev, *bus; - int ret; - - ret = uclass_get_device_by_seq(UCLASS_I2C, busno, &bus); - if (ret) - return NULL; - ret = dm_i2c_probe(bus, slave, 0, &dev); - if (ret) - return NULL; - - return dev; -} -#endif - -/* - * The Gateworks System Controller will fail to ACK a master transaction if - * it is busy, which can occur during its 1HZ timer tick while reading ADC's. - * When this does occur, it will never be busy long enough to fail more than - * 2 back-to-back transfers. Thus we wrap i2c_read and i2c_write with - * 3 retries. - */ -int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len) -{ - int retry = 3; - int n = 0; - int ret; -#if CONFIG_IS_ENABLED(DM_I2C) - struct udevice *dev; - - dev = i2c_get_dev(CONFIG_I2C_GSC, chip); - if (!dev) - return -ENODEV; - ret = i2c_set_chip_offset_len(dev, alen); - if (ret) { - puts("EEPROM: Failed to set alen\n"); - return ret; - } -#else - i2c_set_bus_num(CONFIG_I2C_GSC); -#endif - - while (n++ < retry) { -#if CONFIG_IS_ENABLED(DM_I2C) - ret = dm_i2c_read(dev, addr, buf, len); -#else - ret = i2c_read(chip, addr, alen, buf, len); -#endif - if (!ret) - break; - debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr, - n, ret); - if (ret != -ENODEV) - break; - mdelay(10); - } - return ret; -} - -int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len) -{ - int retry = 3; - int n = 0; - int ret; -#if CONFIG_IS_ENABLED(DM_I2C) - struct udevice *dev; - - dev = i2c_get_dev(CONFIG_I2C_GSC, chip); - if (!dev) - return -ENODEV; - ret = i2c_set_chip_offset_len(dev, alen); - if (ret) { - puts("EEPROM: Failed to set alen\n"); - return ret; - } -#endif - - while (n++ < retry) { -#if CONFIG_IS_ENABLED(DM_I2C) - ret = dm_i2c_write(dev, addr, buf, len); -#else - ret = i2c_write(chip, addr, alen, buf, len); -#endif - if (!ret) - break; - debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr, - n, ret); - if (ret != -ENODEV) - break; - mdelay(10); - } - mdelay(100); - return ret; -} - -int gsc_get_board_temp(void) -{ - const void *fdt = gd->fdt_blob; - int node, reg, mode, val; - const char *label; - u8 buf[2]; - int ret; - - node = fdt_node_offset_by_compatible(fdt, -1, "gw,gsc-adc"); - if (node <= 0) - return node; - - /* iterate over hwmon nodes */ - node = fdt_first_subnode(fdt, node); - while (node > 0) { - reg = fdtdec_get_int(fdt, node, "reg", -1); - mode = fdtdec_get_int(fdt, node, "gw,mode", -1); - label = fdt_stringlist_get(fdt, node, "label", 0, NULL); - - if ((reg == -1) || (mode == -1) || !label) { - printf("invalid dt:%s\n", fdt_get_name(fdt, node, NULL)); - continue; - } - - if ((mode != 0) || strcmp(label, "temp")) - continue; - - memset(buf, 0, sizeof(buf)); - ret = gsc_i2c_read(GSC_HWMON_ADDR, reg, 1, buf, sizeof(buf)); - val = buf[0] | buf[1] << 8; - if (val >= 0) { - if (val > 0x8000) - val -= 0xffff; - return val; - } - node = fdt_next_subnode(fdt, node); - } - - return 0; -} - -/* display hardware monitor ADC channels */ -int gsc_hwmon(void) -{ - const void *fdt = gd->fdt_blob; - int node, reg, mode, len, val, offset; - const char *label; - u8 buf[2]; - int ret; - - node = fdt_node_offset_by_compatible(fdt, -1, "gw,gsc-adc"); - if (node <= 0) - return node; - - /* iterate over hwmon nodes */ - node = fdt_first_subnode(fdt, node); - while (node > 0) { - reg = fdtdec_get_int(fdt, node, "reg", -1); - mode = fdtdec_get_int(fdt, node, "gw,mode", -1); - offset = fdtdec_get_int(fdt, node, "gw,voltage-offset-microvolt", 0); - label = fdt_stringlist_get(fdt, node, "label", 0, NULL); - - if ((reg == -1) || (mode == -1) || !label) - printf("invalid dt:%s\n", fdt_get_name(fdt, node, NULL)); - - memset(buf, 0, sizeof(buf)); - ret = gsc_i2c_read(GSC_HWMON_ADDR, reg, 1, buf, sizeof(buf)); - val = buf[0] | buf[1] << 8; - if (val >= 0) { - const u32 *div; - int r[2]; - - switch (mode) { - case 0: /* temperature (C*10) */ - if (val > 0x8000) - val -= 0xffff; - printf("%-8s: %d.%ldC\n", label, val / 10, abs(val % 10)); - break; - case 1: /* prescaled voltage */ - if (val != 0xffff) - printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000); - break; - case 2: /* scaled based on ref volt and resolution */ - val *= 2500; - val /= 1 << 12; - - /* apply pre-scaler voltage divider */ - div = fdt_getprop(fdt, node, "gw,voltage-divider-ohms", &len); - if (div && (len == sizeof(uint32_t) * 2)) { - r[0] = fdt32_to_cpu(div[0]); - r[1] = fdt32_to_cpu(div[1]); - if (r[0] && r[1]) { - val *= (r[0] + r[1]); - val /= r[1]; - } - } - - /* adjust by offset */ - val += (offset / 1000); - - printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000); - break; - } - } - node = fdt_next_subnode(fdt, node); - } - - return 0; -} - -int gsc_info(int verbose) -{ - unsigned char buf[16]; - - if (gsc_i2c_read(GSC_SC_ADDR, 0, 1, buf, 16)) - return CMD_RET_FAILURE; - - printf("GSC: v%d", buf[GSC_SC_FWVER]); - printf(" 0x%04x", buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC+1]<<8); - printf(" WDT:%sabled", (buf[GSC_SC_CTRL1] & (1< 0; i--) { - if (str[i] == '-') - break; - if (str[i] >= '1' && str[i] <= '9') { - rev_bom = str[i] - '0'; - break; - } - } - return rev_bom; -} - -/* determine PCB revision from model */ -char get_pcb_rev(const char *str) -{ - char rev_pcb = 'A'; - int i; - - for (i = strlen(str) - 1; i > 0; i--) { - if (str[i] == '-') - break; - if (str[i] >= 'A') { - rev_pcb = str[i]; - break; - } - } - return rev_pcb; -} - -/* - * get dt name based on model and detail level: - */ -const char *gsc_get_dtb_name(int level, char *buf, int sz) -{ - const char *model = (const char *)ventana_info.model; - const char *pre = is_mx6dq() ? "imx6q-" : "imx6dl-"; - int modelno, rev_pcb, rev_bom; - - /* a few board models are dt equivalents to other models */ - if (strncasecmp(model, "gw5906", 6) == 0) - model = "gw552x-d"; - else if (strncasecmp(model, "gw5908", 6) == 0) - model = "gw53xx-f"; - else if (strncasecmp(model, "gw5905", 6) == 0) - model = "gw5904-a"; - - modelno = ((model[2] - '0') * 1000) - + ((model[3] - '0') * 100) - + ((model[4] - '0') * 10) - + (model[5] - '0'); - rev_pcb = tolower(get_pcb_rev(model)); - rev_bom = get_bom_rev(model); - - /* compare model/rev/bom in order of most specific to least */ - snprintf(buf, sz, "%s%04d", pre, modelno); - switch (level) { - case 0: /* full model first (ie gw5400-a1) */ - if (rev_bom) { - snprintf(buf, sz, "%sgw%04d-%c%d", pre, modelno, rev_pcb, rev_bom); - break; - } - fallthrough; - case 1: /* don't care about bom rev (ie gw5400-a) */ - snprintf(buf, sz, "%sgw%04d-%c", pre, modelno, rev_pcb); - break; - case 2: /* don't care about the pcb rev (ie gw5400) */ - snprintf(buf, sz, "%sgw%04d", pre, modelno); - break; - case 3: /* look for generic model (ie gw540x) */ - snprintf(buf, sz, "%sgw%03dx", pre, modelno / 10); - break; - case 4: /* look for more generic model (ie gw54xx) */ - snprintf(buf, sz, "%sgw%02dxx", pre, modelno / 100); - break; - default: /* give up */ - return NULL; - } - - return buf; -} - -#if defined(CONFIG_CMD_GSC) && !defined(CONFIG_SPL_BUILD) -static int do_gsc_sleep(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) -{ - unsigned char reg; - unsigned long secs = 0; - - if (argc < 2) - return CMD_RET_USAGE; - - secs = dectoul(argv[1], NULL); - printf("GSC Sleeping for %ld seconds\n", secs); - - reg = (secs >> 24) & 0xff; - if (gsc_i2c_write(GSC_SC_ADDR, 9, 1, ®, 1)) - goto error; - reg = (secs >> 16) & 0xff; - if (gsc_i2c_write(GSC_SC_ADDR, 8, 1, ®, 1)) - goto error; - reg = (secs >> 8) & 0xff; - if (gsc_i2c_write(GSC_SC_ADDR, 7, 1, ®, 1)) - goto error; - reg = secs & 0xff; - if (gsc_i2c_write(GSC_SC_ADDR, 6, 1, ®, 1)) - goto error; - if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1)) - goto error; - reg |= (1 << 2); - if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1)) - goto error; - reg &= ~(1 << 2); - reg |= 0x3; - if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1)) - goto error; - - return CMD_RET_SUCCESS; - -error: - printf("i2c error\n"); - return CMD_RET_FAILURE; -} - -static int do_gsc_wd(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) -{ - unsigned char reg; - - if (argc < 2) - return CMD_RET_USAGE; - - if (strcasecmp(argv[1], "enable") == 0) { - int timeout = 0; - - if (argc > 2) - timeout = dectoul(argv[2], NULL); - if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1)) - return CMD_RET_FAILURE; - reg &= ~((1 << GSC_SC_CTRL1_WDEN) | (1 << GSC_SC_CTRL1_WDTIME)); - if (timeout == 60) - reg |= (1 << GSC_SC_CTRL1_WDTIME); - else - timeout = 30; - reg |= (1 << GSC_SC_CTRL1_WDEN); - if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1)) - return CMD_RET_FAILURE; - printf("GSC Watchdog enabled with timeout=%d seconds\n", - timeout); - } else if (strcasecmp(argv[1], "disable") == 0) { - if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1)) - return CMD_RET_FAILURE; - reg &= ~((1 << GSC_SC_CTRL1_WDEN) | (1 << GSC_SC_CTRL1_WDTIME)); - if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, ®, 1)) - return CMD_RET_FAILURE; - printf("GSC Watchdog disabled\n"); - } else { - return CMD_RET_USAGE; - } - return CMD_RET_SUCCESS; -} - -static int do_gsc(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - if (argc < 2) - return gsc_info(1); - - if (strcasecmp(argv[1], "wd") == 0) - return do_gsc_wd(cmdtp, flag, --argc, ++argv); - else if (strcasecmp(argv[1], "sleep") == 0) - return do_gsc_sleep(cmdtp, flag, --argc, ++argv); - - return CMD_RET_USAGE; -} - -U_BOOT_CMD( - gsc, 4, 1, do_gsc, "GSC configuration", - "[wd enable [30|60]]|[wd disable]|[sleep ]\n" - ); - -#endif /* CONFIG_CMD_GSC */ diff --git a/board/gateworks/gw_ventana/gsc.h b/board/gateworks/gw_ventana/gsc.h deleted file mode 100644 index 2e1d25bc6f04..000000000000 --- a/board/gateworks/gw_ventana/gsc.h +++ /dev/null @@ -1,72 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2013 Gateworks Corporation - * - * Author: Tim Harvey - */ - -#ifndef __ASSEMBLY__ - -/* i2c slave addresses */ -#define GSC_SC_ADDR 0x20 -#define GSC_RTC_ADDR 0x68 -#define GSC_HWMON_ADDR 0x29 -#define GSC_EEPROM_ADDR 0x51 - -/* System Controller registers */ -enum { - GSC_SC_CTRL0 = 0x00, - GSC_SC_CTRL1 = 0x01, - GSC_SC_STATUS = 0x0a, - GSC_SC_FWCRC = 0x0c, - GSC_SC_FWVER = 0x0e, -}; - -/* System Controller Control1 bits */ -enum { - GSC_SC_CTRL1_WDTIME = 4, /* 1 = 60s timeout, 0 = 30s timeout */ - GSC_SC_CTRL1_WDEN = 5, /* 1 = enable, 0 = disable */ - GSC_SC_CTRL1_WDDIS = 7, /* 1 = disable boot watchdog */ -}; - -/* System Controller Interrupt bits */ -enum { - GSC_SC_IRQ_PB = 0, /* Pushbutton switch */ - GSC_SC_IRQ_SECURE = 1, /* Secure Key erase operation complete */ - GSC_SC_IRQ_EEPROM_WP = 2, /* EEPROM write violation */ - GSC_SC_IRQ_GPIO = 4, /* GPIO change */ - GSC_SC_IRQ_TAMPER = 5, /* Tamper detect */ - GSC_SC_IRQ_WATCHDOG = 6, /* Watchdog trip */ - GSC_SC_IRQ_PBLONG = 7, /* Pushbutton long hold */ -}; - -/* Hardware Monitor registers */ -enum { - GSC_HWMON_TEMP = 0x00, - GSC_HWMON_VIN = 0x02, - GSC_HWMON_VDD_3P3 = 0x05, - GSC_HWMON_VBATT = 0x08, - GSC_HWMON_VDD_5P0 = 0x0b, - GSC_HWMON_VDD_CORE = 0x0e, - GSC_HWMON_VDD_SOC = 0x11, - GSC_HWMON_VDD_HIGH = 0x14, - GSC_HWMON_VDD_DDR = 0x17, - GSC_HWMON_VDD_EXT = 0x1a, - GSC_HWMON_VDD_1P8 = 0x1d, - GSC_HWMON_VDD_IO2 = 0x20, - GSC_HWMON_VDD_2P5 = 0x23, - GSC_HWMON_VDD_IO3 = 0x26, - GSC_HWMON_VDD_IO4 = 0x29, -}; - -/* - * I2C transactions to the GSC are done via these functions which - * perform retries in the case of a busy GSC NAK'ing the transaction - */ -int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len); -int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len); -int gsc_info(int verbose); -int gsc_boot_wd_disable(void); -const char *gsc_get_dtb_name(int level, char *buf, int sz); -struct udevice *i2c_get_dev(int busno, int slave); -#endif diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 8748878eb3dc..c06630a66b66 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -5,40 +5,29 @@ * Author: Tim Harvey */ +#include #include +#include +#include +#include +#include +#include +#include #include #include #include #include #include -#include -#include #include #include -#include -#include -#include +#include #include -#include -#include #include -#include -#include -#include -#include "gsc.h" #include "common.h" DECLARE_GLOBAL_DATA_PTR; - -/* - * EEPROM board info struct populated by read_eeprom so that we only have to - * read it once. - */ -struct ventana_board_info ventana_info; -static int board_type; - /* configure eth0 PHY board-specific LED behavior */ int board_phy_config(struct phy_device *phydev) { @@ -482,9 +471,12 @@ int board_init(void) gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; /* read Gateworks EEPROM into global struct (used later) */ - board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info); + board_type = read_eeprom(&ventana_info); - setup_iomux_gpio(board_type, &ventana_info); + setup_iomux_gpio(board_type); + + /* show GSC details */ + run_command("gsc", 0); return 0; } @@ -517,7 +509,6 @@ int board_fit_config_name_match(const char *name) int checkboard(void) { struct ventana_board_info *info = &ventana_info; - unsigned char buf[4]; const char *p; int quiet; /* Quiet or minimal output mode */ @@ -541,15 +532,6 @@ int checkboard(void) if (quiet) return 0; - /* Display GSC firmware revision/CRC/status */ - gsc_info(0); - - /* Display RTC */ - if (!gsc_i2c_read(GSC_RTC_ADDR, 0x00, 1, buf, 4)) { - printf("RTC: %d\n", - buf[0] | buf[1]<<8 | buf[2]<<16 | buf[3]<<24); - } - return 0; } #endif diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c index 3149e8831544..e85a00954cee 100644 --- a/board/gateworks/gw_ventana/gw_ventana_spl.c +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c @@ -6,26 +6,22 @@ #include #include +#include #include +#include #include -#include -#include +#include #include #include #include #include -#include -#include #include -#include -#include -#include +#include +#include #include -#include #include -#include +#include -#include "gsc.h" #include "common.h" #define RTT_NOM_120OHM /* use 120ohm Rtt_nom vs 60ohm (lower power) */ @@ -778,8 +774,6 @@ static void setup_ventana_i2c(int i2c) void setup_pmic(void) { struct pmic *p; - struct ventana_board_info ventana_info; - int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info); const int i2c_pmic = 1; u32 reg; char rev; @@ -817,7 +811,7 @@ void setup_pmic(void) reg |= (SWBST_5_00V | (SWBST_MODE_AUTO << SWBST_MODE_SHIFT)); pmic_reg_write(p, PFUZE100_SWBSTCON1, reg); - if (board == GW54xx && (rev == 'G')) { + if (board_type == GW54xx && (rev == 'G')) { /* Disable VGEN5 */ pmic_reg_write(p, PFUZE100_VGEN5VOL, 0); @@ -873,7 +867,7 @@ void setup_pmic(void) * is a bit shy of the Vmin of 1350mV in the datasheet * for LDO enabled mode but is as high as we can go. */ - switch (board) { + switch (board_type) { case GW560x: /* mask PGOOD during SW3 transition */ pmic_reg_write(p, LTC3676_DVB3B, @@ -931,7 +925,7 @@ void setup_pmic(void) /* configure MP5416 PMIC */ else if (!i2c_probe(0x69)) { puts("PMIC: MP5416\n"); - switch (board) { + switch (board_type) { case GW5910: /* SW1: VDD_ARM 1.2V -> (1.275 to 1.475) */ reg = MP5416_VSET_EN | MP5416_VSET_SW1_SVAL(1475000); @@ -974,11 +968,23 @@ void board_init_f(ulong dummy) /* UART clocks enabled and gd valid - init serial console */ preloader_console_init(); + /* + * On a board with a missing/depleted backup battery for GSC, the + * board may be ready to probe the GSC before its firmware is + * running. We will wait here indefinately for the GSC/EEPROM. + */ + while (1) { + if (!i2c_set_bus_num(BOARD_EEPROM_BUSNO) && + !i2c_probe(BOARD_EEPROM_ADDR)) + break; + mdelay(1); + } + /* read/validate EEPROM info to determine board model and SDRAM cfg */ - board_model = read_eeprom(CONFIG_I2C_GSC, &ventana_info); + board_model = read_eeprom(&ventana_info); /* configure model-specific gpio */ - setup_iomux_gpio(board_model, &ventana_info); + setup_iomux_gpio(board_model); /* provide some some default: 32bit 128MB */ if (GW_UNKNOWN == board_model) @@ -1006,7 +1012,6 @@ void board_boot_order(u32 *spl_boot_list) /* called from board_init_r after gd setup if CONFIG_SPL_BOARD_INIT defined */ /* its our chance to print info about boot device */ -static int board_type; void spl_board_init(void) { u32 boot_device; @@ -1015,7 +1020,7 @@ void spl_board_init(void) boot_device = spl_boot_device(); /* read eeprom again now that we have gd */ - board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info); + board_type = read_eeprom(&ventana_info); if (board_type == GW_UNKNOWN) hang(); diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 8f73f102c119..8ab0bdad21b6 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -14,11 +14,11 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_CMD_EECONFIG=y -CONFIG_CMD_GSC=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xD1400 diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 0d128872317d..d25a8324b1df 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -14,11 +14,11 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_CMD_EECONFIG=y -CONFIG_CMD_GSC=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xD1400 diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 07a2b8c95725..57b0b344473e 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -14,11 +14,11 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_CMD_EECONFIG=y -CONFIG_CMD_GSC=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x1080000 diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 7f21c537b55a..baa28038fd36 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -31,9 +31,6 @@ #undef CONFIG_SYS_BOOTM_LEN #define CONFIG_SYS_BOOTM_LEN (64 << 20) -/* I2C Configs */ -#define CONFIG_I2C_GSC 0 - /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index a6bc234f51ed..b39cab84752c 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -429,7 +429,6 @@ CONFIG_HUSH_INIT_VAR CONFIG_HWCONFIG CONFIG_HW_ENV_SETTINGS CONFIG_I2C_ENV_EEPROM_BUS -CONFIG_I2C_GSC CONFIG_I2C_MULTI_BUS CONFIG_I2C_MVTWSI CONFIG_I2C_MVTWSI_BASE From patchwork Tue Mar 8 00:24:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Harvey X-Patchwork-Id: 1602645 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCGMw5RCgz9s5S for ; Tue, 8 Mar 2022 11:26:20 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E886B83977; Tue, 8 Mar 2022 01:26:10 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; 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Tue, 08 Mar 2022 00:24:14 +0000 From: Tim Harvey To: u-boot@lists.denx.de, Stefano Babic , Fabio Estevam Cc: Tim Harvey Subject: [PATCH 7/7] board: gateworks: venice: use common GSC driver Date: Mon, 7 Mar 2022 16:24:06 -0800 Message-Id: <20220308002406.22433-8-tharvey@gateworks.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220308002406.22433-1-tharvey@gateworks.com> References: <20220308002406.22433-1-tharvey@gateworks.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Use the common GSC driver. This allows us to do some additional cleanup: - rename gsc{.c,.h} to eeprom{.c.h} for clarity - collapse eeprom_get_dev - remove unnecessary header files and alphabatize includes Signed-off-by: Tim Harvey --- arch/arm/dts/imx8mm-venice-u-boot.dtsi | 4 + arch/arm/dts/imx8mm-venice.dts | 7 + arch/arm/dts/imx8mn-venice-u-boot.dtsi | 4 + arch/arm/dts/imx8mn-venice.dts | 7 + arch/arm/mach-imx/imx8m/Kconfig | 4 + board/gateworks/venice/Makefile | 2 +- board/gateworks/venice/eeprom.c | 353 +++++++++++ board/gateworks/venice/{gsc.h => eeprom.h} | 26 +- board/gateworks/venice/gsc.c | 700 --------------------- board/gateworks/venice/spl.c | 53 +- board/gateworks/venice/venice.c | 27 +- configs/imx8mm_venice_defconfig | 1 + configs/imx8mn_venice_defconfig | 3 +- 13 files changed, 426 insertions(+), 765 deletions(-) create mode 100644 board/gateworks/venice/eeprom.c rename board/gateworks/venice/{gsc.h => eeprom.h} (55%) delete mode 100644 board/gateworks/venice/gsc.c diff --git a/arch/arm/dts/imx8mm-venice-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-u-boot.dtsi index 42b2903f0409..c61c6de935fb 100644 --- a/arch/arm/dts/imx8mm-venice-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-u-boot.dtsi @@ -57,6 +57,10 @@ u-boot,dm-spl; }; +&gsc { + u-boot,dm-spl; +}; + &i2c2 { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mm-venice.dts b/arch/arm/dts/imx8mm-venice.dts index 54505a03c6fa..39b030691e53 100644 --- a/arch/arm/dts/imx8mm-venice.dts +++ b/arch/arm/dts/imx8mm-venice.dts @@ -27,6 +27,13 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; + gsc: gsc@20 { + compatible = "gw,gsc"; + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + }; + eeprom@51 { compatible = "atmel,24c02"; reg = <0x51>; diff --git a/arch/arm/dts/imx8mn-venice-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-u-boot.dtsi index 055406e77b30..4f23da356763 100644 --- a/arch/arm/dts/imx8mn-venice-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-venice-u-boot.dtsi @@ -94,6 +94,10 @@ u-boot,dm-spl; }; +&gsc { + u-boot,dm-spl; +}; + &i2c2 { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mn-venice.dts b/arch/arm/dts/imx8mn-venice.dts index e906a560581d..eeae225632d7 100644 --- a/arch/arm/dts/imx8mn-venice.dts +++ b/arch/arm/dts/imx8mn-venice.dts @@ -27,6 +27,13 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; + gsc: gsc@20 { + compatible = "gw,gsc"; + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + }; + eeprom@51 { compatible = "atmel,24c02"; reg = <0x51>; diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index fae704999533..bde35b489629 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -77,6 +77,8 @@ config TARGET_IMX8MM_VENICE select IMX8MM select SUPPORT_SPL select IMX8M_LPDDR4 + select GATEWORKS_SC + select MISC config TARGET_KONTRON_MX8MM bool "Kontron Electronics N80xx" @@ -105,6 +107,8 @@ config TARGET_IMX8MN_VENICE select IMX8MN select SUPPORT_SPL select IMX8M_LPDDR4 + select GATEWORKS_SC + select MISC config TARGET_IMX8MP_EVK bool "imx8mp LPDDR4 EVK board" diff --git a/board/gateworks/venice/Makefile b/board/gateworks/venice/Makefile index b8b53fdc0e80..fbb716ee852d 100644 --- a/board/gateworks/venice/Makefile +++ b/board/gateworks/venice/Makefile @@ -4,7 +4,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += venice.o gsc.o +obj-y += venice.o eeprom.o ifdef CONFIG_SPL_BUILD obj-y += spl.o diff --git a/board/gateworks/venice/eeprom.c b/board/gateworks/venice/eeprom.c new file mode 100644 index 000000000000..64aa0278882d --- /dev/null +++ b/board/gateworks/venice/eeprom.c @@ -0,0 +1,353 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2021 Gateworks Corporation + */ + +#include +#include +#include +#include +#include + +#include "eeprom.h" + +/* I2C */ +#define SOM_EEPROM_BUSNO 0 +#define SOM_EEPROM_ADDR 0x51 +#define BASEBOARD_EEPROM_BUSNO 1 +#define BASEBOARD_EEPROM_ADDR 0x52 + +struct venice_board_info som_info; +struct venice_board_info base_info; +char venice_model[32]; +u32 venice_serial; + +/* return a mac address from EEPROM info */ +int eeprom_getmac(int index, uint8_t *address) +{ + int i, j; + u32 maclow, machigh; + u64 mac; + + j = 0; + if (som_info.macno) { + maclow = som_info.mac[5]; + maclow |= som_info.mac[4] << 8; + maclow |= som_info.mac[3] << 16; + maclow |= som_info.mac[2] << 24; + machigh = som_info.mac[1]; + machigh |= som_info.mac[0] << 8; + mac = machigh; + mac <<= 32; + mac |= maclow; + for (i = 0; i < som_info.macno; i++, j++) { + if (index == j) + goto out; + } + } + + maclow = base_info.mac[5]; + maclow |= base_info.mac[4] << 8; + maclow |= base_info.mac[3] << 16; + maclow |= base_info.mac[2] << 24; + machigh = base_info.mac[1]; + machigh |= base_info.mac[0] << 8; + mac = machigh; + mac <<= 32; + mac |= maclow; + for (i = 0; i < base_info.macno; i++, j++) { + if (index == j) + goto out; + } + + return -EINVAL; + +out: + mac += i; + address[0] = (mac >> 40) & 0xff; + address[1] = (mac >> 32) & 0xff; + address[2] = (mac >> 24) & 0xff; + address[3] = (mac >> 16) & 0xff; + address[4] = (mac >> 8) & 0xff; + address[5] = (mac >> 0) & 0xff; + + return 0; +} + +static int eeprom_read(int busno, int slave, int alen, struct venice_board_info *info) +{ + int i; + int chksum; + unsigned char *buf = (unsigned char *)info; + struct udevice *dev, *bus; + int ret; + + /* probe device */ + ret = uclass_get_device_by_seq(UCLASS_I2C, busno, &bus); + if (ret) + return ret; + ret = dm_i2c_probe(bus, slave, 0, &dev); + if (ret) + return ret; + + /* read eeprom config section */ + memset(info, 0, sizeof(*info)); + ret = i2c_set_chip_offset_len(dev, alen); + if (ret) { + puts("EEPROM: Failed to set alen\n"); + return ret; + } + ret = dm_i2c_read(dev, 0x00, buf, sizeof(*info)); + if (ret) { + if (slave == SOM_EEPROM_ADDR) + printf("EEPROM: Failed to read EEPROM\n"); + return ret; + } + + /* validate checksum */ + for (chksum = 0, i = 0; i < (int)sizeof(*info) - 2; i++) + chksum += buf[i]; + if ((info->chksum[0] != chksum >> 8) || + (info->chksum[1] != (chksum & 0xff))) { + printf("EEPROM: I2C%d@0x%02x: Invalid Checksum\n", busno, slave); + print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info)); + memset(info, 0, sizeof(*info)); + return -EINVAL; + } + + /* sanity check valid model */ + if (info->model[0] != 'G' || info->model[1] != 'W') { + printf("EEPROM: I2C%d@0x%02x: Invalid Model in EEPROM\n", busno, slave); + print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info)); + memset(info, 0, sizeof(*info)); + return -EINVAL; + } + + return 0; +} + +/* determine BOM revision from model */ +int get_bom_rev(const char *str) +{ + int rev_bom = 0; + int i; + + for (i = strlen(str) - 1; i > 0; i--) { + if (str[i] == '-') + break; + if (str[i] >= '1' && str[i] <= '9') { + rev_bom = str[i] - '0'; + break; + } + } + return rev_bom; +} + +/* determine PCB revision from model */ +char get_pcb_rev(const char *str) +{ + char rev_pcb = 'A'; + int i; + + for (i = strlen(str) - 1; i > 0; i--) { + if (str[i] == '-') + break; + if (str[i] >= 'A') { + rev_pcb = str[i]; + break; + } + } + return rev_pcb; +} + +/* + * get dt name based on model and detail level: + * + * For boards that are a combination of a SoM plus a Baseboard: + * Venice SoM part numbers are GW70xx where xx is: + * 7000-7019: same PCB with som dt of '0x' + * 7020-7039: same PCB with som dt of '2x' + * 7040-7059: same PCB with som dt of '4x' + * 7060-7079: same PCB with som dt of '6x' + * 7080-7099: same PCB with som dt of '8x' + * Venice Baseboard part numbers are GW7xxx where xxx is: + * 7100-7199: same PCB with base dt of '71xx' + * 7200-7299: same PCB with base dt of '72xx' + * 7300-7399: same PCB with base dt of '73xx' + * 7400-7499: same PCB with base dt of '74xx' + * 7500-7599: same PCB with base dt of '75xx' + * 7600-7699: same PCB with base dt of '76xx' + * 7700-7799: same PCB with base dt of '77xx' + * 7800-7899: same PCB with base dt of '78xx' + * DT name is comprised of: + * gw--[base-pcb-rev][base-bom-rev][som-pcb-rev][som-bom-rev] + * + * For board models from 7900-7999 each PCB is unique with its own dt: + * DT name is comprised: + * gw-[pcb-rev][bom-rev] + * + */ +#define snprintfcat(dest, sz, fmt, ...) \ + snprintf((dest) + strlen(dest), (sz) - strlen(dest), fmt, ##__VA_ARGS__) +const char *eeprom_get_dtb_name(int level, char *buf, int sz) +{ +#ifdef CONFIG_IMX8MM + const char *pre = "imx8mm-venice-gw"; +#else + const char *pre = "imx8mn-venice-gw"; +#endif + int model, rev_pcb, rev_bom; + + model = ((som_info.model[2] - '0') * 1000) + + ((som_info.model[3] - '0') * 100) + + ((som_info.model[4] - '0') * 10) + + (som_info.model[5] - '0'); + rev_pcb = tolower(get_pcb_rev(som_info.model)); + rev_bom = get_bom_rev(som_info.model); + + /* som + baseboard*/ + if (base_info.model[0]) { + /* baseboard id: 7100-7199->71; 7200-7299->72; etc */ + int base = ((base_info.model[2] - '0') * 10) + (base_info.model[3] - '0'); + /* som id: 7000-7019->1; 7020-7039->2; etc */ + int som = ((model % 100) / 20) * 2; + int rev_base_pcb = tolower(get_pcb_rev(base_info.model)); + int rev_base_bom = get_bom_rev(base_info.model); + + snprintf(buf, sz, "%s%2dxx-%dx", pre, base, som); + switch (level) { + case 0: /* full model (ie gw73xx-0x-a1a1) */ + if (rev_base_bom) + snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom); + else + snprintfcat(buf, sz, "-%c", rev_base_pcb); + if (rev_bom) + snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom); + else + snprintfcat(buf, sz, "%c", rev_pcb); + break; + case 1: /* don't care about SoM revision */ + if (rev_base_bom) + snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom); + else + snprintfcat(buf, sz, "-%c", rev_base_pcb); + snprintfcat(buf, sz, "xx"); + break; + case 2: /* don't care about baseboard revision */ + snprintfcat(buf, sz, "-xx"); + if (rev_bom) + snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom); + else + snprintfcat(buf, sz, "%c", rev_pcb); + break; + case 3: /* don't care about SoM/baseboard revision */ + break; + default: + return NULL; + } + } else { + snprintf(buf, sz, "%s%04d", pre, model); + switch (level) { + case 0: /* full model wth PCB and BOM revision first (ie gw7901-a1) */ + if (rev_bom) + snprintfcat(buf, sz, "-%c%d", rev_pcb, rev_bom); + else + snprintfcat(buf, sz, "-%c", rev_pcb); + break; + case 1: /* don't care about BOM revision */ + snprintfcat(buf, sz, "-%c", rev_pcb); + break; + case 2: /* don't care about PCB or BOM revision */ + break; + default: + return NULL; + } + } + + return buf; +} + +static int eeprom_info(bool verbose) +{ + printf("Model : %s\n", venice_model); + printf("Serial : %d\n", som_info.serial); + printf("MFGDate : %02x-%02x-%02x%02x\n", + som_info.mfgdate[0], som_info.mfgdate[1], + som_info.mfgdate[2], som_info.mfgdate[3]); + if (base_info.model[0] && verbose) { + printf("SOM : %s %d %02x-%02x-%02x%02x\n", + som_info.model, som_info.serial, + som_info.mfgdate[0], som_info.mfgdate[1], + som_info.mfgdate[2], som_info.mfgdate[3]); + printf("BASE : %s %d %02x-%02x-%02x%02x\n", + base_info.model, base_info.serial, + base_info.mfgdate[0], base_info.mfgdate[1], + base_info.mfgdate[2], base_info.mfgdate[3]); + } + + return 0; +} + +int eeprom_init(int quiet) +{ + char rev_pcb; + int rev_bom; + int ret; + + ret = eeprom_read(SOM_EEPROM_BUSNO, SOM_EEPROM_ADDR, 1, &som_info); + if (ret) { + puts("ERROR: Failed to probe EEPROM\n"); + memset(&som_info, 0, sizeof(som_info)); + return 0; + } + + /* read optional baseboard EEPROM */ + eeprom_read(BASEBOARD_EEPROM_BUSNO, BASEBOARD_EEPROM_ADDR, 2, &base_info); + + /* create model strings */ + if (base_info.model[0]) { + sprintf(venice_model, "GW%c%c%c%c-%c%c-", + som_info.model[2], /* family */ + base_info.model[3], /* baseboard */ + base_info.model[4], base_info.model[5], /* subload of baseboard */ + som_info.model[4], som_info.model[5]); /* last 2digits of SOM */ + + /* baseboard revision */ + rev_pcb = get_pcb_rev(base_info.model); + rev_bom = get_bom_rev(base_info.model); + if (rev_bom) + sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom); + else + sprintf(venice_model + strlen(venice_model), "%c", rev_pcb); + /* som revision */ + rev_pcb = get_pcb_rev(som_info.model); + rev_bom = get_bom_rev(som_info.model); + if (rev_bom) + sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom); + else + sprintf(venice_model + strlen(venice_model), "%c", rev_pcb); + } else { + strcpy(venice_model, som_info.model); + } + venice_serial = som_info.serial; + + if (!quiet) + eeprom_info(false); + + return ((16 << som_info.sdram_size) / 1024); +} + +void board_gsc_info(void) +{ + eeprom_info(true); +} + +const char *eeprom_get_model(void) +{ + return venice_model; +} + +u32 eeprom_get_serial(void) +{ + return venice_serial; +} diff --git a/board/gateworks/venice/gsc.h b/board/gateworks/venice/eeprom.h similarity index 55% rename from board/gateworks/venice/gsc.h rename to board/gateworks/venice/eeprom.h index b391b2e32684..37bfe76ad81e 100644 --- a/board/gateworks/venice/gsc.h +++ b/board/gateworks/venice/eeprom.h @@ -3,19 +3,8 @@ * Copyright 2021 Gateworks Corporation */ -#ifndef _GSC_H_ -#define _GSC_H_ - -/* I2C bus numbers */ -#define GSC_BUSNO 0 -#define BASEBOARD_EEPROM_BUSNO 1 - -/* I2C slave addresses */ -#define GSC_SC_ADDR 0x20 -#define GSC_RTC_ADDR 0x68 -#define GSC_HWMON_ADDR 0x29 -#define GSC_EEPROM_ADDR 0x51 -#define BASEBOARD_EEPROM_ADDR 0x52 +#ifndef _VENICE_EEPROM_H_ +#define _VENICE_EEPROM_H_ struct venice_board_info { u8 mac[6]; /* 0x00: MAC base */ @@ -35,11 +24,10 @@ struct venice_board_info { u8 chksum[2]; /* 0x4E */ }; -int gsc_init(int quiet); -int gsc_hwmon(void); -const char *gsc_get_model(void); -const char *gsc_get_dtb_name(int level, char *buf, int len); -int gsc_getmac(int index, uint8_t *enetaddr); -uint32_t gsc_get_serial(void); +int eeprom_init(int quiet); +const char *eeprom_get_model(void); +const char *eeprom_get_dtb_name(int level, char *buf, int len); +int eeprom_getmac(int index, uint8_t *enetaddr); +uint32_t eeprom_get_serial(void); #endif diff --git a/board/gateworks/venice/gsc.c b/board/gateworks/venice/gsc.c deleted file mode 100644 index a184ce822854..000000000000 --- a/board/gateworks/venice/gsc.c +++ /dev/null @@ -1,700 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2021 Gateworks Corporation - */ - -#include -#include -#include -#include -#include -#include -#include - -#include "gsc.h" - -DECLARE_GLOBAL_DATA_PTR; - -struct venice_board_info som_info; -struct venice_board_info base_info; -char venice_model[32]; -uint32_t venice_serial; - -/* return a mac address from EEPROM info */ -int gsc_getmac(int index, uint8_t *address) -{ - int i, j; - u32 maclow, machigh; - u64 mac; - - j = 0; - if (som_info.macno) { - maclow = som_info.mac[5]; - maclow |= som_info.mac[4] << 8; - maclow |= som_info.mac[3] << 16; - maclow |= som_info.mac[2] << 24; - machigh = som_info.mac[1]; - machigh |= som_info.mac[0] << 8; - mac = machigh; - mac <<= 32; - mac |= maclow; - for (i = 0; i < som_info.macno; i++, j++) { - if (index == j) - goto out; - } - } - - maclow = base_info.mac[5]; - maclow |= base_info.mac[4] << 8; - maclow |= base_info.mac[3] << 16; - maclow |= base_info.mac[2] << 24; - machigh = base_info.mac[1]; - machigh |= base_info.mac[0] << 8; - mac = machigh; - mac <<= 32; - mac |= maclow; - for (i = 0; i < base_info.macno; i++, j++) { - if (index == j) - goto out; - } - - return -EINVAL; - -out: - mac += i; - address[0] = (mac >> 40) & 0xff; - address[1] = (mac >> 32) & 0xff; - address[2] = (mac >> 24) & 0xff; - address[3] = (mac >> 16) & 0xff; - address[4] = (mac >> 8) & 0xff; - address[5] = (mac >> 0) & 0xff; - - return 0; -} - -/* System Controller registers */ -enum { - GSC_SC_CTRL0 = 0, - GSC_SC_CTRL1 = 1, - GSC_SC_STATUS = 10, - GSC_SC_FWCRC = 12, - GSC_SC_FWVER = 14, - GSC_SC_WP = 15, - GSC_SC_RST_CAUSE = 16, - GSC_SC_THERM_PROTECT = 19, -}; - -/* System Controller Control1 bits */ -enum { - GSC_SC_CTRL1_WDTIME = 4, /* 1 = 60s timeout, 0 = 30s timeout */ - GSC_SC_CTRL1_WDEN = 5, /* 1 = enable, 0 = disable */ - GSC_SC_CTRL1_BOOT_CHK = 6, /* 1 = enable alt boot check */ - GSC_SC_CTRL1_WDDIS = 7, /* 1 = disable boot watchdog */ -}; - -/* System Controller Interrupt bits */ -enum { - GSC_SC_IRQ_PB = 0, /* Pushbutton switch */ - GSC_SC_IRQ_SECURE = 1, /* Secure Key erase operation complete */ - GSC_SC_IRQ_EEPROM_WP = 2, /* EEPROM write violation */ - GSC_SC_IRQ_GPIO = 4, /* GPIO change */ - GSC_SC_IRQ_TAMPER = 5, /* Tamper detect */ - GSC_SC_IRQ_WATCHDOG = 6, /* Watchdog trip */ - GSC_SC_IRQ_PBLONG = 7, /* Pushbutton long hold */ -}; - -/* System Controller WP bits */ -enum { - GSC_SC_WP_ALL = 0, /* Write Protect All EEPROM regions */ - GSC_SC_WP_BOARDINFO = 1, /* Write Protect Board Info region */ -}; - -/* System Controller Reset Cause */ -enum { - GSC_SC_RST_CAUSE_VIN = 0, - GSC_SC_RST_CAUSE_PB = 1, - GSC_SC_RST_CAUSE_WDT = 2, - GSC_SC_RST_CAUSE_CPU = 3, - GSC_SC_RST_CAUSE_TEMP_LOCAL = 4, - GSC_SC_RST_CAUSE_TEMP_REMOTE = 5, - GSC_SC_RST_CAUSE_SLEEP = 6, - GSC_SC_RST_CAUSE_BOOT_WDT = 7, - GSC_SC_RST_CAUSE_BOOT_WDT_MAN = 8, - GSC_SC_RST_CAUSE_SOFT_PWR = 9, - GSC_SC_RST_CAUSE_MAX = 10, -}; - -#include -static struct udevice *gsc_get_dev(int busno, int slave) -{ - struct udevice *dev, *bus; - int ret; - - ret = uclass_get_device_by_seq(UCLASS_I2C, busno, &bus); - if (ret) { - printf("GSC : failed I2C%d probe: %d\n", busno, ret); - return NULL; - } - ret = dm_i2c_probe(bus, slave, 0, &dev); - if (ret) - return NULL; - - return dev; -} - -static int gsc_read_eeprom(int bus, int slave, int alen, struct venice_board_info *info) -{ - int i; - int chksum; - unsigned char *buf = (unsigned char *)info; - struct udevice *dev; - int ret; - - /* probe device */ - dev = gsc_get_dev(bus, slave); - if (!dev) { - if (slave == GSC_EEPROM_ADDR) - puts("ERROR: Failed to probe EEPROM\n"); - return -ENODEV; - } - - /* read eeprom config section */ - memset(info, 0, sizeof(*info)); - ret = i2c_set_chip_offset_len(dev, alen); - if (ret) { - puts("EEPROM: Failed to set alen\n"); - return ret; - } - ret = dm_i2c_read(dev, 0x00, buf, sizeof(*info)); - if (ret) { - if (slave == GSC_EEPROM_ADDR) - printf("EEPROM: Failed to read EEPROM\n"); - return ret; - } - - /* validate checksum */ - for (chksum = 0, i = 0; i < (int)sizeof(*info) - 2; i++) - chksum += buf[i]; - if ((info->chksum[0] != chksum >> 8) || - (info->chksum[1] != (chksum & 0xff))) { - printf("EEPROM: I2C%d@0x%02x: Invalid Checksum\n", bus, slave); - print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info)); - memset(info, 0, sizeof(*info)); - return -EINVAL; - } - - /* sanity check valid model */ - if (info->model[0] != 'G' || info->model[1] != 'W') { - printf("EEPROM: I2C%d@0x%02x: Invalid Model in EEPROM\n", bus, slave); - print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info)); - memset(info, 0, sizeof(*info)); - return -EINVAL; - } - - return 0; -} - -static const char *gsc_get_rst_cause(struct udevice *dev) -{ - static char str[64]; - static const char * const names[] = { - "VIN", - "PB", - "WDT", - "CPU", - "TEMP_L", - "TEMP_R", - "SLEEP", - "BOOT_WDT1", - "BOOT_WDT2", - "SOFT_PWR", - }; - unsigned char reg; - - /* reset cause */ - str[0] = 0; - if (!dm_i2c_read(dev, GSC_SC_RST_CAUSE, ®, 1)) { - if (reg < ARRAY_SIZE(names)) - sprintf(str, "%s", names[reg]); - else - sprintf(str, "0x%02x", reg); - } - - /* thermal protection */ - if (!dm_i2c_read(dev, GSC_SC_THERM_PROTECT, ®, 1)) { - strcat(str, " Thermal Protection "); - if (reg & BIT(0)) - strcat(str, "Enabled"); - else - strcat(str, "Disabled"); - } - - return str; -} - -/* display hardware monitor ADC channels */ -int gsc_hwmon(void) -{ - const void *fdt = gd->fdt_blob; - struct udevice *dev; - int node, reg, mode, len, val, offset; - const char *label; - u8 buf[2]; - int ret; - - node = fdt_node_offset_by_compatible(fdt, -1, "gw,gsc-adc"); - if (node <= 0) - return node; - - /* probe device */ - dev = gsc_get_dev(GSC_BUSNO, GSC_HWMON_ADDR); - if (!dev) { - puts("ERROR: Failed to probe GSC HWMON\n"); - return -ENODEV; - } - - /* iterate over hwmon nodes */ - node = fdt_first_subnode(fdt, node); - while (node > 0) { - reg = fdtdec_get_int(fdt, node, "reg", -1); - mode = fdtdec_get_int(fdt, node, "gw,mode", -1); - offset = fdtdec_get_int(fdt, node, "gw,voltage-offset-microvolt", 0); - label = fdt_stringlist_get(fdt, node, "label", 0, NULL); - - if ((reg == -1) || (mode == -1) || !label) - printf("invalid dt:%s\n", fdt_get_name(fdt, node, NULL)); - - memset(buf, 0, sizeof(buf)); - ret = dm_i2c_read(dev, reg, buf, sizeof(buf)); - if (ret) { - printf("i2c error: %d\n", ret); - continue; - } - val = buf[0] | buf[1] << 8; - if (val >= 0) { - const u32 *div; - int r[2]; - - switch (mode) { - case 0: /* temperature (C*10) */ - if (val > 0x8000) - val -= 0xffff; - printf("%-8s: %d.%ldC\n", label, val / 10, abs(val % 10)); - break; - case 1: /* prescaled voltage */ - if (val != 0xffff) - printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000); - break; - case 2: /* scaled based on ref volt and resolution */ - val *= 2500; - val /= 1 << 12; - - /* apply pre-scaler voltage divider */ - div = fdt_getprop(fdt, node, "gw,voltage-divider-ohms", &len); - if (div && (len == sizeof(uint32_t) * 2)) { - r[0] = fdt32_to_cpu(div[0]); - r[1] = fdt32_to_cpu(div[1]); - if (r[0] && r[1]) { - val *= (r[0] + r[1]); - val /= r[1]; - } - } - - /* adjust by offset */ - val += (offset / 1000); - - printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000); - break; - } - } - node = fdt_next_subnode(fdt, node); - } - - return 0; -} - -/* determine BOM revision from model */ -int get_bom_rev(const char *str) -{ - int rev_bom = 0; - int i; - - for (i = strlen(str) - 1; i > 0; i--) { - if (str[i] == '-') - break; - if (str[i] >= '1' && str[i] <= '9') { - rev_bom = str[i] - '0'; - break; - } - } - return rev_bom; -} - -/* determine PCB revision from model */ -char get_pcb_rev(const char *str) -{ - char rev_pcb = 'A'; - int i; - - for (i = strlen(str) - 1; i > 0; i--) { - if (str[i] == '-') - break; - if (str[i] >= 'A') { - rev_pcb = str[i]; - break; - } - } - return rev_pcb; -} - -/* - * get dt name based on model and detail level: - * - * For boards that are a combination of a SoM plus a Baseboard: - * Venice SoM part numbers are GW70xx where xx is: - * 7000-7019: same PCB with som dt of '0x' - * 7020-7039: same PCB with som dt of '2x' - * 7040-7059: same PCB with som dt of '4x' - * 7060-7079: same PCB with som dt of '6x' - * 7080-7099: same PCB with som dt of '8x' - * Venice Baseboard part numbers are GW7xxx where xxx is: - * 7100-7199: same PCB with base dt of '71xx' - * 7200-7299: same PCB with base dt of '72xx' - * 7300-7399: same PCB with base dt of '73xx' - * 7400-7499: same PCB with base dt of '74xx' - * 7500-7599: same PCB with base dt of '75xx' - * 7600-7699: same PCB with base dt of '76xx' - * 7700-7799: same PCB with base dt of '77xx' - * 7800-7899: same PCB with base dt of '78xx' - * DT name is comprised of: - * gw--[base-pcb-rev][base-bom-rev][som-pcb-rev][som-bom-rev] - * - * For board models from 7900-7999 each PCB is unique with its own dt: - * DT name is comprised: - * gw-[pcb-rev][bom-rev] - * - */ -#define snprintfcat(dest, sz, fmt, ...) \ - snprintf((dest) + strlen(dest), (sz) - strlen(dest), fmt, ##__VA_ARGS__) -const char *gsc_get_dtb_name(int level, char *buf, int sz) -{ -#ifdef CONFIG_IMX8MM - const char *pre = "imx8mm-venice-gw"; -#else - const char *pre = "imx8mn-venice-gw"; -#endif - int model, rev_pcb, rev_bom; - - model = ((som_info.model[2] - '0') * 1000) - + ((som_info.model[3] - '0') * 100) - + ((som_info.model[4] - '0') * 10) - + (som_info.model[5] - '0'); - rev_pcb = tolower(get_pcb_rev(som_info.model)); - rev_bom = get_bom_rev(som_info.model); - - /* som + baseboard*/ - if (base_info.model[0]) { - /* baseboard id: 7100-7199->71; 7200-7299->72; etc */ - int base = ((base_info.model[2] - '0') * 10) + (base_info.model[3] - '0'); - /* som id: 7000-7019->1; 7020-7039->2; etc */ - int som = ((model % 100) / 20) * 2; - int rev_base_pcb = tolower(get_pcb_rev(base_info.model)); - int rev_base_bom = get_bom_rev(base_info.model); - - snprintf(buf, sz, "%s%2dxx-%dx", pre, base, som); - switch (level) { - case 0: /* full model (ie gw73xx-0x-a1a1) */ - if (rev_base_bom) - snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom); - else - snprintfcat(buf, sz, "-%c", rev_base_pcb); - if (rev_bom) - snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom); - else - snprintfcat(buf, sz, "%c", rev_pcb); - break; - case 1: /* don't care about SoM revision */ - if (rev_base_bom) - snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom); - else - snprintfcat(buf, sz, "-%c", rev_base_pcb); - snprintfcat(buf, sz, "xx"); - break; - case 2: /* don't care about baseboard revision */ - snprintfcat(buf, sz, "-xx"); - if (rev_bom) - snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom); - else - snprintfcat(buf, sz, "%c", rev_pcb); - break; - case 3: /* don't care about SoM/baseboard revision */ - break; - default: - return NULL; - } - } else { - snprintf(buf, sz, "%s%04d", pre, model); - switch (level) { - case 0: /* full model wth PCB and BOM revision first (ie gw7901-a1) */ - if (rev_bom) - snprintfcat(buf, sz, "-%c%d", rev_pcb, rev_bom); - else - snprintfcat(buf, sz, "-%c", rev_pcb); - break; - case 1: /* don't care about BOM revision */ - snprintfcat(buf, sz, "-%c", rev_pcb); - break; - case 2: /* don't care about PCB or BOM revision */ - break; - default: - return NULL; - } - } - - return buf; -} - -static int gsc_read(void) -{ - char rev_pcb; - int rev_bom; - int ret; - - ret = gsc_read_eeprom(GSC_BUSNO, GSC_EEPROM_ADDR, 1, &som_info); - if (ret) { - memset(&som_info, 0, sizeof(som_info)); - return ret; - } - - /* read optional baseboard EEPROM */ - gsc_read_eeprom(BASEBOARD_EEPROM_BUSNO, BASEBOARD_EEPROM_ADDR, - 2, &base_info); - - /* create model strings */ - if (base_info.model[0]) { - sprintf(venice_model, "GW%c%c%c%c-%c%c-", - som_info.model[2], /* family */ - base_info.model[3], /* baseboard */ - base_info.model[4], base_info.model[5], /* subload of baseboard */ - som_info.model[4], som_info.model[5]); /* last 2digits of SOM */ - - /* baseboard revision */ - rev_pcb = get_pcb_rev(base_info.model); - rev_bom = get_bom_rev(base_info.model); - if (rev_bom) - sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom); - else - sprintf(venice_model + strlen(venice_model), "%c", rev_pcb); - /* som revision */ - rev_pcb = get_pcb_rev(som_info.model); - rev_bom = get_bom_rev(som_info.model); - if (rev_bom) - sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom); - else - sprintf(venice_model + strlen(venice_model), "%c", rev_pcb); - } else { - strcpy(venice_model, som_info.model); - } - venice_serial = som_info.serial; - - return 0; -} - -static int gsc_info(int verbose) -{ - struct udevice *dev; - unsigned char buf[16]; - - printf("Model : %s\n", venice_model); - printf("Serial : %d\n", som_info.serial); - printf("MFGDate : %02x-%02x-%02x%02x\n", - som_info.mfgdate[0], som_info.mfgdate[1], - som_info.mfgdate[2], som_info.mfgdate[3]); - if (base_info.model[0] && verbose > 1) { - printf("SOM : %s %d %02x-%02x-%02x%02x\n", - som_info.model, som_info.serial, - som_info.mfgdate[0], som_info.mfgdate[1], - som_info.mfgdate[2], som_info.mfgdate[3]); - printf("BASE : %s %d %02x-%02x-%02x%02x\n", - base_info.model, base_info.serial, - base_info.mfgdate[0], base_info.mfgdate[1], - base_info.mfgdate[2], base_info.mfgdate[3]); - } - - /* Display RTC */ - puts("RTC : "); - dev = gsc_get_dev(GSC_BUSNO, GSC_RTC_ADDR); - if (!dev) { - puts("Failed to probe GSC RTC\n"); - } else { - dm_i2c_read(dev, 0, buf, 6); - printf("%d\n", buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24); - } - - /* Display hwmon */ - gsc_hwmon(); - - return 0; -} - -int gsc_init(int quiet) -{ - unsigned char buf[16]; - struct udevice *dev; - int ret; - - /* - * On a board with a missing/depleted backup battery for GSC, the - * board may be ready to probe the GSC before its firmware is - * running. We will wait here indefinately for the GSC/EEPROM. - */ -#ifdef CONFIG_IMX8MN - // TODO: - // IMX8MN boots quicker than IMX8MM and exposes issue - // where because GSC I2C state machine isn't running and its - // SCL/SDA are driven low spams i2c errors - // - // Put a loop here that somehow waits for I2C CLK/DAT to be high - mdelay(40); -#endif - while (1) { - /* probe device */ - dev = gsc_get_dev(GSC_BUSNO, GSC_SC_ADDR); - if (dev) - break; - mdelay(1); - } - - ret = dm_i2c_read(dev, 0, buf, sizeof(buf)); - if (ret) { - puts("ERROR: Failed reading GSC\n"); - return ret; - } - gsc_read(); - - /* banner */ - if (!quiet) { - printf("GSC : v%d 0x%04x", buf[GSC_SC_FWVER], - buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC + 1] << 8); - printf(" RST:%s", gsc_get_rst_cause(dev)); - printf("\n"); - gsc_info(1); - } - - if (ret) - hang(); - - return ((16 << som_info.sdram_size) / 1024); -} - -const char *gsc_get_model(void) -{ - return venice_model; -} - -uint32_t gsc_get_serial(void) -{ - return venice_serial; -} - -#if !(IS_ENABLED(CONFIG_SPL_BUILD)) -static int gsc_sleep(unsigned long secs) -{ - unsigned char reg; - struct udevice *dev; - int ret; - - /* probe device */ - dev = gsc_get_dev(GSC_BUSNO, GSC_SC_ADDR); - if (!dev) - return -ENODEV; - - printf("GSC Sleeping for %ld seconds\n", secs); - reg = (secs >> 24) & 0xff; - ret = dm_i2c_write(dev, 9, ®, 1); - if (ret) - goto err; - reg = (secs >> 16) & 0xff; - ret = dm_i2c_write(dev, 8, ®, 1); - if (ret) - goto err; - reg = (secs >> 8) & 0xff; - ret = dm_i2c_write(dev, 7, ®, 1); - if (ret) - goto err; - reg = secs & 0xff; - ret = dm_i2c_write(dev, 6, ®, 1); - if (ret) - goto err; - ret = dm_i2c_read(dev, GSC_SC_CTRL1, ®, 1); - if (ret) - goto err; - reg |= (1 << 2); - ret = dm_i2c_write(dev, GSC_SC_CTRL1, ®, 1); - if (ret) - goto err; - reg &= ~(1 << 2); - reg |= 0x3; - ret = dm_i2c_write(dev, GSC_SC_CTRL1, ®, 1); - if (ret) - goto err; - - return 0; - -err: - printf("i2c error\n"); - return ret; -} - -static int gsc_boot_wd_disable(void) -{ - u8 reg; - struct udevice *dev; - int ret; - - /* probe device */ - dev = gsc_get_dev(GSC_BUSNO, GSC_SC_ADDR); - if (!dev) - return -ENODEV; - - ret = dm_i2c_read(dev, GSC_SC_CTRL1, ®, 1); - if (ret) - goto err; - reg |= (1 << GSC_SC_CTRL1_WDDIS); - reg &= ~(1 << GSC_SC_CTRL1_BOOT_CHK); - ret = dm_i2c_write(dev, GSC_SC_CTRL1, ®, 1); - if (ret) - goto err; - puts("GSC : boot watchdog disabled\n"); - - return 0; - -err: - printf("i2c error"); - return ret; -} - -static int do_gsc(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]) -{ - if (argc < 2) - return gsc_info(2); - - if (strcasecmp(argv[1], "sleep") == 0) { - if (argc < 3) - return CMD_RET_USAGE; - if (!gsc_sleep(dectoul(argv[2], NULL))) - return CMD_RET_SUCCESS; - } else if (strcasecmp(argv[1], "hwmon") == 0) { - if (!gsc_hwmon()) - return CMD_RET_SUCCESS; - } else if (strcasecmp(argv[1], "wd-disable") == 0) { - if (!gsc_boot_wd_disable()) - return CMD_RET_SUCCESS; - } - - return CMD_RET_USAGE; -} - -U_BOOT_CMD(gsc, 4, 1, do_gsc, "Gateworks System Controller", - "[sleep ]|[hwmon]|[wd-disable]\n"); -#endif diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c index 533d44a07a09..0b1b50270102 100644 --- a/board/gateworks/venice/spl.c +++ b/board/gateworks/venice/spl.c @@ -7,13 +7,9 @@ #include #include #include -#include #include -#include #include -#include #include -#include #include #include #include @@ -21,22 +17,17 @@ #include #include #include - #include #include -#include -#include - +#include #include #include -#include "gsc.h" +#include "eeprom.h" #include "lpddr4_timing.h" #define PCIE_RSTN IMX_GPIO_NR(4, 6) -DECLARE_GLOBAL_DATA_PTR; - static void spl_dram_init(int size) { struct dram_timing_info *dram_timing; @@ -62,8 +53,8 @@ static void spl_dram_init(int size) dram_timing = &dram_timing_1gb_single_die; break; case 2: - if (!strcmp(gsc_get_model(), "GW7902-SP466-A") || - !strcmp(gsc_get_model(), "GW7902-SP466-B")) { + if (!strcmp(eeprom_get_model(), "GW7902-SP466-A") || + !strcmp(eeprom_get_model(), "GW7902-SP466-B")) { dram_timing = &dram_timing_2gb_dual_die; } else { dram_timing = &dram_timing_2gb_single_die; @@ -142,7 +133,7 @@ static int dm_i2c_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set) static int power_init_board(void) { - const char *model = gsc_get_model(); + const char *model = eeprom_get_model(); struct udevice *bus; struct udevice *dev; int ret; @@ -236,22 +227,36 @@ void board_init_f(ulong dummy) hang(); } - ret = uclass_get_device_by_name(UCLASS_CLK, - "clock-controller@30380000", - &dev); - if (ret < 0) { - printf("Failed to find clock node. Check device tree\n"); - hang(); - } - enable_tzc380(); /* need to hold PCIe switch in reset otherwise it can lock i2c bus EEPROM is on */ gpio_request(PCIE_RSTN, "perst#"); gpio_direction_output(PCIE_RSTN, 0); - /* GSC */ - dram_sz = gsc_init(0); + /* + * probe GSC device + * + * On a board with a missing/depleted backup battery for GSC, the + * board may be ready to probe the GSC before its firmware is + * running. We will wait here indefinately for the GSC EEPROM. + */ +#ifdef CONFIG_IMX8MN + /* + * IMX8MN boots quicker than IMX8MM and exposes issue + * where because GSC I2C state machine isn't running and its + * SCL/SDA are driven low the I2C driver spams 'Arbitration lost' + * I2C errors. + * + * TODO: Put a loop here that somehow waits for I2C CLK/DAT to be high + */ + mdelay(40); +#endif + while (1) { + if (!uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(gsc), &dev)) + break; + mdelay(1); + } + dram_sz = eeprom_init(0); /* PMIC */ power_init_board(); diff --git a/board/gateworks/venice/venice.c b/board/gateworks/venice/venice.c index 425c69056da5..b1828f4f187a 100644 --- a/board/gateworks/venice/venice.c +++ b/board/gateworks/venice/venice.c @@ -3,21 +3,12 @@ * Copyright 2021 Gateworks Corporation */ -#include #include #include -#include #include -#include - -#include #include -#include -#include - -#include "gsc.h" -DECLARE_GLOBAL_DATA_PTR; +#include "eeprom.h" int board_phys_sdram_size(phys_size_t *size) { @@ -37,7 +28,7 @@ int board_fit_config_name_match(const char *name) char buf[32]; do { - dtb = gsc_get_dtb_name(i++, buf, sizeof(buf)); + dtb = eeprom_get_dtb_name(i++, buf, sizeof(buf)); if (!strcmp(dtb, name)) { if (!init++) printf("DTB : %s\n", name); @@ -100,13 +91,11 @@ int board_phy_config(struct phy_device *phydev) int board_init(void) { - gsc_init(1); + eeprom_init(1); if (IS_ENABLED(CONFIG_FEC_MXC)) setup_fec(); - gsc_hwmon(); - return 0; } @@ -122,13 +111,13 @@ int board_late_init(void) /* Set board serial/model */ if (!env_get("serial#")) - env_set_ulong("serial#", gsc_get_serial()); - env_set("model", gsc_get_model()); + env_set_ulong("serial#", eeprom_get_serial()); + env_set("model", eeprom_get_model()); /* Set fdt_file vars */ i = 0; do { - str = gsc_get_dtb_name(i, fdt, sizeof(fdt)); + str = eeprom_get_dtb_name(i, fdt, sizeof(fdt)); if (str) { sprintf(env, "fdt_file%d", i + 1); strcat(fdt, ".dtb"); @@ -146,7 +135,7 @@ int board_late_init(void) sprintf(env, "ethaddr"); str = env_get(env); if (!str) { - ret = gsc_getmac(i, enetaddr); + ret = eeprom_getmac(i, enetaddr); if (!ret) eth_env_set_enetaddr(env, enetaddr); } @@ -166,7 +155,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) int off; /* set board model dt prop */ - fdt_setprop_string(blob, 0, "board", gsc_get_model()); + fdt_setprop_string(blob, 0, "board", eeprom_get_model()); /* update temp thresholds */ off = fdt_path_offset(blob, "/thermal-zones/cpu-thermal/trips"); diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 7ebbbca5a2e5..f3534663033f 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -77,6 +77,7 @@ CONFIG_DM_I2C=y CONFIG_LED=y CONFIG_LED_BLINK=y CONFIG_LED_GPIO=y +CONFIG_MISC=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_SPL_MMC_IO_VOLTAGE=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index ce50ecf64959..945bf5b757c5 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -70,8 +70,6 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_SPL_DM=y -CONFIG_SPL_CLK_COMPOSITE_CCF=y -CONFIG_CLK_COMPOSITE_CCF=y CONFIG_SPL_CLK_IMX8MN=y CONFIG_CLK_IMX8MN=y CONFIG_MXC_GPIO=y @@ -79,6 +77,7 @@ CONFIG_DM_I2C=y CONFIG_LED=y CONFIG_LED_BLINK=y CONFIG_LED_GPIO=y +CONFIG_SPL_MISC=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_SPL_MMC_IO_VOLTAGE=y