From patchwork Mon Feb 21 13:26:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felix Brack X-Patchwork-Id: 1595573 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4K2NP23qdRz9sGJ for ; Tue, 22 Feb 2022 00:26:30 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A2A4A83A95; Mon, 21 Feb 2022 14:26:17 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=ltec.ch Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 37A6A83B94; Mon, 21 Feb 2022 14:26:16 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail.ltec.ch (mail.ltec.ch [95.143.48.181]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 575DA8380E for ; Mon, 21 Feb 2022 14:26:13 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=ltec.ch Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=fb@ltec.ch Received: from nebula.ltec ([172.27.11.2] helo=pulsar.ltec) by mail.ltec.ch with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nM8hg-00CjGW-2d; Mon, 21 Feb 2022 14:26:12 +0100 From: Felix Brack To: u-boot@lists.denx.de Cc: Felix Brack , Tom Rini Subject: [PATCH] arm: pdu001: Setup pinmux for console UART as early as possible Date: Mon, 21 Feb 2022 14:26:05 +0100 Message-Id: <20220221132606.39480-1-fb@ltec.ch> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean To make sure we get a working console as soon as possible in the SPL the UART pins require to be configured earlier. This is especially true for the pins of UART3, since the PDU001 board uses this UART for the console by default. Signed-off-by: Felix Brack --- board/eets/pdu001/board.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/board/eets/pdu001/board.c b/board/eets/pdu001/board.c index 9f3cfd4f84..4aeb84071b 100644 --- a/board/eets/pdu001/board.c +++ b/board/eets/pdu001/board.c @@ -216,6 +216,36 @@ const struct dpll_params *get_dpll_ddr_params(void) return &dpll_ddr; } +void set_uart_mux_conf(void) +{ + switch (CONFIG_CONS_INDEX) { + case 1: { + enable_uart0_pin_mux(); + break; + } + case 2: { + enable_uart1_pin_mux(); + break; + } + case 3: { + enable_uart2_pin_mux(); + break; + } + case 4: { + enable_uart3_pin_mux(); + break; + } + case 5: { + enable_uart4_pin_mux(); + break; + } + case 6: { + enable_uart5_pin_mux(); + break; + } + } +} + void set_mux_conf_regs(void) { /* done first by the ROM and afterwards by the pin controller driver */