From patchwork Tue Dec 21 05:22:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jiang, Haochen" X-Patchwork-Id: 1571347 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=G8MybcLJ; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4JJ4bx0fqZz9sCD for ; Tue, 21 Dec 2021 16:23:07 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E6F133858010 for ; Tue, 21 Dec 2021 05:23:02 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E6F133858010 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1640064182; bh=XpR2EML18giI1xMYp5jkT4nBRg9+4sYEJzNZdd1YjXw=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=G8MybcLJLVEj/j0Yjp6A+guMShkzBsgzOi5gP1mZ/MYffovws6L5F2PJ1G+oLhVNk U7+fbCZKG0ZBxp7RAywmct/PuuWpQ9wCSQTfOtS/wEaWxZpO231neq+XhAxdqCyvQT W01BcD2V+NhwGl6/elCg5QY6UO4HGy4g9x8ynUJg= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by sourceware.org (Postfix) with ESMTPS id C84563858415 for ; Tue, 21 Dec 2021 05:22:41 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org C84563858415 X-IronPort-AV: E=McAfee;i="6200,9189,10204"; a="227179797" X-IronPort-AV: E=Sophos;i="5.88,222,1635231600"; d="scan'208";a="227179797" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Dec 2021 21:22:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,222,1635231600"; d="scan'208";a="484305417" Received: from scymds01.sc.intel.com ([10.148.94.138]) by orsmga002.jf.intel.com with ESMTP; 20 Dec 2021 21:22:40 -0800 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.236.50]) by scymds01.sc.intel.com with ESMTP id 1BL5McJg024727; Mon, 20 Dec 2021 21:22:39 -0800 To: gcc-patches@gcc.gnu.org Subject: [PATCH] [i386]Add missing BMI function to align with clang Date: Tue, 21 Dec 2021 13:22:38 +0800 Message-Id: <20211221052238.93233-1-haochen.jiang@intel.com> X-Mailer: git-send-email 2.18.1 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Gcc-patches From: "Jiang, Haochen" Reply-To: Haochen Jiang Cc: hongtao.liu@intel.com Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi all, This patch adds missing BMI function _tzcnt_u16, _andn_u32, _andn_u64 to align with clang. Regtested on x86_64-pc-linux-gnu. Ok for trunk? BRs, Haochen gcc/ChangeLog: * config/i386/bmiintrin.h (_tzcnt_u16): New define function. (_andn_u32): Ditto. (_andn_u64): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/bmi-1.c: Add new test for new define function. * gcc.target/i386/bmi-2.c: Ditto. * gcc.target/i386/bmi-3.c: Ditto. --- gcc/config/i386/bmiintrin.h | 18 ++++++++++++++++++ gcc/testsuite/gcc.target/i386/bmi-1.c | 8 +++++++- gcc/testsuite/gcc.target/i386/bmi-2.c | 8 +++++++- gcc/testsuite/gcc.target/i386/bmi-3.c | 8 +++++++- 4 files changed, 39 insertions(+), 3 deletions(-) diff --git a/gcc/config/i386/bmiintrin.h b/gcc/config/i386/bmiintrin.h index 439d81cba11..92450a644eb 100644 --- a/gcc/config/i386/bmiintrin.h +++ b/gcc/config/i386/bmiintrin.h @@ -40,12 +40,24 @@ __tzcnt_u16 (unsigned short __X) return __builtin_ia32_tzcnt_u16 (__X); } +extern __inline unsigned short __attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_tzcnt_u16 (unsigned short __X) +{ + return __builtin_ia32_tzcnt_u16 (__X); +} + extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __andn_u32 (unsigned int __X, unsigned int __Y) { return ~__X & __Y; } +extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_andn_u32 (unsigned int __X, unsigned int __Y) +{ + return __andn_u32 (__X, __Y); +} + extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __bextr_u32 (unsigned int __X, unsigned int __Y) { @@ -114,6 +126,12 @@ __andn_u64 (unsigned long long __X, unsigned long long __Y) return ~__X & __Y; } +extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_andn_u64 (unsigned long long __X, unsigned long long __Y) +{ + return __andn_u64 (__X, __Y); +} + extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __bextr_u64 (unsigned long long __X, unsigned long long __Y) { diff --git a/gcc/testsuite/gcc.target/i386/bmi-1.c b/gcc/testsuite/gcc.target/i386/bmi-1.c index 738705e29d8..141adaac016 100644 --- a/gcc/testsuite/gcc.target/i386/bmi-1.c +++ b/gcc/testsuite/gcc.target/i386/bmi-1.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fno-ipa-icf -mbmi " } */ -/* { dg-final { scan-assembler "andn\[^\\n]*eax" } } */ +/* { dg-final { scan-assembler-times "andn\[^\\n]*eax" 2 } } */ /* { dg-final { scan-assembler-times "bextr\[ \\t]+\[^\\n]*eax" 2 } } */ /* { dg-final { scan-assembler-times "blsi\[^\\n]*eax" 2 } } */ /* { dg-final { scan-assembler-times "blsmsk\[^\\n]*eax" 2 } } */ @@ -15,6 +15,12 @@ func_andn32 (unsigned int X, unsigned int Y) return __andn_u32(X, Y); } +unsigned int +func_andn32_2 (unsigned int X, unsigned int Y) +{ + return _andn_u32(X, Y); +} + unsigned int func_bextr32 (unsigned int X, unsigned int Y) { diff --git a/gcc/testsuite/gcc.target/i386/bmi-2.c b/gcc/testsuite/gcc.target/i386/bmi-2.c index 6b8595eb9e1..3f9052a4991 100644 --- a/gcc/testsuite/gcc.target/i386/bmi-2.c +++ b/gcc/testsuite/gcc.target/i386/bmi-2.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-options "-O2 -fno-ipa-icf -mbmi " } */ -/* { dg-final { scan-assembler "andn\[^\\n]*rax" } } */ +/* { dg-final { scan-assembler-times "andn\[^\\n]*rax" 2 } } */ /* { dg-final { scan-assembler-times "bextr\[ \\t]+\[^\\n]*rax" 2 } } */ /* { dg-final { scan-assembler-times "blsi\[^\\n]*rax" 2 } } */ /* { dg-final { scan-assembler-times "blsmsk\[^\\n]*rax" 2 } } */ @@ -15,6 +15,12 @@ func_andn64 (unsigned long long X, unsigned long long Y) return __andn_u64 (X, Y); } +unsigned long long +func_andn64_2 (unsigned long long X, unsigned long long Y) +{ + return _andn_u64 (X, Y); +} + unsigned long long func_bextr64 (unsigned long long X, unsigned long long Y) { diff --git a/gcc/testsuite/gcc.target/i386/bmi-3.c b/gcc/testsuite/gcc.target/i386/bmi-3.c index ddc5e0f66e2..0b91bc25bf8 100644 --- a/gcc/testsuite/gcc.target/i386/bmi-3.c +++ b/gcc/testsuite/gcc.target/i386/bmi-3.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mbmi " } */ -/* { dg-final { scan-assembler "tzcntw\[^\\n]*(%|)ax" } } */ +/* { dg-final { scan-assembler-times "tzcntw\[^\\n]*%?ax" 2 } } */ #include @@ -9,3 +9,9 @@ func_tzcnt16 (unsigned short X) { return __tzcnt_u16(X); } + +unsigned short +func_tzcnt16_2 (unsigned short X) +{ + return _tzcnt_u16(X); +}