From patchwork Wed Dec 1 10:45:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 1562139 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=amZCUsEj; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4J3wyJ5ZP0z9sRN for ; Wed, 1 Dec 2021 21:56:55 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id CF5FB385800D for ; Wed, 1 Dec 2021 10:56:52 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org CF5FB385800D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1638356212; bh=WMkHHIv6aBm54GLKo/ClkyQeqVN283znCT6mQxXCXIo=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=amZCUsEjJ2dPZh95/jmW7JPhmv39D/yMyTEBppliv3Ltsvr3p764gl+gBo62f1fD9 0Tuz7pnOSh1EYyZO9+PdJSd6p3jrnCjEhb1l2lE2g8q8bnqhS8eUDXHDcfVannwHCx wmyhVgRMbg1moSQfbdj4FrEPRAuPyd8FP3WhCjio= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 3B6453858436 for ; Wed, 1 Dec 2021 10:45:50 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 3B6453858436 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D682911B3 for ; Wed, 1 Dec 2021 02:45:49 -0800 (PST) Received: from localhost (unknown [10.32.98.88]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7C41A3F694 for ; Wed, 1 Dec 2021 02:45:49 -0800 (PST) To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Subject: [PATCH] vect: Tighten check for SLP memory groups [PR103517] Date: Wed, 01 Dec 2021 10:45:48 +0000 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Richard Sandiford via Gcc-patches From: Richard Sandiford Reply-To: Richard Sandiford Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" When checking for compatible stmts, vect_build_slp_tree_1 did: && !(STMT_VINFO_GROUPED_ACCESS (stmt_info) && (first_stmt_code == ARRAY_REF || first_stmt_code == BIT_FIELD_REF || first_stmt_code == INDIRECT_REF || first_stmt_code == COMPONENT_REF || first_stmt_code == MEM_REF))) That is, it allowed any rhs_code as long as the first_stmt_code looked valid. This had the effect of allowing IFN_MASK_LOAD to be paired with an earlier non-call code (but didn't allow the reverse). This patch makes the check symmetrical. Still testing on x86_64-linux-gnu. OK if testing passes, or doesn't this seem like the right approach? Richard gcc/ PR tree-optimization/103517 * tree-vect-slp.c (vect_build_slp_tree_1): When allowing two different component references, check the codes of both them, rather than just the first. gcc/testsuite/ PR tree-optimization/103517 * gcc.dg/vect/pr103517.c: New test. --- gcc/testsuite/gcc.dg/vect/pr103517.c | 13 +++++++++++++ gcc/tree-vect-slp.c | 7 ++++++- 2 files changed, 19 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.dg/vect/pr103517.c diff --git a/gcc/testsuite/gcc.dg/vect/pr103517.c b/gcc/testsuite/gcc.dg/vect/pr103517.c new file mode 100644 index 00000000000..de87fc48f84 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr103517.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-march=skylake-avx512" { target x86_64-*-* i?86-*-* } } */ + +int a; +short b, c; +extern short d[]; +void e() { + for (short f = 1; f < (short)a; f += 2) + if (d[f + 1]) { + b = d[f]; + c = d[f + 1]; + } +} diff --git a/gcc/tree-vect-slp.c b/gcc/tree-vect-slp.c index 7bff5118bd0..bc22ffeed82 100644 --- a/gcc/tree-vect-slp.c +++ b/gcc/tree-vect-slp.c @@ -1121,7 +1121,12 @@ vect_build_slp_tree_1 (vec_info *vinfo, unsigned char *swap, || first_stmt_code == BIT_FIELD_REF || first_stmt_code == INDIRECT_REF || first_stmt_code == COMPONENT_REF - || first_stmt_code == MEM_REF))) + || first_stmt_code == MEM_REF) + && (rhs_code == ARRAY_REF + || rhs_code == BIT_FIELD_REF + || rhs_code == INDIRECT_REF + || rhs_code == COMPONENT_REF + || rhs_code == MEM_REF))) || first_stmt_load_p != load_p || first_stmt_phi_p != phi_p) {