From patchwork Wed Feb 7 18:35:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tamar Christina X-Patchwork-Id: 870594 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-472779-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="mlCo9pHV"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zc9572JPVz9s4q for ; Thu, 8 Feb 2018 05:36:10 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; q=dns; s=default; b=MFVHO3HLfuWw2Shhol9Kls1yETuYBFcDJhbfZb3MANYyMGKsyY v6t2yV5PCTrHFtodmdNAwix0sWLLbfta8AUt24I+JFnkdsTz7usOCnEoOyBha7dG oz9HOSMNpokhfCpVMOKLky4Qsmx8lZUBfwxTQJ2AA8CRuTNMOW+WrRWxs= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; s= default; bh=1lOSYjsNUJrIVAPDcUOEo5PBpbY=; b=mlCo9pHVg9E+zt8IoBEx n8GA3hkbl32+I1Sn6xM5s2xHQNRMhjL1t87B75XXigXx+edqqw71xGZsekSyCYtT IxwnsqtNAWXNdR9KkxwEEIQue0tNgaT6ppljDKxrDZyQqjfsnmJJbqWeg+FJjLBJ DzNXFsXcCSJQHGET+vbvtdU= Received: (qmail 21550 invoked by alias); 7 Feb 2018 18:36:03 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 21535 invoked by uid 89); 7 Feb 2018 18:36:02 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.4 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.2 spammy=H*RU:sk:EUR03-V, HX-HELO:sk:EUR03-V, Hx-spam-relays-external:sk:EUR03-V X-HELO: EUR03-VE1-obe.outbound.protection.outlook.com Received: from mail-eopbgr50067.outbound.protection.outlook.com (HELO EUR03-VE1-obe.outbound.protection.outlook.com) (40.107.5.67) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 07 Feb 2018 18:36:00 +0000 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Tamar.Christina@arm.com; Received: from arm.com (217.140.96.140) by DB6PR0802MB2501.eurprd08.prod.outlook.com (2603:10a6:4:a1::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.464.11; Wed, 7 Feb 2018 18:35:56 +0000 Date: Wed, 7 Feb 2018 18:35:53 +0000 From: Tamar Christina To: gcc-patches@gcc.gnu.org Cc: nd@arm.com, Ramana.Radhakrishnan@arm.com, Richard.Earnshaw@arm.com, nickc@redhat.com, Kyrylo.Tkachov@arm.com Subject: [PATCH][GCC][ARM] Silence more re-definition warnings, make test case failure case more explicit. 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This would again cause some warnings to be emitted. This patch visits all builtins defined with builtin_define_with_int_value and undefines them if they could possibly change by changing the architecture. The testcase has also been updated to make it fail more easily on such cases. Bootstrapped and regtested on arm-none-Linux-gnueabihf and no issues. Ok for trunk? Thanks, Tamar gcc/ 2018-02-07 Tamar Christina PR target/82641 * config/arm/arm-c.c (arm_cpu_builtins): Un-define __ARM_FEATURE_LDREX, __ARM_ARCH_PROFILE, __ARM_ARCH_ISA_THUMB, __ARM_FP and __ARM_NEON_FP. gcc/testsuite 2018-02-07 Tamar Christina PR target/82641 * gcc.target/arm/pragma_arch_switch_2.c: Use armv6 and armv5t. diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c index 9a16172f1d8af1a2fb3f24b758650e16ff6e810a..7c741e9fe66a0e086556272a46c4cd709996ce36 100644 --- a/gcc/config/arm/arm-c.c +++ b/gcc/config/arm/arm-c.c @@ -87,11 +87,10 @@ arm_cpu_builtins (struct cpp_reader* pfile) builtin_define ("__ARM_FEATURE_CMSE"); } + cpp_undef (pfile, "__ARM_FEATURE_LDREX"); if (TARGET_ARM_FEATURE_LDREX) builtin_define_with_int_value ("__ARM_FEATURE_LDREX", TARGET_ARM_FEATURE_LDREX); - else - cpp_undef (pfile, "__ARM_FEATURE_LDREX"); def_or_undef_macro (pfile, "__ARM_FEATURE_CLZ", ((TARGET_ARM_ARCH >= 5 && !TARGET_THUMB) @@ -105,6 +104,8 @@ arm_cpu_builtins (struct cpp_reader* pfile) builtin_define_with_int_value ("__ARM_SIZEOF_MINIMAL_ENUM", flag_short_enums ? 1 : 4); builtin_define_type_sizeof ("__ARM_SIZEOF_WCHAR_T", wchar_type_node); + + cpp_undef (pfile, "__ARM_ARCH_PROFILE"); if (TARGET_ARM_ARCH_PROFILE) builtin_define_with_int_value ("__ARM_ARCH_PROFILE", TARGET_ARM_ARCH_PROFILE); @@ -128,6 +129,7 @@ arm_cpu_builtins (struct cpp_reader* pfile) else def_or_undef_macro (pfile, "__THUMBEL__", TARGET_THUMB); + cpp_undef (pfile, "__ARM_ARCH_ISA_THUMB"); if (TARGET_ARM_ARCH_ISA_THUMB) builtin_define_with_int_value ("__ARM_ARCH_ISA_THUMB", TARGET_ARM_ARCH_ISA_THUMB); @@ -147,10 +149,9 @@ arm_cpu_builtins (struct cpp_reader* pfile) builtin_define ("__VFP_FP__"); + cpp_undef (pfile, "__ARM_FP"); if (TARGET_ARM_FP) builtin_define_with_int_value ("__ARM_FP", TARGET_ARM_FP); - else - cpp_undef (pfile, "__ARM_FP"); def_or_undef_macro (pfile, "__ARM_FP16_FORMAT_IEEE", arm_fp16_format == ARM_FP16_FORMAT_IEEE); @@ -169,10 +170,9 @@ arm_cpu_builtins (struct cpp_reader* pfile) def_or_undef_macro (pfile, "__ARM_NEON__", TARGET_NEON); def_or_undef_macro (pfile, "__ARM_NEON", TARGET_NEON); + cpp_undef (pfile, "__ARM_NEON_FP"); if (TARGET_NEON_FP) builtin_define_with_int_value ("__ARM_NEON_FP", TARGET_NEON_FP); - else - cpp_undef (pfile, "__ARM_NEON_FP"); /* Add a define for interworking. Needed when building libgcc.a. */ if (arm_cpp_interwork) diff --git a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c index fe52191c32c037fe4096c1884e1f6397318bd6a3..7f297557d555fd139a3b804d354117239a78ae62 100644 --- a/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c +++ b/gcc/testsuite/gcc.target/arm/pragma_arch_switch_2.c @@ -2,16 +2,16 @@ /* { dg-skip-if "instruction not valid on thumb" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-do assemble } */ /* { dg-require-effective-target arm_arm_ok } */ -/* { dg-additional-options "-Wall -O2 -march=armv4t -std=gnu99 -marm" } */ +/* { dg-additional-options "-Wall -O2 -march=armv5t -std=gnu99 -marm" } */ -#pragma GCC target ("arch=armv5te") -void cpu_has_iwmmxt (void) +#pragma GCC target ("arch=armv6") +int test_assembly (int hi, int lo) { - int lo; - int hi; + int res; __asm__ __volatile__ ( - "mcrr p0, 0, %2, %3, c0\n" - : "=r" (lo), "=r" (hi) - : "r" (0), "r" (0x100)); + "uxtah %0, %1, %2\n" + : "=r" (res) + : "r" (hi), "r" (lo)); + return res; }