From patchwork Thu Nov 25 00:41:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1559477 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=CsDaa7gk; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HzzbZ5fz5z9sVc for ; Thu, 25 Nov 2021 11:42:02 +1100 (AEDT) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4HzzbW3bczz303H for ; Thu, 25 Nov 2021 11:41:59 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=CsDaa7gk; dkim-atps=neutral X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::102b; helo=mail-pj1-x102b.google.com; envelope-from=jniethe5@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=CsDaa7gk; dkim-atps=neutral Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4HzzbN6cSpz2yQG for ; Thu, 25 Nov 2021 11:41:50 +1100 (AEDT) Received: by mail-pj1-x102b.google.com with SMTP id np6-20020a17090b4c4600b001a90b011e06so4227604pjb.5 for ; Wed, 24 Nov 2021 16:41:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FwNR83HSghx37pvAW54MT38wfPk3f36t/br82sZfqE8=; b=CsDaa7gk0c6UXBcBUhgHgWj6xybc9SftRdk68vhsRqXGrnP0AtDdJKuz2/nQlSNaC1 2NYUsDFgAQD+6R0JWczwMOXz+RpK6eM6aSxLvLBJbYBH3rl+nzHS2ODxDNeqAPSAHyW4 uofmlRocxF6bQKhs9+IZb5Nfbo4Ay5+cEKXNdSlQ04M2QoOG7/lX9bIQTK+HPlNJLZz6 b6yzfJSjv7vBPXWtFzTttbNwIgwJToMaLXoqnT7lUlY1zs5sIXx7O2aSGD1FfHRwWTfm lmQPd8dArJGlUVyyFW4ea+++oZtCS19XC2F2jMLieOTwy6KVsG3ybBSpIbhvLPzuAhZe Se9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FwNR83HSghx37pvAW54MT38wfPk3f36t/br82sZfqE8=; b=CPGIU1nQUa3YNaT4CUDXpEqErgDBX0gMOlZnMl5UbzT7PRvyoFweAh7XlLUR3Kfwuo iYwCv0tJ5a05tPjeXlMIlQfMtF9Aa911IwBNjTn7QQJ+OQZZj9zk7/dZoyRSJyM1AWuU QsRWF+KlXgG55vbgF284RhWwHQGBzS4Riz1ji6EYVbftSck1WY26/Z9ONzyp5lotBj8C jhUp27dAGdNjOcXE/isfjJmpF6JMIisaMNrAyz1SYiIWAE1gxVXp2iaWKhawkbWNSXMu okdofQmypBDlHrGh2MUqA1IAe4wwGHMGGx9SsQ8YIFUbmukgMZW/1wCQfNbAArBF2JuD CvRQ== X-Gm-Message-State: AOAM532XV2gV43R/saAieP0M9lOXWBdQnPrqpsDWzyaCBdnNnlnBuSx1 5aI5bzmfaz+5CAx7LR+aHUvXYQhyt8s= X-Google-Smtp-Source: ABdhPJzEBAjAmP0a6mcW0GO3xUnAnjiN97VB+j69s6eDz1EKM2MWuZyVLcpoB8tDdBAqoeuKetHOcQ== X-Received: by 2002:a17:903:24d:b0:143:beb5:b6b1 with SMTP id j13-20020a170903024d00b00143beb5b6b1mr24881024plh.54.1637800908242; Wed, 24 Nov 2021 16:41:48 -0800 (PST) Received: from tee480.ibm.com (159-196-117-139.9fc475.syd.nbn.aussiebb.net. [159.196.117.139]) by smtp.gmail.com with ESMTPSA id fw21sm5490326pjb.25.2021.11.24.16.41.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 16:41:48 -0800 (PST) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Thu, 25 Nov 2021 11:41:30 +1100 Message-Id: <20211125004138.120917-2-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211125004138.120917-1-jniethe5@gmail.com> References: <20211125004138.120917-1-jniethe5@gmail.com> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 1/9] dts: Add p10 host device tree X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Jordan Niethe --- Makefile.am | 2 +- p10-host.dts.m4 | 25 +++++++++++++++++++++++++ 2 files changed, 26 insertions(+), 1 deletion(-) create mode 100644 p10-host.dts.m4 diff --git a/Makefile.am b/Makefile.am index ab64c8612aec..90a2ff3ce644 100644 --- a/Makefile.am +++ b/Makefile.am @@ -63,7 +63,7 @@ DT = fake.dts fake-backend.dts fake2.dts fake2-backend.dts \ p8-fsi.dts p8-i2c.dts p8-kernel.dts \ p9w-fsi.dts p9r-fsi.dts p9z-fsi.dts bmc-kernel.dts \ bmc-sbefifo.dts \ - p8-host.dts p9-host.dts p8.dts p9.dts p10.dts + p8-host.dts p9-host.dts p10-host.dts p8.dts p9.dts p10.dts DT_sources = $(DT:.dts=.dtb.S) DT_headers = $(DT:.dts=.dt.h) diff --git a/p10-host.dts.m4 b/p10-host.dts.m4 new file mode 100644 index 000000000000..3b4c2b267e1b --- /dev/null +++ b/p10-host.dts.m4 @@ -0,0 +1,25 @@ +/dts-v1/; + +/ { + #address-cells = <0x1>; + #size-cells = <0x0>; + + /* Host based debugfs access */ + pib@0 { + #address-cells = <0x2>; + #size-cells = <0x1>; + compatible = "ibm,host-pib"; + reg = <0x0>; + index = <0x0>; + system-path = "/proc0/pib"; + }; + + pib@8 { + #address-cells = <0x2>; + #size-cells = <0x1>; + compatible = "ibm,host-pib"; + reg = <0x8>; + index = <0x8>; + system-path = "/proc1/pib"; + }; +}; From patchwork Thu Nov 25 00:41:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1559480 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=WCudLr1V; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; 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[159.196.117.139]) by smtp.gmail.com with ESMTPSA id fw21sm5490326pjb.25.2021.11.24.16.41.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 16:41:50 -0800 (PST) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Thu, 25 Nov 2021 11:41:31 +1100 Message-Id: <20211125004138.120917-3-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211125004138.120917-1-jniethe5@gmail.com> References: <20211125004138.120917-1-jniethe5@gmail.com> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 2/9] libpdbg: Enable p10 host backend X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Jordan Niethe --- libpdbg/dtb.c | 16 +++++++++++++++- src/main.c | 8 ++++++++ 2 files changed, 23 insertions(+), 1 deletion(-) diff --git a/libpdbg/dtb.c b/libpdbg/dtb.c index 193b01ad1b38..2b084f74a042 100644 --- a/libpdbg/dtb.c +++ b/libpdbg/dtb.c @@ -42,6 +42,7 @@ #include "bmc-kernel.dt.h" #include "p8-host.dt.h" #include "p9-host.dt.h" +#include "p10-host.dt.h" #include "p8-cronus.dt.h" #include "cronus.dt.h" #include "bmc-sbefifo.dt.h" @@ -171,9 +172,15 @@ static void ppc_target(struct pdbg_dtb *dtb) dtb->backend.fdt = &_binary_p9_host_dtb_o_start; if (!dtb->system.fdt) dtb->system.fdt = &_binary_p9_dtb_o_start; + } else if (!strcmp(pdbg_backend_option, "p10")) { + pdbg_proc = PDBG_PROC_P10; + if (!dtb->backend.fdt) + dtb->backend.fdt = &_binary_p10_host_dtb_o_start; + if (!dtb->system.fdt) + dtb->system.fdt = &_binary_p10_dtb_o_start; } else { pdbg_log(PDBG_ERROR, "Invalid system type %s\n", pdbg_backend_option); - pdbg_log(PDBG_ERROR, "Use 'p8' or 'p9'\n"); + pdbg_log(PDBG_ERROR, "Use 'p8' or 'p9' or 'p10'\n"); } return; @@ -216,6 +223,13 @@ static void ppc_target(struct pdbg_dtb *dtb) dtb->backend.fdt = &_binary_p9_host_dtb_o_start; if (!dtb->system.fdt) dtb->system.fdt = &_binary_p9_dtb_o_start; + } else if (strncmp(pos, "POWER10", 7) == 0) { + pdbg_proc = PDBG_PROC_P10; + pdbg_log(PDBG_INFO, "Found a POWER10 PPC host system\n"); + if (!dtb->backend.fdt) + dtb->backend.fdt = &_binary_p10_host_dtb_o_start; + if (!dtb->system.fdt) + dtb->system.fdt = &_binary_p10_dtb_o_start; } else { pdbg_log(PDBG_ERROR, "Unsupported CPU type '%s'\n", pos); } diff --git a/src/main.c b/src/main.c index 63eb4075614b..461033e2e317 100644 --- a/src/main.c +++ b/src/main.c @@ -205,6 +205,9 @@ out2: } /* Stolen from skiboot */ +#define P10_PIR2GCID(pir) (((pir) >> 8) & 0xf) +#define P10_PIR2COREID(pir) (((pir) >> 2) & 0x3f) +#define P10_PIR2THREADID(pir) ((pir) & 0x3) #define P9_PIR2GCID(pir) (((pir) >> 8) & 0x7f) #define P9_PIR2COREID(pir) (((pir) >> 2) & 0x3f) #define P9_PIR2THREADID(pir) ((pir) & 0x3) @@ -227,6 +230,11 @@ bool pir_map(int pir, int *chip, int *core, int *thread) *core = P8_PIR2COREID(pir); *thread = P8_PIR2THREADID(pir); break; + case PDBG_PROC_P10: + *chip = P10_PIR2GCID(pir); + *core = P10_PIR2COREID(pir); + *thread = P10_PIR2THREADID(pir); + break; default: PR_ERROR("Unable to determine processor type for mapping to Linux CPU number\n"); return false; From patchwork Thu Nov 25 00:41:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1559478 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; 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[159.196.117.139]) by smtp.gmail.com with ESMTPSA id fw21sm5490326pjb.25.2021.11.24.16.41.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 16:41:52 -0800 (PST) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Thu, 25 Nov 2021 11:41:32 +1100 Message-Id: <20211125004138.120917-4-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211125004138.120917-1-jniethe5@gmail.com> References: <20211125004138.120917-1-jniethe5@gmail.com> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 3/9] dts: Fix nhtm in p10 device tree X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Jordan Niethe --- v2: Seperated from following patch --- p10.dts.m4 | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/p10.dts.m4 b/p10.dts.m4 index 1c3e4e75871b..78606751aabb 100644 --- a/p10.dts.m4 +++ b/p10.dts.m4 @@ -335,21 +335,21 @@ define(`CHIP', #size-cells = < 0x01 >; index = < 0x$1 >; - adu@90000 { + adu@3001C00 { compatible = "ibm,power10-adu"; - reg = < 0x00 0x90000 0x50 >; + reg = < 0x00 0x3001C00 0x50 >; system-path = "/mem$1"; }; - htm@5012880 { + htm@3011C80 { compatible = "ibm,power10-nhtm"; - reg = < 0x00 0x5012880 0x40 >; + reg = < 0x00 0x3011C80 0x40 >; index = < 0x$1 >; }; - htm@50128C0 { + htm@30120C0 { compatible = "ibm,power10-nhtm"; - reg = < 0x00 0x50128c0 0x40 >; + reg = < 0x00 0x30120C0 0x40 >; index = < 0x$1 >; }; From patchwork Thu Nov 25 00:41:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1559481 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=kcdMp3Mt; dkim-atps=neutral Authentication-Results: ozlabs.org; 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[159.196.117.139]) by smtp.gmail.com with ESMTPSA id fw21sm5490326pjb.25.2021.11.24.16.41.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 16:41:55 -0800 (PST) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Thu, 25 Nov 2021 11:41:33 +1100 Message-Id: <20211125004138.120917-5-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211125004138.120917-1-jniethe5@gmail.com> References: <20211125004138.120917-1-jniethe5@gmail.com> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 4/9] libpdbg: Add nhtm hardware unit for p10 X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" p10 also has a Nest HTM. The biggest change is that on p10 there are two nhtm units. Add support for it. Signed-off-by: Jordan Niethe --- v2: HTM1 -> HTM2 etc replace reg_off() with dual_htm_offset --- libpdbg/htm.c | 238 ++++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 221 insertions(+), 17 deletions(-) diff --git a/libpdbg/htm.c b/libpdbg/htm.c index 43cef84522ef..419ac287e760 100644 --- a/libpdbg/htm.c +++ b/libpdbg/htm.c @@ -35,6 +35,7 @@ rc;}) #define MIN(x,y) ((x < y) ? x : y) +#define MAX(a, b) ((a) > (b) ? (a) : (b)) #define DEBUGFS_POWERPC "/sys/kernel/debug/powerpc" #define DEBUGFS_SCOM DEBUGFS_POWERPC"/scom" @@ -75,10 +76,34 @@ #define HTM_MEM_SCOPE PPC_BITMASK(1,3) /* Note: the next 3 change on P9 */ #define HTM_MEM_PRIORITY PPC_BITMASK(4,5) +#define HTM_MEM_PRIORITY_P10 PPC_BITMASK(4) #define HTM_MEM_SIZE_SMALL PPC_BIT(13) +#define HTM_MEM_SIZE_SMALL_P10 PPC_BIT(5) #define HTM_MEM_BASE PPC_BITMASK(14,39) +#define HTM_MEM_BASE_P10 PPC_BITMASK(8,39) #define HTM_MEM_SIZE PPC_BITMASK(40,48) #define HTM_STATUS 2 +#define HTM2_STATUS_MASK PPC_BITMASK(22,39) +#define HTM2_STATUS_CRESP_OV PPC_BIT(22) +#define HTM2_STATUS_REPAIR PPC_BIT(23) +#define HTM2_STATUS_BUF_WAIT PPC_BIT(24) +#define HTM2_STATUS_TRIG_DROPPED PPC_BIT(25) +#define HTM2_STATUS_ADDR_ERROR PPC_BIT(26) +#define HTM2_STATUS_REC_DROPPED PPC_BIT(27) +#define HTM2_STATUS_INIT PPC_BIT(28) +#define HTM2_STATUS_PREREQ PPC_BIT(29) +#define HTM2_STATUS_READY PPC_BIT(30) +#define HTM2_STATUS_TRACING PPC_BIT(31) +#define HTM2_STATUS_PAUSED PPC_BIT(32) +#define HTM2_STATUS_FLUSH PPC_BIT(33) +#define HTM2_STATUS_COMPLETE PPC_BIT(34) +#define HTM2_STATUS_ENABLE PPC_BIT(35) +#define HTM2_STATUS_STAMP PPC_BIT(36) +#define HTM2_STATUS_SCOM_ERROR PPC_BIT(37) +#define HTM2_STATUS_PARITY_ERROR PPC_BIT(38) +#define HTM2_STATUS_INVALID_CRESP PPC_BIT(39) +#define HTM2_STATUS_STATE_MASK (PPC_BITMASK(28,36) | HTM_STATUS_REPAIR) +#define HTM2_STATUS_ERROR_MASK (HTM_STATUS_CRESP_OV | PPC_BITMASK(24,27) | PPC_BITMASK(37,39)) #define HTM_STATUS_MASK PPC_BITMASK(2,19) #define HTM_STATUS_CRESP_OV PPC_BIT(2) #define HTM_STATUS_REPAIR PPC_BIT(3) @@ -102,7 +127,9 @@ #define HTM_STATUS_ERROR_MASK (HTM_STATUS_CRESP_OV | PPC_BITMASK(4,7) | PPC_BITMASK(17,19)) #define HTM_LAST_ADDRESS 3 #define HTM_LAST_ADDRESS_MASK PPC_BITMASK(8,56) -#define HTM_SCOM_TRIGGER 4 +#define HTM2_LAST_ADDRESS 4 +#define HTM2_LAST_ADDRESS_MASK PPC_BITMASK(8,56) +#define HTM_SCOM_TRIGGER (4 + dual_htm_offset) #define HTM_TRIG_START PPC_BIT(0) #define HTM_TRIG_STOP PPC_BIT(1) #define HTM_TRIG_PAUSE PPC_BIT(2) @@ -110,28 +137,49 @@ #define HTM_TRIG_RESET PPC_BIT(4) #define HTM_TRIG_MARK_VALID PPC_BIT(5) #define HTM_TRIG_MARK_TYPE PPC_BITMASK(6,15) -#define HTM_TRIGGER_CONTROL 5 +#define HTM_TRIGGER_CONTROL (5 + dual_htm_offset) #define HTM_CTRL_TRIG PPC_BITMASK(0,1) #define HTM_CTRL_MASK PPC_BITMASK(4,5) #define HTM_CTRL_XSTOP_STOP PPC_BIT(13) -#define NHTM_FILTER_CONTROL 6 +#define NHTM_FILTER_CONTROL (6 + dual_htm_offset) #define NHTM_FILTER_RCMD_SCOPE PPC_BITMASK(17,19) #define NHTM_FILTER_RCMD_SOURCE PPC_BITMASK(20,21) #define NHTM_FILTER_CRESP_PATTERN PPC_BITMASK(27,31) #define NHTM_FILTER_MASK PPC_BITMASK(32,54) #define NHTM_FILTER_CRESP_MASK PPC_BITMASK(59,63) -#define NHTM_TTYPE_FILTER_CONTROL 7 +#define NHTM_TTYPE_FILTER_CONTROL (7 + dual_htm_offset) #define NHTM_TTYPE_TYPE_MASK PPC_BITMASK(17,23) #define NHTM_TTYPE_SIZE_MASK PPC_BITMASK(24,31) -#define NHTM_CONFIGURATION 8 +#define NHTM_CONFIGURATION (8 + dual_htm_offset) #define NHTM_CONF_HANG_DIV_RATIO PPC_BITMASK(0,4) #define NHTM_CONF_RTY_DROP_COUNT PPC_BITMASK(5,8) #define NHTM_CONF_DROP_PRIORITY_INC PPC_BIT(9) #define NHTM_CONF_RETRY_BACKOFF PPC_BIT(10) #define NHTM_CONF_OPERALIONAL_HANG PPC_BIT(11) -#define NHTM_FLEX_MUX 9 +#define NHTM_FLEX_MUX (9 + dual_htm_offset) #define NHTM_FLEX_MUX_MASK PPC_BITMASK(0,35) #define NHTM_FLEX_DEFAULT 0xCB3456129 +#define NHTM_FLEX_MUX_MASK_P10 PPC_BITMASK(0,39) +#define NHTM_FLEX_DEFAULT_P10 0xCB34561567 +#define NHTM_ADDR_PAT 0xb +#define NHTM_ADDR_PAT_MASK PPC_BITMASK(0, 55) +#define NHTM_ADDR_MASK 0xc +#define NHTM_ADDR_MASK_MASK PPC_BITMASK(0, 55) +#define NHTM_STOP_FILTER 0xd +#define NHTM_STOP_FILTER_TTAG_PAT PPC_BITMASK(0, 14) +#define NHTM_STOP_FILTER_TTAG_MASK PPC_BITMASK(15, 29) +#define NHTM_STOP_FILTER_TTYPE_PAT PPC_BITMASK(30, 36) +#define NHTM_STOP_FILTER_TTYPE_MASK PPC_BITMASK(37, 43) +#define NHTM_STOP_FILTER_CRESP_PAT PPC_BITMASK(44, 48) +#define NHTM_STOP_FILTER_CRESP_MASK PPC_BITMASK(49, 53) +#define NHTM_STOP_CYCLES PPC_BITMASK(54, 60) +#define NHTM_STOP_FILT_ADDR_PAT 0xe +#define NHTM_STOP_FILT_ADDR_PAT_MASK PPC_BITMASK(0, 55) +#define NHTM_STOP_FILT_ADDR_MASK 0xf +#define NHTM_STOP_FILT_ADDR_MASK_MASK PPC_BITMASK(0, 55) + +/* On P10 there are two nhtms which shifts some of the registers */ +static int dual_htm_offset; enum htm_state { INIT, @@ -161,11 +209,14 @@ enum htm_error { struct htm_status { enum htm_state state; + enum htm_state state2; enum htm_error error; + enum htm_error error2; bool mem_size_select; uint16_t mem_size; uint64_t mem_base; uint64_t mem_last; + uint64_t mem_last2; uint64_t raw; }; @@ -292,6 +343,37 @@ static int get_status(struct htm *htm, struct htm_status *status) status->error = NONE; } + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { + switch (status->raw & HTM2_STATUS_ERROR_MASK) { + case HTM2_STATUS_CRESP_OV: + status->error2 = CRESP_OV; + break; + case HTM2_STATUS_BUF_WAIT: + status->error2 = BUF_WAIT; + break; + case HTM2_STATUS_TRIG_DROPPED: + status->error2 = TRIGGER_DROPPED; + break; + case HTM2_STATUS_ADDR_ERROR: + status->error2 = ADDR_ERROR; + break; + case HTM2_STATUS_REC_DROPPED: + status->error2 = RECORD_DROPPED; + break; + case HTM2_STATUS_SCOM_ERROR: + status->error2 = SCOM_ERROR; + break; + case HTM2_STATUS_PARITY_ERROR: + status->error2 = PARITY_ERROR; + break; + case HTM2_STATUS_INVALID_CRESP: + status->error2 = INVALID_CRESP; + break; + default: + status->error2 = NONE; + } + } + switch (status->raw & HTM_STATUS_STATE_MASK) { case HTM_STATUS_REPAIR: status->state = REPAIR; @@ -327,16 +409,63 @@ static int get_status(struct htm *htm, struct htm_status *status) status->state = UNINITIALIZED; } + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { + switch (status->raw & HTM2_STATUS_STATE_MASK) { + case HTM2_STATUS_REPAIR: + status->state2 = REPAIR; + break; + case HTM2_STATUS_INIT: + status->state2 = INIT; + break; + case HTM2_STATUS_PREREQ: + status->state2 = PREREQ; + break; + case HTM2_STATUS_READY: + status->state2 = READY; + break; + case HTM2_STATUS_TRACING: + status->state2 = TRACING; + break; + case HTM2_STATUS_PAUSED: + status->state2 = PAUSED; + break; + case HTM2_STATUS_FLUSH: + status->state2 = FLUSH; + break; + case HTM2_STATUS_COMPLETE: + status->state2 = COMPLETE; + break; + case HTM2_STATUS_ENABLE: + status->state2 = ENABLE; + break; + case HTM2_STATUS_STAMP: + status->state2 = STAMP; + break; + default: + status->state2 = UNINITIALIZED; + } + } + if (HTM_ERR(pib_read(&htm->target, HTM_MEMORY_CONF, &val))) return -1; - status->mem_size_select = val & HTM_MEM_SIZE_SMALL; + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { + status->mem_size_select = val & HTM_MEM_SIZE_SMALL_P10; + status->mem_base = val & HTM_MEM_BASE_P10; + } else { + status->mem_size_select = val & HTM_MEM_SIZE_SMALL; + status->mem_base = val & HTM_MEM_BASE; + } status->mem_size = GETFIELD(HTM_MEM_SIZE,val); - status->mem_base = val & HTM_MEM_BASE; if (HTM_ERR(pib_read(&htm->target, HTM_LAST_ADDRESS, &status->mem_last))) return -1; + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { + if (HTM_ERR(pib_read(&htm->target, HTM2_LAST_ADDRESS, &status->mem_last2))) + return -1; + } + return 0; } @@ -566,6 +695,35 @@ static int configure_nhtm(struct htm *htm, bool wrap) } } + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { + if (HTM_ERR(pib_read(&htm->target, NHTM_FLEX_MUX, &val))) + return -1; + + if (GETFIELD(NHTM_FLEX_MUX_MASK_P10, val) != NHTM_FLEX_DEFAULT_P10) { + PR_ERROR("The HTM Flex wasn't default value\n"); + return -1; + } + + if (HTM_ERR(pib_write(&htm->target, NHTM_ADDR_PAT, 0))) + return -1; + + if (HTM_ERR(pib_write(&htm->target, NHTM_ADDR_MASK, NHTM_ADDR_MASK_MASK))) + return -1; + + if (HTM_ERR(pib_write(&htm->target, NHTM_STOP_FILTER, + NHTM_STOP_FILTER_TTAG_MASK | + NHTM_STOP_FILTER_TTYPE_MASK | + NHTM_STOP_FILTER_CRESP_MASK))) + return -1; + + if (HTM_ERR(pib_write(&htm->target, NHTM_STOP_FILT_ADDR_PAT, 0))) + return -1; + + if (HTM_ERR(pib_write(&htm->target, NHTM_STOP_FILT_ADDR_MASK, + NHTM_STOP_FILT_ADDR_MASK_MASK))) + return -1; + } + return 0; } @@ -577,9 +735,13 @@ static int deconfigure_nhtm(struct htm *htm) return 0; } -static int is_startable(struct htm_status *status) +static int is_startable(struct htm *htm, struct htm_status *status) { - return (status->state == READY || status->state == PAUSED); + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) + return ((status->state == READY || status->state == PAUSED) && + (status->state2 == READY || status->state2 == PAUSED)); + else + return (status->state == READY || status->state == PAUSED); } static char *get_debugfs_file(struct htm *htm, const char *file) @@ -715,7 +877,10 @@ static int configure_memory(struct htm *htm) small = 0; if (size < 512*1024*1024) small = 1; - val = SETFIELD(HTM_MEM_SIZE_SMALL, val, small); + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) + val = SETFIELD(HTM_MEM_SIZE_SMALL_P10, val, small); + else + val = SETFIELD(HTM_MEM_SIZE_SMALL, val, small); shift = 29; /* large */ if (small) shift = 24; @@ -728,7 +893,10 @@ static int configure_memory(struct htm *htm) * already shifted correct as read from the kernel, or'ing it * in works fine. */ - val = SETFIELD(HTM_MEM_BASE, val, 0); + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) + val = SETFIELD(HTM_MEM_BASE_P10, val, 0); + else + val = SETFIELD(HTM_MEM_BASE, val, 0); val |= base; if (HTM_ERR(pib_write(&htm->target, HTM_MEMORY_CONF, val))) @@ -800,7 +968,7 @@ static int __do_htm_start(struct htm *htm, bool wrap) if (HTM_ERR(get_status(htm, &status))) return -1; - if (!is_startable(&status)) { + if (!is_startable(htm, &status)) { PR_ERROR("HTM not in a startable state!\n"); return -1; } @@ -1008,9 +1176,9 @@ static int do_htm_dump(struct htm *htm, char *filename) { char *trace_file; struct htm_status status; - uint64_t last, end, trace_size; + uint64_t last, end, trace_size, last2 = 0; int trace_fd, dump_fd; - uint32_t eyecatcher; + uint64_t eyecatcher; size_t r; bool wrapped; @@ -1025,6 +1193,11 @@ static int do_htm_dump(struct htm *htm, char *filename) return -1; } + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm") && status.state2 != COMPLETE) { + PR_INFO("* Skipping DUMP tigger, HTM2 is not in complete state\n"); + return -1; + } + trace_file = get_debugfs_file(htm, "trace"); if (!trace_file) return -1; @@ -1036,7 +1209,12 @@ static int do_htm_dump(struct htm *htm, char *filename) goto out3; } - r = read(trace_fd, &eyecatcher, 4); + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { + lseek(trace_fd, 8, SEEK_SET); + r = read(trace_fd, &eyecatcher, 8); + } else { + r = read(trace_fd, &eyecatcher, 4); + } if (r == -1) { PR_ERROR("Failed to read from %s: %m\n", trace_file); goto out2; @@ -1045,6 +1223,8 @@ static int do_htm_dump(struct htm *htm, char *filename) if (eyecatcher == 0x00f0efac) wrapped = false; last = status.mem_last - status.mem_base; + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) + last2 = status.mem_last2 - status.mem_base; end = htm_trace_size(&status); trace_size = wrapped ? end : last; @@ -1083,7 +1263,7 @@ static int do_htm_dump(struct htm *htm, char *filename) r = lseek(trace_fd, 0, SEEK_SET); if (r == -1) goto out1; - r = copy_file(dump_fd, trace_fd, last); + r = copy_file(dump_fd, trace_fd, MAX(last2, last)); if (r) goto out1; r = 1; @@ -1140,6 +1320,14 @@ static int nhtm_probe(struct pdbg_target *target) } } + switch (pdbg_get_proc()) { + case PDBG_PROC_P10: + dual_htm_offset = 0x01; + break; + default: + break; + } + return 0; } @@ -1193,10 +1381,26 @@ static struct htm p8_chtm = { }; DECLARE_HW_UNIT(p8_chtm); +static struct htm p10_nhtm = { + .target = { + .name = "POWER10 Nest HTM", + .compatible = "ibm,power10-nhtm", + .class = "nhtm", + .probe = nhtm_probe, + }, + .start = do_htm_start, + .stop = do_htm_stop, + .record = do_htm_record, + .status = do_htm_status, + .dump = do_htm_dump, +}; +DECLARE_HW_UNIT(p10_nhtm); + __attribute__((constructor)) static void register_htm(void) { pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p8_nhtm_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_nhtm_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_nhtm_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p8_chtm_hw_unit); } From patchwork Thu Nov 25 00:41:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1559482 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; 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[159.196.117.139]) by smtp.gmail.com with ESMTPSA id fw21sm5490326pjb.25.2021.11.24.16.41.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 16:41:57 -0800 (PST) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Thu, 25 Nov 2021 11:41:34 +1100 Message-Id: <20211125004138.120917-6-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211125004138.120917-1-jniethe5@gmail.com> References: <20211125004138.120917-1-jniethe5@gmail.com> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 5/9] libpdbg: Prepare to add chtm for p10 X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Break some p8 specific functionality into helper functions to make things cleaner when adding support for chtm on p10. Signed-off-by: Jordan Niethe --- v2: add .configure, .deconfigure, function pointers --- libpdbg/htm.c | 52 +++++++++++++++++++++++++++++++----------------- libpdbg/hwunit.h | 3 +++ 2 files changed, 37 insertions(+), 18 deletions(-) diff --git a/libpdbg/htm.c b/libpdbg/htm.c index 419ac287e760..f4a0c28a20a7 100644 --- a/libpdbg/htm.c +++ b/libpdbg/htm.c @@ -586,8 +586,7 @@ static int configure_debugfs_memtrace(struct htm *htm) static int configure_chtm(struct htm *htm, bool wrap) { - uint64_t hid0, ncu, val; - struct pdbg_target *core; + uint64_t val; if (!pdbg_target_is_class(&htm->target, "chtm")) return 0; @@ -600,6 +599,17 @@ static int configure_chtm(struct htm *htm, bool wrap) HTM_MODE_ENABLE | val))) return -1; + if (htm->configure && htm->configure(htm) < 0) + return -1; + + return 0; +} + +static int do_configure_chtm_p8(struct htm *htm) +{ + uint64_t hid0, ncu; + struct pdbg_target *core; + core = pdbg_target_require_parent("core", &htm->target); if (HTM_ERR(pib_read(core, HID0_REGISTER, &hid0))) return -1; @@ -618,12 +628,27 @@ static int configure_chtm(struct htm *htm, bool wrap) static int deconfigure_chtm(struct htm *htm) { - uint64_t hid0, ncu; - struct pdbg_target *core; if (!pdbg_target_is_class(&htm->target, "chtm")) return 0; + if (htm->deconfigure && htm->deconfigure(htm) < 0) + return -1; + + if (HTM_ERR(pib_write(&htm->target, HTM_COLLECTION_MODE,0))) + return -1; + +// FIXME this needs kernel work to happen +// if (HTM_ERR(deconfigure_debugfs_memtrace(htm))) +// return -1; + return 0; +} + +static int do_deconfigure_chtm_p8(struct htm *htm) +{ + struct pdbg_target *core; + uint64_t ncu, hid0; + core = pdbg_target_require_parent("core", &htm->target); if (HTM_ERR(pib_read(core, NCU_MODE_REGISTER, &ncu))) return -1; @@ -637,12 +662,6 @@ static int deconfigure_chtm(struct htm *htm) if (HTM_ERR(pib_write(core, HID0_REGISTER, hid0))) return -1; - if (HTM_ERR(pib_write(&htm->target, HTM_COLLECTION_MODE,0))) - return -1; - -// FIXME this needs kernel work to happen -// if (HTM_ERR(deconfigure_debugfs_memtrace(htm))) -// return -1; return 0; } @@ -929,7 +948,7 @@ static int do_htm_reset(struct htm *htm, bool wrap) /* Stolen from p8chip.c */ #define RAS_MODE_REG 0x1 #define MR_THREAD_IN_DEBUG PPC_BIT(43) -static int htm_toggle_debug_bit(struct htm *htm) +static int do_post_configure_chtm_p8(struct htm *htm) { struct pdbg_target *target; struct pdbg_target *core; @@ -941,12 +960,6 @@ static int htm_toggle_debug_bit(struct htm *htm) if (!core) return 0; /* nhtm case */ - /* FIXME: this is a hack for P8 */ - if (!pdbg_target_compatible(core, "ibm,power8-core")) { - PR_ERROR("HTM is POWER8 only currently\n"); - return -1; - } - pdbg_for_each_target("thread", core, target) { if (pdbg_target_index(target) == 0) { /* Need to set this bit to ensure HTM starts */ @@ -980,7 +993,7 @@ static int __do_htm_start(struct htm *htm, bool wrap) if (HTM_ERR(pib_write(&htm->target, HTM_SCOM_TRIGGER, HTM_TRIG_START))) return -1; - if (htm_toggle_debug_bit(htm)) + if (htm->post_configure && htm->post_configure(htm)) return -1; /* @@ -1378,6 +1391,9 @@ static struct htm p8_chtm = { .record = do_htm_record, .status = do_htm_status, .dump = do_htm_dump, + .configure = do_configure_chtm_p8, + .deconfigure = do_deconfigure_chtm_p8, + .post_configure = do_post_configure_chtm_p8, }; DECLARE_HW_UNIT(p8_chtm); diff --git a/libpdbg/hwunit.h b/libpdbg/hwunit.h index de15a870c20f..b8504b187d15 100644 --- a/libpdbg/hwunit.h +++ b/libpdbg/hwunit.h @@ -58,6 +58,9 @@ struct htm { int (*status)(struct htm *); int (*dump)(struct htm *, char *); int (*record)(struct htm *, char *); + int (*configure)(struct htm *); + int (*deconfigure)(struct htm *); + int (*post_configure)(struct htm *); }; #define target_to_htm(x) container_of(x, struct htm, target) From patchwork Thu Nov 25 00:41:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1559483 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=GY0Aj93r; dkim-atps=neutral Authentication-Results: ozlabs.org; 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[159.196.117.139]) by smtp.gmail.com with ESMTPSA id fw21sm5490326pjb.25.2021.11.24.16.41.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 16:41:59 -0800 (PST) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Thu, 25 Nov 2021 11:41:35 +1100 Message-Id: <20211125004138.120917-7-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211125004138.120917-1-jniethe5@gmail.com> References: <20211125004138.120917-1-jniethe5@gmail.com> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 6/9] dts: Add chtm to p10 device tree X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Jordan Niethe --- v2: New to series. Seperated from next patch --- p10.dts.m4 | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/p10.dts.m4 b/p10.dts.m4 index 78606751aabb..ea8266f314f0 100644 --- a/p10.dts.m4 +++ b/p10.dts.m4 @@ -29,6 +29,13 @@ define(`CORE', THREAD(1) THREAD(2) THREAD(3) + + htm@20010680 { + compatible = "ibm,power10-chtm"; + reg = < 0x20010680 >; + index = < 0x$1 >; + }; + }; ')dnl From patchwork Thu Nov 25 00:41:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1559484 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=RohynFiO; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4Hzzbh0rWXz9sVc for ; Thu, 25 Nov 2021 11:42:08 +1100 (AEDT) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4Hzzbh07MVz2yfb for ; Thu, 25 Nov 2021 11:42:08 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=RohynFiO; dkim-atps=neutral X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::636; helo=mail-pl1-x636.google.com; envelope-from=jniethe5@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=RohynFiO; dkim-atps=neutral Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4Hzzbf15D9z2yPP for ; Thu, 25 Nov 2021 11:42:06 +1100 (AEDT) Received: by mail-pl1-x636.google.com with SMTP id o14so3229674plg.5 for ; Wed, 24 Nov 2021 16:42:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0H2ia2nxyP8IADQOBtYc9jQBBqa3Qjeejj6HArVnFQ8=; b=RohynFiOM/HmfrwmPnZP1xpv/mhw5Ohfx4ibSGbETgwj0wFBeiB8ygTOH97rj5m4qt IK766FMe59Dcz9Lcyt6t8V9VAJkxu9/eAyB/oVdNB/1My5KD/0E2EYtBiZNNn0Qs1Y9/ xUII7bBKpL0UTz78kfWWAb3+J+YKiUoW+qhv9TATWrd1bYDF7aM3m0U+9Zw981PJa/P4 zMp5gEmYdr8KlptRadPcz5VtEVB7Vz9tMkVq+pUirxUWl5cprRWq1xQBfGu/t6gfu+9r 6lQ+ysX8s1TkdNjt3EbdtUzqsVWKDgnD5186tPKzSv1RqW3APj+3mh/aC3WEeI+Pxl0k fbJQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0H2ia2nxyP8IADQOBtYc9jQBBqa3Qjeejj6HArVnFQ8=; b=Evf0vqFlqTVz3Bn68urOrClNg3ysbLOmAftKhylGaASqQ8N6+y4/oHy9xThkmigT3J iPk6lHWIfBqc+zF3p0I2kjXAIxnYV5Xi5nokEfz5p+CngS9X2jk0Rj1U/vF6n+1U3J6h eHUa+CtlH37YLi+Lt9wcIrTTTCFmhzPzoMdEgyZrK7xFU9xZiDDpcSBpDgwPoBY+2/vm ERNbaDkyGq4Z8q7UKRntAw2Fp9+eXD8ILiSOf+4Qq3c+v3ATm2B7pO6cVS/tjEq6VSdQ 5GUj5dI/ULP8r2nXxl1VoFnNqKJrThn1gfz066zluqrESzuLbdgMIDzOIq7Rv2Bss9Fx tsvA== X-Gm-Message-State: AOAM5319FM40FSWaCc17RtMwRUzcCurtpobiuz64B0E/vyVINXDs5uLU zUzk5rRMecmah4f564Nf/ab2bfNkiYQ= X-Google-Smtp-Source: ABdhPJw6RdhD2TAcYCDcORbeZey4AZpp87sA0T3+lDkka0yFZAbit9148t5anEhdLy+7kZRWi/rjww== X-Received: by 2002:a17:902:6b07:b0:142:852a:9e1f with SMTP id o7-20020a1709026b0700b00142852a9e1fmr24697822plk.29.1637800923378; Wed, 24 Nov 2021 16:42:03 -0800 (PST) Received: from tee480.ibm.com (159-196-117-139.9fc475.syd.nbn.aussiebb.net. [159.196.117.139]) by smtp.gmail.com with ESMTPSA id fw21sm5490326pjb.25.2021.11.24.16.42.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 16:42:03 -0800 (PST) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Thu, 25 Nov 2021 11:41:36 +1100 Message-Id: <20211125004138.120917-8-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211125004138.120917-1-jniethe5@gmail.com> References: <20211125004138.120917-1-jniethe5@gmail.com> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 7/9] libpdbg: Add chtm hardware unit for p10 X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" p10 adds a Core HTM again. There is a hardware issue when the chtm is in non-wrapping mode and changes to the stopped state the machine will checkstop. Work around this by masking the FIR bit that is raised. Add support for the p10 chtm. Signed-off-by: Jordan Niethe --- v2: Use .configure, etc function pointers --- libpdbg/htm.c | 144 ++++++++++++++++++++++++++++++++++++++++++++++- libpdbg/hwunit.h | 1 + 2 files changed, 143 insertions(+), 2 deletions(-) diff --git a/libpdbg/htm.c b/libpdbg/htm.c index f4a0c28a20a7..296885aa76e1 100644 --- a/libpdbg/htm.c +++ b/libpdbg/htm.c @@ -56,6 +56,17 @@ HID0_SINGLE_DECODE | HID0_EN_INST_TRACE |\ HID0_TRACE_EN) +#define HIDQ_REGISTER 0x20028415 +#define HIDQ_ONE_PPC PPC_BIT(0) +#define HIDQ_EN_INST_TRACE PPC_BIT(1) +#define HIDQ_HILE PPC_BIT(4) +#define HIDQ_DIS_PROC_REC PPC_BIT(5) +#define HIDQ_TRACE_BITS (HIDQ_ONE_PPC | HIDQ_EN_INST_TRACE) + +#define CORE_FIR 0x20028440 +#define CORE_FIR_PC_LOGIC PPC_BIT(45) +#define CORE_FIR_AND 0x20028441 +#define CORE_FIR_MASK 0x20028443 /* * This is a CORE register not a HTM register, don't pass the HTM * target to it. @@ -63,14 +74,22 @@ #define NCU_MODE_REGISTER 0x10C0A #define NCU_MODE_HTM_ENABLE PPC_BIT(0) +#define IMA_EVENT_MASK 0x20020400 + #define HTM_COLLECTION_MODE 0 #define HTM_MODE_ENABLE PPC_BIT(0) #define HTM_MODE_CONTENT_SEL PPC_BITMASK(1,2) +#define HTM_MODE_CORE_TRACE_EN PPC_BIT(1) +#define HTM_MODE_LLAT_TRACE_EN PPC_BIT(2) +#define HTM_MODE_DMW_TRACE_EN PPC_BIT(3) #define NHTM_MODE_CAPTURE PPC_BITMASK(4,12) #define NHTM_MODE_CAPTURE_PMISC PPC_BIT(5) #define NHTM_MODE_CRESP_PRECISE PPC_BIT(6) #define CHTM_MODE_NO_ASSERT_LLAT_L3 PPC_BIT(6) #define HTM_MODE_WRAP PPC_BIT(13) +#define HTM_MODE_DIS_TIMESTAMP PPC_BIT(14) +#define HTM_MODE_FULL_ON_ERR PPC_BIT(8) +#define HTM_MODE_DISABLE_STALL PPC_BIT(16) #define HTM_MEMORY_CONF 1 #define HTM_MEM_ALLOC PPC_BIT(0) #define HTM_MEM_SCOPE PPC_BITMASK(1,3) @@ -105,6 +124,8 @@ #define HTM2_STATUS_STATE_MASK (PPC_BITMASK(28,36) | HTM_STATUS_REPAIR) #define HTM2_STATUS_ERROR_MASK (HTM_STATUS_CRESP_OV | PPC_BITMASK(24,27) | PPC_BITMASK(37,39)) #define HTM_STATUS_MASK PPC_BITMASK(2,19) +#define HTM_STATUS_PURGING PPC_BIT(0) +#define HTM_STATUS_PURGED PPC_BIT(1) #define HTM_STATUS_CRESP_OV PPC_BIT(2) #define HTM_STATUS_REPAIR PPC_BIT(3) #define HTM_STATUS_BUF_WAIT PPC_BIT(4) @@ -139,7 +160,11 @@ #define HTM_TRIG_MARK_TYPE PPC_BITMASK(6,15) #define HTM_TRIGGER_CONTROL (5 + dual_htm_offset) #define HTM_CTRL_TRIG PPC_BITMASK(0,1) +#define HTM_CTRL_MTSPR_TRIG PPC_BIT(2) +#define HTM_CTRL_MTSPR_MARKER PPC_BIT(3) #define HTM_CTRL_MASK PPC_BITMASK(4,5) +#define HTM_CTRL_DBG_TRIG0 PPC_BIT(6) +#define HTM_CTRL_DBG_TRIG1 PPC_BIT(7) #define HTM_CTRL_XSTOP_STOP PPC_BIT(13) #define NHTM_FILTER_CONTROL (6 + dual_htm_offset) #define NHTM_FILTER_RCMD_SCOPE PPC_BITMASK(17,19) @@ -163,6 +188,10 @@ #define NHTM_FLEX_DEFAULT_P10 0xCB34561567 #define NHTM_ADDR_PAT 0xb #define NHTM_ADDR_PAT_MASK PPC_BITMASK(0, 55) +#define CHTM_PDBAR 0x0b +#define CHTM_PDBAR_PARITY PPC_BIT(0) +#define CHTM_PDBAR_SCOPE PPC_BITMASK(5, 7) +#define CHTM_PDBAR_ADDR PPC_BITMASK(12, 52) #define NHTM_ADDR_MASK 0xc #define NHTM_ADDR_MASK_MASK PPC_BITMASK(0, 55) #define NHTM_STOP_FILTER 0xd @@ -452,6 +481,9 @@ static int get_status(struct htm *htm, struct htm_status *status) if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { status->mem_size_select = val & HTM_MEM_SIZE_SMALL_P10; status->mem_base = val & HTM_MEM_BASE_P10; + } else if (pdbg_target_compatible(&htm->target, "ibm,power10-chtm")) { + status->mem_size_select = val & HTM_MEM_SIZE_SMALL_P10; + status->mem_base = val & HTM_MEM_BASE_P10; } else { status->mem_size_select = val & HTM_MEM_SIZE_SMALL; status->mem_base = val & HTM_MEM_BASE; @@ -596,7 +628,8 @@ static int configure_chtm(struct htm *htm, bool wrap) val = wrap ? HTM_MODE_WRAP : 0; if (HTM_ERR(pib_write(&htm->target, HTM_COLLECTION_MODE, - HTM_MODE_ENABLE | val))) + HTM_MODE_ENABLE | HTM_MODE_DIS_TIMESTAMP | + HTM_MODE_CORE_TRACE_EN | val))) return -1; if (htm->configure && htm->configure(htm) < 0) @@ -605,6 +638,22 @@ static int configure_chtm(struct htm *htm, bool wrap) return 0; } +static int do_configure_chtm_p10(struct htm *htm) +{ + struct pdbg_target *core; + uint64_t mask; + + /* P10 only: mask PC Logic checkstop in wrapping mode */ + if (pdbg_target_compatible(&htm->target, "ibm,power10-chtm")) { + core = pdbg_target_require_parent("core", &htm->target); + if (HTM_ERR(pib_read(core, CORE_FIR_MASK, &mask))) + return -1; + if (HTM_ERR(pib_write(core, CORE_FIR_MASK, mask | CORE_FIR_PC_LOGIC))) + return -1; + } + return 0; +} + static int do_configure_chtm_p8(struct htm *htm) { uint64_t hid0, ncu; @@ -644,6 +693,25 @@ static int deconfigure_chtm(struct htm *htm) return 0; } +static int do_deconfigure_chtm_p10(struct htm *htm) +{ + struct pdbg_target *core; + uint64_t mask; + + if (pdbg_target_compatible(&htm->target, "ibm,power10-chtm")) { + core = pdbg_target_require_parent("core", &htm->target); + /* clear fir first before unmasking it */ + if (HTM_ERR(pib_write(core, CORE_FIR_AND, ~CORE_FIR_PC_LOGIC))) + return -1; + if (HTM_ERR(pib_read(core, CORE_FIR_MASK, &mask))) + return -1; + if (HTM_ERR(pib_write(core, CORE_FIR_MASK, mask & ~CORE_FIR_PC_LOGIC))) + return -1; + } + + return 0; +} + static int do_deconfigure_chtm_p8(struct htm *htm) { struct pdbg_target *core; @@ -898,6 +966,8 @@ static int configure_memory(struct htm *htm) small = 1; if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) val = SETFIELD(HTM_MEM_SIZE_SMALL_P10, val, small); + else if (pdbg_target_compatible(&htm->target, "ibm,power10-chtm")) + val = SETFIELD(HTM_MEM_SIZE_SMALL_P10, val, small); else val = SETFIELD(HTM_MEM_SIZE_SMALL, val, small); shift = 29; /* large */ @@ -914,6 +984,8 @@ static int configure_memory(struct htm *htm) */ if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) val = SETFIELD(HTM_MEM_BASE_P10, val, 0); + else if (pdbg_target_compatible(&htm->target, "ibm,power10-chtm")) + val = SETFIELD(HTM_MEM_BASE_P10, val, 0); else val = SETFIELD(HTM_MEM_BASE, val, 0); val |= base; @@ -971,6 +1043,41 @@ static int do_post_configure_chtm_p8(struct htm *htm) return 0; } +static int do_post_configure_chtm_p10(struct htm *htm) +{ + struct pdbg_target *core; + uint64_t hid0; + + if (pdbg_target_compatible(&htm->target, "ibm,power10-chtm")) { + core = pdbg_target_require_parent("core", &htm->target); + if (HTM_ERR(pib_read(core, HIDQ_REGISTER, &hid0))) + return -1; + hid0 = HIDQ_ONE_PPC | HIDQ_DIS_PROC_REC | HIDQ_HILE; + if (HTM_ERR(pib_write(core, HIDQ_REGISTER, hid0))) + return -1; + hid0 |= HIDQ_EN_INST_TRACE; + if (HTM_ERR(pib_write(core, HIDQ_REGISTER, hid0))) + return -1; + } + + return 0; +} + +static int do_pre_deconfigure_chtm_p10(struct htm *htm) +{ + struct pdbg_target *core; + uint64_t hid0; + + if (pdbg_target_compatible(&htm->target, "ibm,power10-chtm")) { + core = pdbg_target_require_parent("core", &htm->target); + hid0 = HIDQ_DIS_PROC_REC | HIDQ_HILE; + if (HTM_ERR(pib_write(core, HIDQ_REGISTER, hid0))) + return -1; + } + + return 0; +} + static int __do_htm_start(struct htm *htm, bool wrap) { struct htm_status status; @@ -993,6 +1100,13 @@ static int __do_htm_start(struct htm *htm, bool wrap) if (HTM_ERR(pib_write(&htm->target, HTM_SCOM_TRIGGER, HTM_TRIG_START))) return -1; + while (1) { + if (HTM_ERR(get_status(htm, &status))) + return -1; + if (status.state == TRACING) + break; + } + if (htm->post_configure && htm->post_configure(htm)) return -1; @@ -1014,6 +1128,7 @@ static int do_htm_start(struct htm *htm) static int do_htm_stop(struct htm *htm) { struct htm_status status; + get_status(htm, &status); if (HTM_ERR(get_status(htm, &status))) return -1; @@ -1022,6 +1137,10 @@ static int do_htm_stop(struct htm *htm) PR_INFO("* Skipping STOP trigger, HTM appears uninitialized\n"); return -1; } + + if (htm->pre_deconfigure && htm->pre_deconfigure(htm) < 0) + return -1; + if (status.state == TRACING) { PR_INFO("* Sending STOP trigger to HTM\n"); if (HTM_ERR(pib_write(&htm->target, HTM_SCOM_TRIGGER, HTM_TRIG_STOP))) @@ -1222,7 +1341,8 @@ static int do_htm_dump(struct htm *htm, char *filename) goto out3; } - if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm") || + pdbg_target_compatible(&htm->target, "ibm,power10-chtm")) { lseek(trace_fd, 8, SEEK_SET); r = read(trace_fd, &eyecatcher, 8); } else { @@ -1412,6 +1532,25 @@ static struct htm p10_nhtm = { }; DECLARE_HW_UNIT(p10_nhtm); +static struct htm p10_chtm = { + .target = { + .name = "POWER10 Core HTM", + .compatible = "ibm,power10-chtm", + .class = "chtm", + .probe = chtm_probe, + }, + .start = do_htm_start, + .stop = do_htm_stop, + .record = do_htm_record, + .status = do_htm_status, + .dump = do_htm_dump, + .configure = do_configure_chtm_p10, + .deconfigure = do_deconfigure_chtm_p10, + .post_configure = do_post_configure_chtm_p10, + .pre_deconfigure = do_pre_deconfigure_chtm_p10, +}; +DECLARE_HW_UNIT(p10_chtm); + __attribute__((constructor)) static void register_htm(void) { @@ -1419,4 +1558,5 @@ static void register_htm(void) pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_nhtm_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_nhtm_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p8_chtm_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_chtm_hw_unit); } diff --git a/libpdbg/hwunit.h b/libpdbg/hwunit.h index b8504b187d15..a7f215d71555 100644 --- a/libpdbg/hwunit.h +++ b/libpdbg/hwunit.h @@ -61,6 +61,7 @@ struct htm { int (*configure)(struct htm *); int (*deconfigure)(struct htm *); int (*post_configure)(struct htm *); + int (*pre_deconfigure)(struct htm *); }; #define target_to_htm(x) container_of(x, struct htm, target) From patchwork Thu Nov 25 00:41:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1559485 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; 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[159.196.117.139]) by smtp.gmail.com with ESMTPSA id fw21sm5490326pjb.25.2021.11.24.16.42.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 16:42:05 -0800 (PST) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Thu, 25 Nov 2021 11:41:37 +1100 Message-Id: <20211125004138.120917-9-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211125004138.120917-1-jniethe5@gmail.com> References: <20211125004138.120917-1-jniethe5@gmail.com> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 8/9] htm: Only check threads for smt1 on target core X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Targeting every thread is not necessary, instead only target the threads of the targeted core. Signed-off-by: Jordan Niethe --- src/htm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/htm.c b/src/htm.c index c8502d5ad6d6..f55f3753b083 100644 --- a/src/htm.c +++ b/src/htm.c @@ -291,7 +291,7 @@ int run_htm(int optind, int argc, char *argv[]) } /* Check that powersave is off */ - pdbg_for_each_class_target("thread", target) { + pdbg_for_each_target("thread", core_target, target) { status = pdbg_target_probe(target); if (status == PDBG_TARGET_NONEXISTENT) continue; From patchwork Thu Nov 25 00:41:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1559486 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=qp51cUaH; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4Hzzbm0bYmz9sVc for ; Thu, 25 Nov 2021 11:42:12 +1100 (AEDT) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4Hzzbl6n6mz2ypR for ; Thu, 25 Nov 2021 11:42:11 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=qp51cUaH; dkim-atps=neutral X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::52a; helo=mail-pg1-x52a.google.com; envelope-from=jniethe5@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=qp51cUaH; dkim-atps=neutral Received: from mail-pg1-x52a.google.com (mail-pg1-x52a.google.com [IPv6:2607:f8b0:4864:20::52a]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4Hzzbj68lRz2ywg for ; Thu, 25 Nov 2021 11:42:09 +1100 (AEDT) Received: by mail-pg1-x52a.google.com with SMTP id r138so3578137pgr.13 for ; Wed, 24 Nov 2021 16:42:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+z8XQdVfx6IFgg4BZVIX3PNHYsU7roiyzFwemByLqDk=; b=qp51cUaHi8kpFVClBzmakyyDABroWYY+KQ2z4V1nA50iIXeQW26P/Zg22/KpOq/zc9 YGiIF1f8oPjW24nUpIERFrUOUQ2hyLLVyIPmOd3NlAfvLkvr7z3LYjA9dfTzqAX00AzM V10Q1ssnq4i3XgE/nyTbyfRBP16Q3vtTrUGFY2utz0tyvnSmX9c8DU+nnEDexz59yOmV 3q5/RkMkJyjmzoypt/X71DXsJm9Nb2Swbvs1c9rlyx4aov0LVjxCuqPoBe9goG56JMOs MAXu/WPDDGWU92zDmANAIK1YWlmDsECkVWbAHOQD3+UF7IlBcH7NRYg0pQ49Xr5Z0Jmm HNhg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+z8XQdVfx6IFgg4BZVIX3PNHYsU7roiyzFwemByLqDk=; b=SsiirGIspQoykeVKXIZIkJKpbhEZ1dIQa9uVauKsmx6rVimTRv1I6kLCxGzRv1cpjr 4KEodwiRAGrGZY0L+Sb8lqYrCbCWo7OxZ61f6xG7HhWoeudD4e8eaZk5IHlbWdn05RuF +QS5umBydAXjE7f/nuly1QHGKgiuwUhnaZJUZ0cJF/cPRcIypxtwp67lKMlHoNJXCoUJ GRMq/wmYFOz03X5ld70JIaqiTr7j3LHx3C3p9fDGy2N9FSWFnYUEXyE1FJlPn3j85t82 4hxpllnAmKK4cZgp5Km1Br+ktc4lZMzzoBridwxiXjRhdYxVG4L1eNqd27CnDnMVQqnm Swkw== X-Gm-Message-State: AOAM531+F697RjmUzgE4G9Uxvl27vRp7eRCo5OwUrzEXgmrZW8M2v57q cnI1PwSjmYiZquI0tdErMP8b5hQ9J0I= X-Google-Smtp-Source: ABdhPJyltsNOufrwWGUInyTgu8KjGCM3GoWdvCwEYVZCQYYjd2om/ne4Y4o28Fm4Y1s9rvFVxnxfMw== X-Received: by 2002:a05:6a00:10cf:b0:4a3:124d:bb81 with SMTP id d15-20020a056a0010cf00b004a3124dbb81mr10740524pfu.75.1637800927356; Wed, 24 Nov 2021 16:42:07 -0800 (PST) Received: from tee480.ibm.com (159-196-117-139.9fc475.syd.nbn.aussiebb.net. [159.196.117.139]) by smtp.gmail.com with ESMTPSA id fw21sm5490326pjb.25.2021.11.24.16.42.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 16:42:07 -0800 (PST) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Thu, 25 Nov 2021 11:41:38 +1100 Message-Id: <20211125004138.120917-10-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211125004138.120917-1-jniethe5@gmail.com> References: <20211125004138.120917-1-jniethe5@gmail.com> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v2 9/9] htm: Check threads !active instead of quiesced X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" The P10 thread_state quiesced status is maint_mode && thread_quiesced && ict_empty which is more than is needed for taking a core HTM trace. Instead check the secondary threads are !active. Signed-off-by: Jordan Niethe --- src/htm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/htm.c b/src/htm.c index f55f3753b083..613475c282df 100644 --- a/src/htm.c +++ b/src/htm.c @@ -230,6 +230,12 @@ static bool is_smt1(struct pdbg_target *target) } /* secondary thread */ + if (pdbg_target_compatible(target, "ibm,power10-thread")) { + if (!thread_status(target).active) + return true; + goto fail; + } + if (thread_status(target).quiesced) return true;