From patchwork Tue Nov 23 07:31:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 1558376 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HyxNw4xcXz9sRN for ; Tue, 23 Nov 2021 18:59:12 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234468AbhKWICS (ORCPT ); Tue, 23 Nov 2021 03:02:18 -0500 Received: from inva020.nxp.com ([92.121.34.13]:49840 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234458AbhKWICR (ORCPT ); Tue, 23 Nov 2021 03:02:17 -0500 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 075441A0571; Tue, 23 Nov 2021 08:59:09 +0100 (CET) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 8A0A91A054A; Tue, 23 Nov 2021 08:59:08 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id A3B7F183AD05; Tue, 23 Nov 2021 15:59:05 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, broonie@kernel.org, lorenzo.pieralisi@arm.com, jingoohan1@gmail.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de Subject: [RESEND v4 1/6] PCI: imx6: Encapsulate the clock enable into one standalone function Date: Tue, 23 Nov 2021 15:31:52 +0800 Message-Id: <1637652717-17313-2-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1637652717-17313-1-git-send-email-hongxing.zhu@nxp.com> References: <1637652717-17313-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org No function changes, just encapsulate the i.MX PCIe clocks enable operations into one standalone function Signed-off-by: Richard Zhu Reviewed-by: Lucas Stach --- drivers/pci/controller/dwc/pci-imx6.c | 79 ++++++++++++++++----------- 1 file changed, 48 insertions(+), 31 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index fe9842f24093..3bf041314ba7 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -470,38 +470,16 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) return ret; } -static void imx7d_pcie_wait_for_phy_pll_lock(struct imx6_pcie *imx6_pcie) -{ - u32 val; - struct device *dev = imx6_pcie->pci->dev; - - if (regmap_read_poll_timeout(imx6_pcie->iomuxc_gpr, - IOMUXC_GPR22, val, - val & IMX7D_GPR22_PCIE_PHY_PLL_LOCKED, - PHY_PLL_LOCK_WAIT_USLEEP_MAX, - PHY_PLL_LOCK_WAIT_TIMEOUT)) - dev_err(dev, "PCIe PLL lock timeout\n"); -} - -static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) +static int imx6_pcie_clk_enable(struct imx6_pcie *imx6_pcie) { struct dw_pcie *pci = imx6_pcie->pci; struct device *dev = pci->dev; int ret; - if (imx6_pcie->vpcie && !regulator_is_enabled(imx6_pcie->vpcie)) { - ret = regulator_enable(imx6_pcie->vpcie); - if (ret) { - dev_err(dev, "failed to enable vpcie regulator: %d\n", - ret); - return; - } - } - ret = clk_prepare_enable(imx6_pcie->pcie_phy); if (ret) { dev_err(dev, "unable to enable pcie_phy clock\n"); - goto err_pcie_phy; + return ret; } ret = clk_prepare_enable(imx6_pcie->pcie_bus); @@ -524,6 +502,51 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) /* allow the clocks to stabilize */ usleep_range(200, 500); + return 0; + +err_ref_clk: + clk_disable_unprepare(imx6_pcie->pcie); +err_pcie: + clk_disable_unprepare(imx6_pcie->pcie_bus); +err_pcie_bus: + clk_disable_unprepare(imx6_pcie->pcie_phy); + + return ret; +} + +static void imx7d_pcie_wait_for_phy_pll_lock(struct imx6_pcie *imx6_pcie) +{ + u32 val; + struct device *dev = imx6_pcie->pci->dev; + + if (regmap_read_poll_timeout(imx6_pcie->iomuxc_gpr, + IOMUXC_GPR22, val, + val & IMX7D_GPR22_PCIE_PHY_PLL_LOCKED, + PHY_PLL_LOCK_WAIT_USLEEP_MAX, + PHY_PLL_LOCK_WAIT_TIMEOUT)) + dev_err(dev, "PCIe PLL lock timeout\n"); +} + +static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) +{ + struct dw_pcie *pci = imx6_pcie->pci; + struct device *dev = pci->dev; + int ret; + + if (imx6_pcie->vpcie && !regulator_is_enabled(imx6_pcie->vpcie)) { + ret = regulator_enable(imx6_pcie->vpcie); + if (ret) { + dev_err(dev, "failed to enable vpcie regulator: %d\n", + ret); + return; + } + } + + ret = imx6_pcie_clk_enable(imx6_pcie); + if (ret) { + dev_err(dev, "unable to enable pcie clocks\n"); + goto err_clks; + } /* Some boards don't have PCIe reset GPIO. */ if (gpio_is_valid(imx6_pcie->reset_gpio)) { @@ -578,13 +601,7 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) return; -err_ref_clk: - clk_disable_unprepare(imx6_pcie->pcie); -err_pcie: - clk_disable_unprepare(imx6_pcie->pcie_bus); -err_pcie_bus: - clk_disable_unprepare(imx6_pcie->pcie_phy); -err_pcie_phy: +err_clks: if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0) { ret = regulator_disable(imx6_pcie->vpcie); if (ret) From patchwork Tue Nov 23 07:31:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 1558377 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HyxNy1VJ6z9sRN for ; Tue, 23 Nov 2021 18:59:14 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234514AbhKWICU (ORCPT ); Tue, 23 Nov 2021 03:02:20 -0500 Received: from inva020.nxp.com ([92.121.34.13]:49914 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234488AbhKWICT (ORCPT ); Tue, 23 Nov 2021 03:02:19 -0500 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 6A97B1A054A; Tue, 23 Nov 2021 08:59:11 +0100 (CET) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 309381A058C; Tue, 23 Nov 2021 08:59:11 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 42520183AC4E; Tue, 23 Nov 2021 15:59:08 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, broonie@kernel.org, lorenzo.pieralisi@arm.com, jingoohan1@gmail.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de Subject: [RESEND v4 2/6] PCI: imx6: Add the error propagation from host_init Date: Tue, 23 Nov 2021 15:31:53 +0800 Message-Id: <1637652717-17313-3-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1637652717-17313-1-git-send-email-hongxing.zhu@nxp.com> References: <1637652717-17313-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Since there is error return check of the host_init callback, add error check to imx6_pcie_deassert_core_reset() function, and change the function type accordingly. Signed-off-by: Richard Zhu Reviewed-by: Lucas Stach --- drivers/pci/controller/dwc/pci-imx6.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 3bf041314ba7..65a10b048a8b 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -527,24 +527,24 @@ static void imx7d_pcie_wait_for_phy_pll_lock(struct imx6_pcie *imx6_pcie) dev_err(dev, "PCIe PLL lock timeout\n"); } -static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) +static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) { struct dw_pcie *pci = imx6_pcie->pci; struct device *dev = pci->dev; - int ret; + int ret, err; if (imx6_pcie->vpcie && !regulator_is_enabled(imx6_pcie->vpcie)) { ret = regulator_enable(imx6_pcie->vpcie); if (ret) { dev_err(dev, "failed to enable vpcie regulator: %d\n", ret); - return; + return ret; } } - ret = imx6_pcie_clk_enable(imx6_pcie); - if (ret) { - dev_err(dev, "unable to enable pcie clocks\n"); + err = imx6_pcie_clk_enable(imx6_pcie); + if (err) { + dev_err(dev, "unable to enable pcie clocks: %d\n", err); goto err_clks; } @@ -599,7 +599,7 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) break; } - return; + return 0; err_clks: if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0) { @@ -608,6 +608,7 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) dev_err(dev, "failed to disable vpcie regulator: %d\n", ret); } + return err; } static void imx6_pcie_configure_type(struct imx6_pcie *imx6_pcie) @@ -858,11 +859,18 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) static int imx6_pcie_host_init(struct pcie_port *pp) { struct dw_pcie *pci = to_dw_pcie_from_pp(pp); + struct device *dev = pci->dev; struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci); + int ret; imx6_pcie_assert_core_reset(imx6_pcie); imx6_pcie_init_phy(imx6_pcie); - imx6_pcie_deassert_core_reset(imx6_pcie); + ret = imx6_pcie_deassert_core_reset(imx6_pcie); + if (ret < 0) { + dev_err(dev, "pcie host init failed: %d.\n", ret); + return ret; + } + imx6_setup_phy_mpll(imx6_pcie); return 0; From patchwork Tue Nov 23 07:31:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 1558378 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HyxP40hZ3z9sRN for ; Tue, 23 Nov 2021 18:59:20 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234531AbhKWIC0 (ORCPT ); Tue, 23 Nov 2021 03:02:26 -0500 Received: from inva021.nxp.com ([92.121.34.21]:34584 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234535AbhKWICX (ORCPT ); Tue, 23 Nov 2021 03:02:23 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 99D53200840; Tue, 23 Nov 2021 08:59:14 +0100 (CET) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 66F88200804; Tue, 23 Nov 2021 08:59:14 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id E6AF9183AD05; Tue, 23 Nov 2021 15:59:10 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, broonie@kernel.org, lorenzo.pieralisi@arm.com, jingoohan1@gmail.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de Subject: [RESEND v4 3/6] PCI: imx6: PCI: imx6: Move imx6_pcie_clk_disable() earlier Date: Tue, 23 Nov 2021 15:31:54 +0800 Message-Id: <1637652717-17313-4-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1637652717-17313-1-git-send-email-hongxing.zhu@nxp.com> References: <1637652717-17313-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Just move the imx6_pcie_clk_disable() to an earlier place without function changes, since it wouldn't be only used in imx6_pcie_suspend_noirq() later. Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 46 +++++++++++++-------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 65a10b048a8b..11265c5e5782 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -514,6 +514,29 @@ static int imx6_pcie_clk_enable(struct imx6_pcie *imx6_pcie) return ret; } +static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) +{ + clk_disable_unprepare(imx6_pcie->pcie); + clk_disable_unprepare(imx6_pcie->pcie_phy); + clk_disable_unprepare(imx6_pcie->pcie_bus); + + switch (imx6_pcie->drvdata->variant) { + case IMX6SX: + clk_disable_unprepare(imx6_pcie->pcie_inbound_axi); + break; + case IMX7D: + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, + IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, + IMX7D_GPR12_PCIE_PHY_REFCLK_SEL); + break; + case IMX8MQ: + clk_disable_unprepare(imx6_pcie->pcie_aux); + break; + default: + break; + } +} + static void imx7d_pcie_wait_for_phy_pll_lock(struct imx6_pcie *imx6_pcie) { u32 val; @@ -940,29 +963,6 @@ static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie) usleep_range(1000, 10000); } -static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) -{ - clk_disable_unprepare(imx6_pcie->pcie); - clk_disable_unprepare(imx6_pcie->pcie_phy); - clk_disable_unprepare(imx6_pcie->pcie_bus); - - switch (imx6_pcie->drvdata->variant) { - case IMX6SX: - clk_disable_unprepare(imx6_pcie->pcie_inbound_axi); - break; - case IMX7D: - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, - IMX7D_GPR12_PCIE_PHY_REFCLK_SEL); - break; - case IMX8MQ: - clk_disable_unprepare(imx6_pcie->pcie_aux); - break; - default: - break; - } -} - static int imx6_pcie_suspend_noirq(struct device *dev) { struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); From patchwork Tue Nov 23 07:31:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 1558379 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HyxP93Hwpz9sRN for ; Tue, 23 Nov 2021 18:59:25 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234513AbhKWICb (ORCPT ); Tue, 23 Nov 2021 03:02:31 -0500 Received: from inva020.nxp.com ([92.121.34.13]:50036 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234540AbhKWIC0 (ORCPT ); Tue, 23 Nov 2021 03:02:26 -0500 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 4AD881A054A; Tue, 23 Nov 2021 08:59:18 +0100 (CET) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 0FEFA1A0571; Tue, 23 Nov 2021 08:59:18 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 3FCAA183ACCB; Tue, 23 Nov 2021 15:59:14 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, broonie@kernel.org, lorenzo.pieralisi@arm.com, jingoohan1@gmail.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de Subject: [RESEND v4 4/6] PCI: dwc: Add dw_pcie_host_ops.host_exit() callback Date: Tue, 23 Nov 2021 15:31:55 +0800 Message-Id: <1637652717-17313-5-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1637652717-17313-1-git-send-email-hongxing.zhu@nxp.com> References: <1637652717-17313-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org When link is never came up in the link training after host_init. The clocks and power supplies usage counter balance should be handled properly on some DWC platforms (for example, i.MX PCIe). Add a new host_exit() callback into dw_pcie_host_ops, then it could be invoked to handle the unbalance issue in the error handling after host_init() function when link is down. Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/pcie-designware-host.c | 5 ++++- drivers/pci/controller/dwc/pcie-designware.h | 1 + 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index f4755f3a03be..461863bde3c9 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -405,7 +405,7 @@ int dw_pcie_host_init(struct pcie_port *pp) if (!dw_pcie_link_up(pci) && pci->ops && pci->ops->start_link) { ret = pci->ops->start_link(pci); if (ret) - goto err_free_msi; + goto err_host_init; } /* Ignore errors, the link may come up later */ @@ -417,6 +417,9 @@ int dw_pcie_host_init(struct pcie_port *pp) if (!ret) return 0; +err_host_init: + if (pp->ops->host_exit) + pp->ops->host_exit(pp); err_free_msi: if (pp->has_msi_ctrl) dw_pcie_free_msi(pp); diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 7d6e9b7576be..1153687ea9a6 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -174,6 +174,7 @@ enum dw_pcie_device_mode { struct dw_pcie_host_ops { int (*host_init)(struct pcie_port *pp); + void (*host_exit)(struct pcie_port *pp); int (*msi_host_init)(struct pcie_port *pp); }; From patchwork Tue Nov 23 07:31:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 1558380 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HyxPB16hvz9sRN for ; Tue, 23 Nov 2021 18:59:26 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234338AbhKWICc (ORCPT ); Tue, 23 Nov 2021 03:02:32 -0500 Received: from inva020.nxp.com ([92.121.34.13]:50192 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234596AbhKWICa (ORCPT ); Tue, 23 Nov 2021 03:02:30 -0500 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id EE64E1A309C; Tue, 23 Nov 2021 08:59:21 +0100 (CET) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 866461A058C; Tue, 23 Nov 2021 08:59:21 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id E1693183AC4E; Tue, 23 Nov 2021 15:59:17 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, broonie@kernel.org, lorenzo.pieralisi@arm.com, jingoohan1@gmail.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de Subject: [RESEND v4 5/6] PCI: imx6: Fix the regulator dump when link never came up Date: Tue, 23 Nov 2021 15:31:56 +0800 Message-Id: <1637652717-17313-6-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1637652717-17313-1-git-send-email-hongxing.zhu@nxp.com> References: <1637652717-17313-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org When PCIe PHY link never came up and vpcie regulator is present, there would be following dump when try to put the regulator. Add a new host_exit() callback for i.MX PCIe driver to disable this regulator and fix this dump when link never came up. The driver should undo any enables it did itself, and not undo any enables that anything else did which means it should never be basing decisions on regulator_is_enabled(). To keep usage counter balance of the clocks, powers and so on. Do the clock disable in the error handling after host_init too. imx6q-pcie 33800000.pcie: Phy link never came up imx6q-pcie: probe of 33800000.pcie failed with error -110 ------------[ cut here ]------------ WARNING: CPU: 3 PID: 119 at drivers/regulator/core.c:2256 _regulator_put.part.0+0x14c/0x158 Modules linked in: CPU: 3 PID: 119 Comm: kworker/u8:2 Not tainted 5.13.0-rc7-next-20210625-94710-ge4e92b2588a3 #10 Hardware name: FSL i.MX8MM EVK board (DT) Workqueue: events_unbound async_run_entry_fn pstate: 80000005 (Nzcv daif -PAN -UAO -TCO BTYPE=--) pc : _regulator_put.part.0+0x14c/0x158 lr : regulator_put+0x34/0x48 sp : ffff8000122ebb30 x29: ffff8000122ebb30 x28: ffff800011be7000 x27: 0000000000000000 x26: 0000000000000000 x25: 0000000000000000 x24: ffff00000025f2bc x23: ffff00000025f2c0 x22: ffff00000025f010 x21: ffff8000122ebc18 x20: ffff800011e3fa60 x19: ffff00000375fd80 x18: 0000000000000010 x17: 000000040044ffff x16: 00400032b5503510 x15: 0000000000000108 x14: ffff0000003cc938 x13: 00000000ffffffea x12: 0000000000000000 x11: 0000000000000000 x10: ffff80001076ba88 x9 : ffff80001076a540 x8 : ffff00000025f2c0 x7 : ffff0000001f4450 x6 : ffff000000176cd8 x5 : ffff000003857880 x4 : 0000000000000000 x3 : ffff800011e3fe30 x2 : ffff0000003cc4c0 x1 : 0000000000000000 x0 : 0000000000000001 Call trace: _regulator_put.part.0+0x14c/0x158 regulator_put+0x34/0x48 devm_regulator_release+0x10/0x18 release_nodes+0x38/0x60 devres_release_all+0x88/0xd0 really_probe+0xd0/0x2e8 __driver_probe_device+0x74/0xd8 driver_probe_device+0x7c/0x108 __device_attach_driver+0x8c/0xd0 bus_for_each_drv+0x74/0xc0 __device_attach_async_helper+0xb4/0xd8 async_run_entry_fn+0x30/0x100 process_one_work+0x19c/0x320 worker_thread+0x48/0x418 kthread+0x14c/0x158 ret_from_fork+0x10/0x18 ---[ end trace 3664ca4a50ce849b ]--- Link: https://lore.kernel.org/r/20201105211159.1814485-11-robh@kernel.org Fixes: 886a9c134755 ("PCI: dwc: Move link handling into common code") Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 11265c5e5782..8be4b8a9b564 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -366,8 +366,6 @@ static int imx6_pcie_attach_pd(struct device *dev) static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) { - struct device *dev = imx6_pcie->pci->dev; - switch (imx6_pcie->drvdata->variant) { case IMX7D: case IMX8MQ: @@ -395,14 +393,6 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16); break; } - - if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0) { - int ret = regulator_disable(imx6_pcie->vpcie); - - if (ret) - dev_err(dev, "failed to disable vpcie regulator: %d\n", - ret); - } } static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie) @@ -556,7 +546,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) struct device *dev = pci->dev; int ret, err; - if (imx6_pcie->vpcie && !regulator_is_enabled(imx6_pcie->vpcie)) { + if (imx6_pcie->vpcie) { ret = regulator_enable(imx6_pcie->vpcie); if (ret) { dev_err(dev, "failed to enable vpcie regulator: %d\n", @@ -625,7 +615,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) return 0; err_clks: - if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0) { + if (imx6_pcie->vpcie) { ret = regulator_disable(imx6_pcie->vpcie); if (ret) dev_err(dev, "failed to disable vpcie regulator: %d\n", @@ -875,7 +865,6 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n", dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0), dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1)); - imx6_pcie_reset_phy(imx6_pcie); return ret; } @@ -899,8 +888,20 @@ static int imx6_pcie_host_init(struct pcie_port *pp) return 0; } +static void imx6_pcie_host_exit(struct pcie_port *pp) +{ + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); + struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci); + + imx6_pcie_reset_phy(imx6_pcie); + imx6_pcie_clk_disable(imx6_pcie); + if (imx6_pcie->vpcie) + regulator_disable(imx6_pcie->vpcie); +} + static const struct dw_pcie_host_ops imx6_pcie_host_ops = { .host_init = imx6_pcie_host_init, + .host_exit = imx6_pcie_host_exit, }; static const struct dw_pcie_ops dw_pcie_ops = { From patchwork Tue Nov 23 07:31:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 1558381 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HyxPF3fjTz9sRN for ; Tue, 23 Nov 2021 18:59:29 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234616AbhKWICe (ORCPT ); Tue, 23 Nov 2021 03:02:34 -0500 Received: from inva021.nxp.com ([92.121.34.21]:34696 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234555AbhKWICd (ORCPT ); Tue, 23 Nov 2021 03:02:33 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 9D4C120082E; Tue, 23 Nov 2021 08:59:24 +0100 (CET) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2A8B4200804; Tue, 23 Nov 2021 08:59:24 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 27B8A183ACCB; Tue, 23 Nov 2021 15:59:21 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, broonie@kernel.org, lorenzo.pieralisi@arm.com, jingoohan1@gmail.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de Subject: [RESEND v4 6/6] PCI: imx6: Add the compliance tests mode support Date: Tue, 23 Nov 2021 15:31:57 +0800 Message-Id: <1637652717-17313-7-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1637652717-17313-1-git-send-email-hongxing.zhu@nxp.com> References: <1637652717-17313-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Refer to the system board signal Quality of PCIe archiecture PHY test specification. Signal quality tests(for example: jitters, differential eye opening and so on ) can be executed with devices in the polling.compliance state. To let the device support polling.compliance stat, the clocks and powers shouldn't be turned off when the probe of device driver is failed. Based on CLB(Compliance Load Board) Test Fixture and so on test equipments, the PHY link would be down during the compliance tests. Refer to this scenario, add the i.MX PCIe compliance tests mode enable support, and keep the clocks and powers on, and finish the driver probe without error return. Use the "pci_imx6.compliance=1" in kernel command line to enable the compliance tests mode. Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 33 +++++++++++++++++++-------- 1 file changed, 24 insertions(+), 9 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 8be4b8a9b564..d6769f95ca4e 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -143,6 +143,10 @@ struct imx6_pcie { #define PHY_RX_OVRD_IN_LO_RX_DATA_EN BIT(5) #define PHY_RX_OVRD_IN_LO_RX_PLL_EN BIT(3) +static bool imx6_pcie_cmp_mode; +module_param_named(compliance, imx6_pcie_cmp_mode, bool, 0644); +MODULE_PARM_DESC(compliance, "i.MX PCIe compliance test mode (1=compliance test mode enabled)"); + static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, bool exp_val) { struct dw_pcie *pci = imx6_pcie->pci; @@ -802,10 +806,12 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) * started in Gen2 mode, there is a possibility the devices on the * bus will not be detected at all. This happens with PCIe switches. */ - tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP); - tmp &= ~PCI_EXP_LNKCAP_SLS; - tmp |= PCI_EXP_LNKCAP_SLS_2_5GB; - dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCAP, tmp); + if (!imx6_pcie_cmp_mode) { + tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP); + tmp &= ~PCI_EXP_LNKCAP_SLS; + tmp |= PCI_EXP_LNKCAP_SLS_2_5GB; + dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCAP, tmp); + } /* Start LTSSM. */ imx6_pcie_ltssm_enable(dev); @@ -893,10 +899,12 @@ static void imx6_pcie_host_exit(struct pcie_port *pp) struct dw_pcie *pci = to_dw_pcie_from_pp(pp); struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci); - imx6_pcie_reset_phy(imx6_pcie); - imx6_pcie_clk_disable(imx6_pcie); - if (imx6_pcie->vpcie) - regulator_disable(imx6_pcie->vpcie); + if (!imx6_pcie_cmp_mode) { + imx6_pcie_reset_phy(imx6_pcie); + imx6_pcie_clk_disable(imx6_pcie); + if (imx6_pcie->vpcie) + regulator_disable(imx6_pcie->vpcie); + } } static const struct dw_pcie_host_ops imx6_pcie_host_ops = { @@ -1182,8 +1190,15 @@ static int imx6_pcie_probe(struct platform_device *pdev) return ret; ret = dw_pcie_host_init(&pci->pp); - if (ret < 0) + if (ret < 0) { + if (imx6_pcie_cmp_mode) { + dev_info(dev, "Driver loaded with compliance test mode enabled.\n"); + ret = 0; + } else { + dev_err(dev, "Unable to add pcie port.\n"); + } return ret; + } if (pci_msi_enabled()) { u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_MSI);