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([83.218.251.13]) by smtp.gmail.com with ESMTPSA id j22sm680131lfu.155.2021.11.21.08.05.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Nov 2021 08:05:22 -0800 (PST) From: Oleksandr Suvorov To: u-boot@lists.denx.de Cc: Marcel Ziswiler , Philippe Schenker , Max Krummenacher , Michal Simek , Oleksandr Suvorov , Oleksandr Suvorov , Simon Glass , Heiko Schocher , Oleksandr Suvorov , Hannes Schmelzer , Harm Berntsen , Linus Walleij , Sebastian Reichel , Stefan Roese , Stephan Gerhold , Weijie Gao Subject: [PATCH v4 1/2] GPIO: fxl6408: Add support for FXL6408 GPIO expander Date: Sun, 21 Nov 2021 18:05:16 +0200 Message-Id: <20211121180505.v4.1.ce74fbdbdc@changeid> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211121160517.684719-1-oleksandr.suvorov@foundries.io> References: <20211121160517.684719-1-oleksandr.suvorov@foundries.io> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.37 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean From: Oleksandr Suvorov Initial support for Fairchild's 8 bit I2C gpio expander FXL6408. The CONFIG_FXL6408_GPIO define enables support for such devices. Based on: https://patchwork.kernel.org/patch/9148419/ Signed-off-by: Oleksandr Suvorov Reviewed-by: Simon Glass Tested-by: Marcel Ziswiler Reviewed-by: Heiko Schocher Signed-off-by: Oleksandr Suvorov --- (no changes since v3) Changes in v3: - fix a warning: ...drivers/gpio/gpio-fxl6408.c:348:15: warning: format ‘%ld’ expects argument of type ‘long int’, but argument 3 has type ‘int’ [-Wformat=]... - add Tested-by record. drivers/gpio/Kconfig | 7 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-fxl6408.c | 380 ++++++++++++++++++++++++++++++++++++ 3 files changed, 388 insertions(+) create mode 100644 drivers/gpio/gpio-fxl6408.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 40abc33772e..9ddda0ec41f 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -131,6 +131,13 @@ config DA8XX_GPIO help This driver supports the DA8xx GPIO controller +config FXL6408_GPIO + bool "FXL6408 I2C GPIO expander driver" + depends on DM_GPIO && DM_I2C + help + This driver supports the Fairchild FXL6408 device. FXL6408 is a + fully configurable 8-bit I2C-controlled GPIO expander. + config INTEL_BROADWELL_GPIO bool "Intel Broadwell GPIO driver" depends on DM diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 3c851b38c7c..68f541bba48 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_AT91_GPIO) += at91_gpio.o obj-$(CONFIG_ATMEL_PIO4) += atmel_pio4.o obj-$(CONFIG_BCM6345_GPIO) += bcm6345_gpio.o obj-$(CONFIG_CORTINA_GPIO) += cortina_gpio.o +obj-$(CONFIG_FXL6408_GPIO) += gpio-fxl6408.o obj-$(CONFIG_INTEL_GPIO) += intel_gpio.o obj-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o obj-$(CONFIG_INTEL_BROADWELL_GPIO) += intel_broadwell_gpio.o diff --git a/drivers/gpio/gpio-fxl6408.c b/drivers/gpio/gpio-fxl6408.c new file mode 100644 index 00000000000..902da050fbf --- /dev/null +++ b/drivers/gpio/gpio-fxl6408.c @@ -0,0 +1,380 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 Toradex + * Copyright (C) 2016 Broadcom + */ + +/** + * DOC: FXL6408 I2C to GPIO expander. + * + * This chip has 8 GPIO lines out of it, and is controlled by an I2C + * bus (a pair of lines), providing 4x expansion of GPIO lines. It + * also provides an interrupt line out for notifying of state changes. + * + * Any preconfigured state will be left in place until the GPIO lines + * get activated. At power on, everything is treated as an input, + * default input is HIGH and pulled-up, all interrupts are masked. + * + * Documentation can be found at: + * ------------------------------ + * + * https://www.fairchildsemi.com/datasheets/FX/FXL6408.pdf + * + * This driver bases on: + * --------------------- + * + * - the original driver by Eric Anholt : + * https://patchwork.kernel.org/patch/9148419/ + * - the Toradex version by Max Krummenacher : + * http://git.toradex.com/cgit/linux-toradex.git/tree/drivers/gpio/gpio-fxl6408.c?h=toradex_5.4-2.3.x-imx + * - the U-boot PCA953x driver by Peng Fan : + * drivers/gpio/pca953x_gpio.c + * + * TODO: + * - Add interrupts support + * - Replace deprecated callbacks direction_input/output() with set_flags() + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define REG_DEVID_CTRL 0x1 +# define SW_RST BIT(0) +# define RST_INT BIT(1) +/** 0b101 is the Manufacturer's ID assigned to Fairchild by Nokia */ +# define MF_ID_FAIRCHILD 5 + +/** Bits set here indicate that the GPIO is an output */ +#define REG_IO_DIR 0x3 + +/** + * REG_OUT_STATE - a high-output state register address + * + * Bits set here, when the corresponding bit of REG_IO_DIR is set, + * drive the output high instead of low. + */ +#define REG_OUT_STATE 0x5 + +/** Bits here make the output High-Z, instead of the OUTPUT value */ +#define REG_OUT_HIGH_Z 0x7 + +/** + * REG_IN_DEFAULT_STATE - an interrupt state register address + * + * Bits here define the expected input state of the GPIO. + * INTERRUPT_STATUS bits will be set when the INPUT transitions away + * from this value. + */ +#define REG_IN_DEFAULT_STATE 0x9 + +/** + * REG_PULL_ENABLE - a pull-up/down enable state register address + * + * Bits here enable either pull up or pull down according to + * REG_PULL_MODE. + */ +#define REG_PULL_ENABLE 0xb + +/** + * REG_PULL_MODE - a pull-up/pull-down mode state register address + * + * Bits set here selects a pull-up/pull-down state of pin, which + * is configured as Input and the corresponding REG_PULL_ENABLE bit is + * set. + */ +#define REG_PULL_MODE 0xd + +/** Returns the current status (1 = HIGH) of the input pins */ +#define REG_IN_STATUS 0xf + +/** Mask of pins which can generate interrupts */ +#define REG_INT_MASK 0x11 + +/** Mask of pins which have generated an interrupt. Cleared on read */ +#define REG_INT_STATUS 0x13 + +/* Manufacturer's ID getting from Device ID & Ctrl register */ +enum { + MF_ID_MASK = GENMASK(7, 5), + MF_ID_SHIFT = 5, +}; + +/* Firmware revision getting from Device ID & Ctrl register */ +enum { + FW_REV_MASK = GENMASK(4, 2), + FW_REV_SHIFT = 2, +}; + +enum io_direction { + DIR_IN = 0, + DIR_OUT = 1, +}; + +/** + * struct fxl6408_info - Data for fxl6408 + * + * @dev: udevice structure for the device + * @addr: i2c slave address + * @device_id: hold the value of device id register + * @reg_io_dir: hold the value of direction register + * @reg_output: hold the value of output register + */ +struct fxl6408_info { + struct udevice *dev; + int addr; + u8 device_id; + u8 reg_io_dir; + u8 reg_output; +}; + +static inline int fxl6408_write(struct udevice *dev, int reg, u8 val) +{ + return dm_i2c_write(dev, reg, &val, 1); +} + +static int fxl6408_read(struct udevice *dev, int reg) +{ + int ret; + u8 tmp; + + ret = dm_i2c_read(dev, reg, &tmp, 1); + if (!ret) + ret = tmp; + + return ret; +} + +/** + * fxl6408_is_output() - check whether the gpio configures as either + * output or input. + * + * @dev: an instance of a driver + * @offset: a gpio offset + * + * Return: false - input, true - output. + */ +static bool fxl6408_is_output(struct udevice *dev, int offset) +{ + struct fxl6408_info *info = dev_get_plat(dev); + + return info->reg_io_dir & BIT(offset); +} + +static int fxl6408_get_value(struct udevice *dev, uint offset) +{ + int ret, reg = fxl6408_is_output(dev, offset) ? REG_OUT_STATE : REG_IN_STATUS; + + ret = fxl6408_read(dev, reg); + if (ret < 0) + return ret; + + return !!(ret & BIT(offset)); +} + +static int fxl6408_set_value(struct udevice *dev, uint offset, int value) +{ + struct fxl6408_info *info = dev_get_plat(dev); + u8 val; + int ret; + + if (value) + val = info->reg_output | BIT(offset); + else + val = info->reg_output & ~BIT(offset); + + ret = fxl6408_write(dev, REG_OUT_STATE, val); + if (ret < 0) + return ret; + + info->reg_output = val; + + return 0; +} + +static int fxl6408_set_direction(struct udevice *dev, uint offset, + enum io_direction dir) +{ + struct fxl6408_info *info = dev_get_plat(dev); + u8 val; + int ret; + + if (dir == DIR_IN) + val = info->reg_io_dir & ~BIT(offset); + else + val = info->reg_io_dir | BIT(offset); + + ret = fxl6408_write(dev, REG_IO_DIR, val); + if (ret < 0) + return ret; + + info->reg_io_dir = val; + + return 0; +} + +static int fxl6408_direction_input(struct udevice *dev, uint offset) +{ + return fxl6408_set_direction(dev, offset, DIR_IN); +} + +static int fxl6408_direction_output(struct udevice *dev, uint offset, int value) +{ + int ret; + + /* Configure output value */ + ret = fxl6408_set_value(dev, offset, value); + if (ret < 0) + return ret; + + /* Configure direction as output */ + fxl6408_set_direction(dev, offset, DIR_OUT); + + return 0; +} + +static int fxl6408_get_function(struct udevice *dev, uint offset) +{ + if (fxl6408_is_output(dev, offset)) + return GPIOF_OUTPUT; + + return GPIOF_INPUT; +} + +static int fxl6408_xlate(struct udevice *dev, struct gpio_desc *desc, + struct ofnode_phandle_args *args) +{ + desc->offset = args->args[0]; + desc->flags = args->args[1] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0; + + return 0; +} + +static const struct dm_gpio_ops fxl6408_ops = { + .direction_input = fxl6408_direction_input, + .direction_output = fxl6408_direction_output, + .get_value = fxl6408_get_value, + .set_value = fxl6408_set_value, + .get_function = fxl6408_get_function, + .xlate = fxl6408_xlate, +}; + +static int fxl6408_probe(struct udevice *dev) +{ + struct fxl6408_info *info = dev_get_plat(dev); + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + char bank_name[32], *tmp_str; + int addr, ret, size; + u32 val32; + + addr = dev_read_addr(dev); + if (addr == 0) + return -EINVAL; + + info->addr = addr; + + /* + * Check the device ID register to see if it's responding. + * This also clears RST_INT as a side effect, so we won't get + * the "we've been power cycled" interrupt once interrupts + * being enabled. + */ + ret = fxl6408_read(dev, REG_DEVID_CTRL); + if (ret < 0) { + dev_err(dev, "FXL6408 probe returned %d\n", ret); + return ret; + } + + if ((ret & MF_ID_MASK) >> MF_ID_SHIFT != MF_ID_FAIRCHILD) { + dev_err(dev, "FXL6408 probe: wrong Manufacturer's ID: 0x%02x\n", ret); + return -ENXIO; + } + info->device_id = ret; + + /* + * Disable High-Z of outputs, so that the OUTPUT updates + * actually take effect. + */ + ret = fxl6408_write(dev, REG_OUT_HIGH_Z, (u8)0); + if (ret < 0) { + dev_err(dev, "Error writing High-Z register\n"); + return ret; + } + + /* + * If configured, set initial output state and direction, + * otherwise read them from the chip. + */ + if (dev_read_u32(dev, "initial_io_dir", &val32)) { + ret = fxl6408_read(dev, REG_IO_DIR); + if (ret < 0) { + dev_err(dev, "Error reading direction register\n"); + return ret; + } + info->reg_io_dir = ret; + } else { + info->reg_io_dir = val32 & 0xFF; + ret = fxl6408_write(dev, REG_IO_DIR, info->reg_io_dir); + if (ret < 0) { + dev_err(dev, "Error setting direction register\n"); + return ret; + } + } + + if (dev_read_u32(dev, "initial_output", &val32)) { + ret = fxl6408_read(dev, REG_OUT_STATE); + if (ret < 0) { + dev_err(dev, "Error reading output register\n"); + return ret; + } + info->reg_output = ret; + } else { + info->reg_output = val32 & 0xFF; + ret = fxl6408_write(dev, REG_OUT_STATE, info->reg_output); + if (ret < 0) { + dev_err(dev, "Error setting output register\n"); + return ret; + } + } + + tmp_str = (char *)dev_read_prop(dev, "bank-name", &size); + if (tmp_str) { + snprintf(bank_name, sizeof(bank_name), "%s@%x_", tmp_str, + info->addr); + } else { + snprintf(bank_name, sizeof(bank_name), "gpio@%x_", info->addr); + } + + tmp_str = strdup(bank_name); + if (!tmp_str) + return -ENOMEM; + + uc_priv->bank_name = tmp_str; + uc_priv->gpio_count = dev_get_driver_data(dev); + uc_priv->gpio_base = -1; + + dev_dbg(dev, "%s (FW rev. %d) is ready\n", bank_name, + (info->device_id & FW_REV_MASK) >> FW_REV_SHIFT); + + return 0; +} + +static const struct udevice_id fxl6408_ids[] = { + { .compatible = "fcs,fxl6408", .data = 8 }, + { } +}; + +U_BOOT_DRIVER(fxl6408_gpio) = { + .name = "fxl6408_gpio", + .id = UCLASS_GPIO, + .ops = &fxl6408_ops, + .probe = fxl6408_probe, + .of_match = fxl6408_ids, + .plat_auto = sizeof(struct fxl6408_info), +}; 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([83.218.251.13]) by smtp.gmail.com with ESMTPSA id j22sm680131lfu.155.2021.11.21.08.05.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Nov 2021 08:05:23 -0800 (PST) From: Oleksandr Suvorov To: u-boot@lists.denx.de Cc: Marcel Ziswiler , Philippe Schenker , Max Krummenacher , Michal Simek , Oleksandr Suvorov , Oleksandr Suvorov , Oleksandr Suvorov , Fabio Estevam , "NXP i.MX U-Boot Team" , Stefano Babic Subject: [PATCH v4 2/2] colibri-imx8x: add on-module gpio expander fxl6408 Date: Sun, 21 Nov 2021 18:05:17 +0200 Message-Id: <20211121180505.v4.2.4c49798950@changeid> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211121180505.v4.1.ce74fbdbdc@changeid> References: <20211121160517.684719-1-oleksandr.suvorov@foundries.io> <20211121180505.v4.1.ce74fbdbdc@changeid> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.37 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean From: Oleksandr Suvorov The FXL6408 GPIO expander manages critical devices, including on-module USB hub. Configure the expander to switch the USB hub into bypass mode, allowing to use on-carrier-board USB hub. Signed-off-by: Oleksandr Suvorov Signed-off-by: Oleksandr Suvorov --- Changes in v4: - fix misuse of MF_ID_x instead of FW_REV_x in fxl6408_probe(). - fix kernel doc formatting. - sort headers. - fix hex numbers style. - explicitly claim values of enum io_direction. - simplify fxl6408_get_function(). - make variable naming better in fxl6408_probe(). Changes in v3: - fix a warning: "drivers/gpio/gpio-fxl6408.c:348:15: warning: format ‘%ld’ expects argument of type ‘long int’, but argument 3 has type ‘int’ [-Wformat=]" - add Tested-by record. Changes in v2: - Kconfig: add better description for the config option. - gpio-fxl6408.c: -- improve registers' naming. -- fix code style (comments, etc.). -- reimplement fxl6408_read() reducing number of parameters. -- change return value of fxl6408_is_output() to bool. -- replace IS_ERR_VALUE() macros with simple x < 0 where it's possible. -- fxl6408_set_direction(): fix type of parameter "dir". -- fix return error codes to avoid using the predefined in the driver model ones. -- removed extra debug code. -- expand TODO list. arch/arm/dts/fsl-imx8qxp-colibri.dts | 27 +++++++++++++++++++++++++++ configs/colibri-imx8x_defconfig | 1 + 2 files changed, 28 insertions(+) diff --git a/arch/arm/dts/fsl-imx8qxp-colibri.dts b/arch/arm/dts/fsl-imx8qxp-colibri.dts index 11ece34c024..df992ac6396 100644 --- a/arch/arm/dts/fsl-imx8qxp-colibri.dts +++ b/arch/arm/dts/fsl-imx8qxp-colibri.dts @@ -129,6 +129,14 @@ >; }; + /* On Module I2C */ + pinctrl_i2c0: i2c0grp { + fsl,pins = < + SC_P_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL 0x06000021 + SC_P_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA 0x06000021 + >; + }; + /* Off Module I2C */ pinctrl_i2c1: i2c1grp { fsl,pins = < @@ -298,6 +306,25 @@ }; }; +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0>; + status = "okay"; + + /* GPIO expander */ + gpio_expander_43: gpio-expander@43 { + compatible = "fcs,fxl6408"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x43>; + initial_io_dir = <0xff>; + initial_output = <0x05>; + }; +}; + &i2c1 { #address-cells = <1>; #size-cells = <0>; diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig index 22bed95324a..a9b0f357163 100644 --- a/configs/colibri-imx8x_defconfig +++ b/configs/colibri-imx8x_defconfig @@ -41,6 +41,7 @@ CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_TFTP_TSIZE=y CONFIG_CLK_IMX8=y CONFIG_CPU=y +CONFIG_FXL6408_GPIO=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_IMX_LPI2C=y