From patchwork Wed Nov 10 18:56:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1553561 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HqDfl25btz9sCD for ; Thu, 11 Nov 2021 05:59:27 +1100 (AEDT) Received: from localhost ([::1]:34490 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mksoe-0008Uq-2p for incoming@patchwork.ozlabs.org; Wed, 10 Nov 2021 13:59:24 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38430) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mksob-0008U0-Qp; Wed, 10 Nov 2021 13:59:21 -0500 Received: from [201.28.113.2] (port=44873 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mksoa-0001jj-Gq; Wed, 10 Nov 2021 13:59:21 -0500 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Wed, 10 Nov 2021 15:58:05 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id DC76A800AC7; Wed, 10 Nov 2021 15:58:04 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 1/3] target/ppc: Implement Vector Expand Mask Date: Wed, 10 Nov 2021 15:56:11 -0300 Message-Id: <20211110185613.550946-2-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211110185613.550946-1-matheus.ferst@eldorado.org.br> References: <20211110185613.550946-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 10 Nov 2021 18:58:05.0284 (UTC) FILETIME=[E4B4B240:01D7D664] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, clg@kaod.org, Matheus Ferst , david@gibson.dropbear.id.au Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-ppc" From: Matheus Ferst Implement the following PowerISA v3.1 instructions: vexpandbm: Vector Expand Byte Mask vexpandhm: Vector Expand Halfword Mask vexpandwm: Vector Expand Word Mask vexpanddm: Vector Expand Doubleword Mask vexpandqm: Vector Expand Quadword Mask Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn32.decode | 11 ++++++++++ target/ppc/translate/vmx-impl.c.inc | 34 +++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index e135b8aba4..9a28f1d266 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -56,6 +56,9 @@ &VX_uim4 vrt uim vrb @VX_uim4 ...... vrt:5 . uim:4 vrb:5 ........... &VX_uim4 +&VX_tb vrt vrb +@VX_tb ...... vrt:5 ..... vrb:5 ........... &VX_tb + &X rt ra rb @X ...... rt:5 ra:5 rb:5 .......... . &X @@ -408,6 +411,14 @@ VINSWVRX 000100 ..... ..... ..... 00110001111 @VX VSLDBI 000100 ..... ..... ..... 00 ... 010110 @VN VSRDBI 000100 ..... ..... ..... 01 ... 010110 @VN +## Vector Mask Manipulation Instructions + +VEXPANDBM 000100 ..... 00000 ..... 11001000010 @VX_tb +VEXPANDHM 000100 ..... 00001 ..... 11001000010 @VX_tb +VEXPANDWM 000100 ..... 00010 ..... 11001000010 @VX_tb +VEXPANDDM 000100 ..... 00011 ..... 11001000010 @VX_tb +VEXPANDQM 000100 ..... 00100 ..... 11001000010 @VX_tb + # VSX Load/Store Instructions LXV 111101 ..... ..... ............ . 001 @DQ_TSX diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index b361f73a67..58aca58f0f 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1505,6 +1505,40 @@ static bool trans_VSRDBI(DisasContext *ctx, arg_VN *a) return true; } +static bool do_vexpand(DisasContext *ctx, arg_VX_tb *a, unsigned vece) +{ + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + tcg_gen_gvec_sari(vece, avr_full_offset(a->vrt), avr_full_offset(a->vrb), + (8 << vece) - 1, 16, 16); + + return true; +} + +TRANS(VEXPANDBM, do_vexpand, MO_8) +TRANS(VEXPANDHM, do_vexpand, MO_16) +TRANS(VEXPANDWM, do_vexpand, MO_32) +TRANS(VEXPANDDM, do_vexpand, MO_64) + +static bool trans_VEXPANDQM(DisasContext *ctx, arg_VX_tb *a) +{ + TCGv_i64 tmp; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + tmp = tcg_temp_new_i64(); + + get_avr64(tmp, a->vrb, true); + tcg_gen_sari_i64(tmp, tmp, 63); + set_avr64(a->vrt, tmp, false); + set_avr64(a->vrt, tmp, true); + + tcg_temp_free_i64(tmp); + return true; +} + #define GEN_VAFORM_PAIRED(name0, name1, opc2) \ static void glue(gen_, name0##_##name1)(DisasContext *ctx) \ { \ From patchwork Wed Nov 10 18:56:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1553563 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HqDgH5qWsz9sCD for ; Thu, 11 Nov 2021 05:59:55 +1100 (AEDT) Received: from localhost ([::1]:35348 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mksp7-0000f9-HP for incoming@patchwork.ozlabs.org; Wed, 10 Nov 2021 13:59:53 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38472) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mksof-00008z-St; Wed, 10 Nov 2021 13:59:25 -0500 Received: from [201.28.113.2] (port=44873 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mksoc-0001jj-VY; Wed, 10 Nov 2021 13:59:25 -0500 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Wed, 10 Nov 2021 15:58:06 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 05038800AC7; Wed, 10 Nov 2021 15:58:05 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 2/3] target/ppc: Implement Vector Extract Mask Date: Wed, 10 Nov 2021 15:56:12 -0300 Message-Id: <20211110185613.550946-3-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211110185613.550946-1-matheus.ferst@eldorado.org.br> References: <20211110185613.550946-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 10 Nov 2021 18:58:06.0413 (UTC) FILETIME=[E560F7D0:01D7D664] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, clg@kaod.org, Matheus Ferst , david@gibson.dropbear.id.au Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-ppc" From: Matheus Ferst Implement the following PowerISA v3.1 instructions: vextractbm: Vector Extract Byte Mask vextracthm: Vector Extract Halfword Mask vextractwm: Vector Extract Word Mask vextractdm: Vector Extract Doubleword Mask vextractqm: Vector Extract Quadword Mask Signed-off-by: Matheus Ferst --- target/ppc/insn32.decode | 6 ++ target/ppc/translate/vmx-impl.c.inc | 85 +++++++++++++++++++++++++++++ 2 files changed, 91 insertions(+) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 9a28f1d266..639ac22bf0 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -419,6 +419,12 @@ VEXPANDWM 000100 ..... 00010 ..... 11001000010 @VX_tb VEXPANDDM 000100 ..... 00011 ..... 11001000010 @VX_tb VEXPANDQM 000100 ..... 00100 ..... 11001000010 @VX_tb +VEXTRACTBM 000100 ..... 01000 ..... 11001000010 @VX_tb +VEXTRACTHM 000100 ..... 01001 ..... 11001000010 @VX_tb +VEXTRACTWM 000100 ..... 01010 ..... 11001000010 @VX_tb +VEXTRACTDM 000100 ..... 01011 ..... 11001000010 @VX_tb +VEXTRACTQM 000100 ..... 01100 ..... 11001000010 @VX_tb + # VSX Load/Store Instructions LXV 111101 ..... ..... ............ . 001 @DQ_TSX diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index 58aca58f0f..c6a30614fb 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1539,6 +1539,91 @@ static bool trans_VEXPANDQM(DisasContext *ctx, arg_VX_tb *a) return true; } +static bool do_vextractm(DisasContext *ctx, arg_VX_tb *a, unsigned vece) +{ + const uint64_t elem_length = 8 << vece, elem_num = 15 >> vece; + int i = elem_num; + uint64_t bit; + TCGv_i64 t, b, tmp, zero; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + t = tcg_const_i64(0); + b = tcg_temp_new_i64(); + tmp = tcg_temp_new_i64(); + zero = tcg_constant_i64(0); + + get_avr64(b, a->vrb, true); + for (bit = 1ULL << 63; i > elem_num / 2; i--, bit >>= elem_length) { + tcg_gen_shli_i64(t, t, 1); + tcg_gen_andi_i64(tmp, b, bit); + tcg_gen_setcond_i64(TCG_COND_NE, tmp, tmp, zero); + tcg_gen_or_i64(t, t, tmp); + } + + get_avr64(b, a->vrb, false); + for (bit = 1ULL << 63; i >= 0; i--, bit >>= elem_length) { + tcg_gen_shli_i64(t, t, 1); + tcg_gen_andi_i64(tmp, b, bit); + tcg_gen_setcond_i64(TCG_COND_NE, tmp, tmp, zero); + tcg_gen_or_i64(t, t, tmp); + } + + tcg_gen_trunc_i64_tl(cpu_gpr[a->vrt], t); + + tcg_temp_free_i64(t); + tcg_temp_free_i64(b); + tcg_temp_free_i64(tmp); + + return true; +} + +TRANS(VEXTRACTBM, do_vextractm, MO_8) +TRANS(VEXTRACTHM, do_vextractm, MO_16) +TRANS(VEXTRACTWM, do_vextractm, MO_32) + +static bool trans_VEXTRACTDM(DisasContext *ctx, arg_VX_tb *a) +{ + TCGv_i64 t, b; + + t = tcg_temp_new_i64(); + b = tcg_temp_new_i64(); + + get_avr64(b, a->vrb, true); + tcg_gen_andi_i64(t, b, 1); + tcg_gen_shli_i64(t, t, 1); + + get_avr64(b, a->vrb, false); + tcg_gen_andi_i64(b, b, 1); + tcg_gen_or_i64(t, t, b); + + tcg_gen_trunc_i64_tl(cpu_gpr[a->vrt], t); + + tcg_temp_free_i64(t); + tcg_temp_free_i64(b); + + return true; +} + +static bool trans_VEXTRACTQM(DisasContext *ctx, arg_VX_tb *a) +{ + TCGv_i64 tmp; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + tmp = tcg_temp_new_i64(); + + get_avr64(tmp, a->vrb, true); + tcg_gen_shri_i64(tmp, tmp, 63); + tcg_gen_trunc_i64_tl(cpu_gpr[a->vrt], tmp); + + tcg_temp_free_i64(tmp); + + return true; +} + #define GEN_VAFORM_PAIRED(name0, name1, opc2) \ static void glue(gen_, name0##_##name1)(DisasContext *ctx) \ { \ From patchwork Wed Nov 10 18:56:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1553568 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HqDhw65lKz9sCD for ; Thu, 11 Nov 2021 06:01:20 +1100 (AEDT) Received: from localhost ([::1]:38638 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mksqU-0002xg-Jn for incoming@patchwork.ozlabs.org; Wed, 10 Nov 2021 14:01:18 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38488) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mksoi-0000EL-T4; Wed, 10 Nov 2021 13:59:28 -0500 Received: from [201.28.113.2] (port=44873 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mksoh-0001jj-0V; Wed, 10 Nov 2021 13:59:28 -0500 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Wed, 10 Nov 2021 15:58:06 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 6B02B800E9B; Wed, 10 Nov 2021 15:58:06 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 3/3] target/ppc: Implement Vector Mask Move insns Date: Wed, 10 Nov 2021 15:56:13 -0300 Message-Id: <20211110185613.550946-4-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211110185613.550946-1-matheus.ferst@eldorado.org.br> References: <20211110185613.550946-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 10 Nov 2021 18:58:06.0881 (UTC) FILETIME=[E5A86110:01D7D664] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, clg@kaod.org, Matheus Ferst , david@gibson.dropbear.id.au Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-ppc" From: Matheus Ferst Implement the following PowerISA v3.1 instructions: mtvsrbm: Move to VSR Byte Mask mtvsrhm: Move to VSR Halfword Mask mtvsrwm: Move to VSR Word Mask mtvsrdm: Move to VSR Doubleword Mask mtvsrqm: Move to VSR Quadword Mask mtvsrbmi: Move to VSR Byte Mask Immediate Signed-off-by: Matheus Ferst --- target/ppc/insn32.decode | 11 +++ target/ppc/translate/vmx-impl.c.inc | 114 ++++++++++++++++++++++++++++ 2 files changed, 125 insertions(+) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 639ac22bf0..f68931f4f3 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -40,6 +40,10 @@ %ds_rtp 22:4 !function=times_2 @DS_rtp ...... ....0 ra:5 .............. .. &D rt=%ds_rtp si=%ds_si +&DX_b vrt b +%dx_b 6:10 16:5 0:1 +@DX_b ...... vrt:5 ..... .......... ..... . &DX_b b=%dx_b + &DX rt d %dx_d 6:s10 16:5 0:1 @DX ...... rt:5 ..... .......... ..... . &DX d=%dx_d @@ -413,6 +417,13 @@ VSRDBI 000100 ..... ..... ..... 01 ... 010110 @VN ## Vector Mask Manipulation Instructions +MTVSRBM 000100 ..... 10000 ..... 11001000010 @VX_tb +MTVSRHM 000100 ..... 10001 ..... 11001000010 @VX_tb +MTVSRWM 000100 ..... 10010 ..... 11001000010 @VX_tb +MTVSRDM 000100 ..... 10011 ..... 11001000010 @VX_tb +MTVSRQM 000100 ..... 10100 ..... 11001000010 @VX_tb +MTVSRBMI 000100 ..... ..... .......... 01010 . @DX_b + VEXPANDBM 000100 ..... 00000 ..... 11001000010 @VX_tb VEXPANDHM 000100 ..... 00001 ..... 11001000010 @VX_tb VEXPANDWM 000100 ..... 00010 ..... 11001000010 @VX_tb diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index c6a30614fb..9f86133d1d 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1624,6 +1624,120 @@ static bool trans_VEXTRACTQM(DisasContext *ctx, arg_VX_tb *a) return true; } +static bool do_mtvsrm(DisasContext *ctx, arg_VX_tb *a, unsigned vece) +{ + const uint64_t elem_length = 8 << vece, highest_bit = 15 >> vece; + int i; + TCGv_i64 t0, t1, zero, ones; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + t0 = tcg_const_i64(0); + t1 = tcg_temp_new_i64(); + zero = tcg_constant_i64(0); + ones = tcg_constant_i64(MAKE_64BIT_MASK(0, elem_length)); + + for (i = 1 << highest_bit; i > 1 << (highest_bit / 2); i >>= 1) { + tcg_gen_shli_i64(t0, t0, elem_length); + tcg_gen_ext_tl_i64(t1, cpu_gpr[a->vrb]); + tcg_gen_andi_i64(t1, t1, i); + tcg_gen_movcond_i64(TCG_COND_NE, t1, t1, zero, ones, zero); + tcg_gen_or_i64(t0, t0, t1); + } + + set_avr64(a->vrt, t0, true); + + for (; i > 0; i >>= 1) { + tcg_gen_shli_i64(t0, t0, elem_length); + tcg_gen_ext_tl_i64(t1, cpu_gpr[a->vrb]); + tcg_gen_andi_i64(t1, t1, i); + tcg_gen_movcond_i64(TCG_COND_NE, t1, t1, zero, ones, zero); + tcg_gen_or_i64(t0, t0, t1); + } + + set_avr64(a->vrt, t0, false); + + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); + + return true; +} + +TRANS(MTVSRBM, do_mtvsrm, MO_8) +TRANS(MTVSRHM, do_mtvsrm, MO_16) +TRANS(MTVSRWM, do_mtvsrm, MO_32) + +static bool trans_MTVSRDM(DisasContext *ctx, arg_VX_tb *a) +{ + TCGv_i64 t0, t1; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + + tcg_gen_ext_tl_i64(t0, cpu_gpr[a->vrb]); + tcg_gen_sextract_i64(t1, t0, 1, 1); + set_avr64(a->vrt, t1, true); + tcg_gen_sextract_i64(t0, t0, 0, 1); + set_avr64(a->vrt, t0, false); + + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); + + return true; +} + +static bool trans_MTVSRQM(DisasContext *ctx, arg_VX_tb *a) +{ + TCGv_i64 tmp; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + tmp = tcg_temp_new_i64(); + + tcg_gen_ext_tl_i64(tmp, cpu_gpr[a->vrb]); + tcg_gen_sextract_i64(tmp, tmp, 0, 1); + set_avr64(a->vrt, tmp, false); + set_avr64(a->vrt, tmp, true); + + tcg_temp_free_i64(tmp); + + return true; +} + +static bool trans_MTVSRBMI(DisasContext *ctx, arg_DX_b *a) +{ + int i; + uint64_t hi = 0, lo = 0; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + for (i = 1 << 15; i >= 1 << 8; i >>= 1) { + hi <<= 8; + if (a->b & i) { + hi |= 0xFF; + } + } + + set_avr64(a->vrt, tcg_constant_i64(hi), true); + + for (; i > 0; i >>= 1) { + lo <<= 8; + if (a->b & i) { + lo |= 0xFF; + } + } + + set_avr64(a->vrt, tcg_constant_i64(lo), false); + + return true; +} + #define GEN_VAFORM_PAIRED(name0, name1, opc2) \ static void glue(gen_, name0##_##name1)(DisasContext *ctx) \ { \