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(localhost [IPv6:::1]) by gnu-tgl-2.localdomain (Postfix) with ESMTP id 14BC2300349; Thu, 4 Nov 2021 07:41:09 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH] x86: Check leal/addl gcc.target/i386/amxtile-3.c for x32 Date: Thu, 4 Nov 2021 07:41:09 -0700 Message-Id: <20211104144109.308907-1-hjl.tools@gmail.com> X-Mailer: git-send-email 2.33.1 MIME-Version: 1.0 X-Spam-Status: No, score=-3029.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_NUMSUBJECT, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Gcc-patches" From: "H.J. Lu" Reply-To: "H.J. Lu" Cc: Hongyu Wang Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Check leal and addl for x32 to fix: FAIL: gcc.target/i386/amxtile-3.c scan-assembler addq[ \\t]+\\$12 FAIL: gcc.target/i386/amxtile-3.c scan-assembler leaq[ \\t]+4 FAIL: gcc.target/i386/amxtile-3.c scan-assembler leaq[ \\t]+8 * gcc.target/i386/amxtile-3.c: Check leal/addl for x32. --- gcc/testsuite/gcc.target/i386/amxtile-3.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/gcc/testsuite/gcc.target/i386/amxtile-3.c b/gcc/testsuite/gcc.target/i386/amxtile-3.c index 31b34d0ed15..26204e385c6 100644 --- a/gcc/testsuite/gcc.target/i386/amxtile-3.c +++ b/gcc/testsuite/gcc.target/i386/amxtile-3.c @@ -3,12 +3,18 @@ /* { dg-final { scan-assembler "tileloadd\[ \\t]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)+\[^\n\]*%tmm\[0-9\]" } } */ /* { dg-final { scan-assembler "tileloaddt1\[ \\t]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)+\[^\n\]*%tmm\[0-9\]" } } */ /* { dg-final { scan-assembler "tilestored\[ \\t]+\[^\n\]*%tmm\[0-9\]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)" } } */ -/* { dg-final { scan-assembler "leaq\[ \\t]+4" } } */ -/* { dg-final { scan-assembler "leaq\[ \\t]+8" } } */ -/* { dg-final { scan-assembler "addq\[ \\t]+\\\$12" } } */ -/* { dg-final { scan-assembler-not "leaq\[ \\t]+1" } } */ -/* { dg-final { scan-assembler-not "leaq\[ \\t]+2" } } */ -/* { dg-final { scan-assembler-not "addq\[ \\t]+\\\$3" } } */ +/* { dg-final { scan-assembler "leaq\[ \\t]+4" { target lp64 } } } */ +/* { dg-final { scan-assembler "leaq\[ \\t]+8" { target lp64 } } } */ +/* { dg-final { scan-assembler "addq\[ \\t]+\\\$12" { target lp64 } } } */ +/* { dg-final { scan-assembler "leal\[ \\t]+4" { target x32 } } } */ +/* { dg-final { scan-assembler "leal\[ \\t]+8" { target x32 } } } */ +/* { dg-final { scan-assembler "addl\[ \\t]+\\\$12" { target x32 } } } */ +/* { dg-final { scan-assembler-not "leaq\[ \\t]+1" { target lp64 } } } */ +/* { dg-final { scan-assembler-not "leaq\[ \\t]+2" { target lp64 } } } */ +/* { dg-final { scan-assembler-not "addq\[ \\t]+\\\$3" { target lp64 } } } */ +/* { dg-final { scan-assembler-not "leal\[ \\t]+1" { target x32 } } } */ +/* { dg-final { scan-assembler-not "leal\[ \\t]+2" { target x32 } } } */ +/* { dg-final { scan-assembler-not "addl\[ \\t]+\\\$3" { target x32 } } } */ #include extern int a[];