From patchwork Mon Nov 1 08:08:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Horatiu Vultur X-Patchwork-Id: 1549002 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=m3xSd3y5; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HjQcf46bkz9sXM for ; Mon, 1 Nov 2021 19:07:30 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231792AbhKAIKB (ORCPT ); Mon, 1 Nov 2021 04:10:01 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:62892 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231486AbhKAIKB (ORCPT ); Mon, 1 Nov 2021 04:10:01 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1635754048; x=1667290048; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=aZmHkkZf73KvGooq49A6E2ZVCnfxaS3fQI/Km25LJkI=; b=m3xSd3y53P3i7qT7UoF7qv1zyr7fomkJTWG+m+F5WIghZ+ss6825WeWn zqkdH3NCQAWLmPvL0kJ4w3V/rcRzY4wPvrd57MtYZ1s7O9DEOOOpGBXLy m0uD467bNyyeF6v80KXXXS7EHQuAxnzBBuAKMB+rIZY1eg9xexh5aOTaF EoPtslTPeF7u1WnMZrpPznVpfHpWqDiqRIJg8lbeEWpNuqSiAZes/BmMO qTZdJB+WbxBFzBZufiobicEXDhGqFzBCUKg0mobA+0s67+cI3ZFp0GboE 9MKjl5gV8TIPbKzu08H7CZpvRqpU9nlwFP2RJkgWx+TiWboAB+EyLmB4Y A==; IronPort-SDR: GUdC4fWoOP0Cb1OxUGiGn1hFyh6Y0zfMFRLhd9/rAcuYU1lMkLGvE7V1Hun6hTxav+aI25aWuw WtnQRi/U07/ocp4B9XUWmXJtaiB9lKUi+/y0TaluBHFwiy2HaHUvk0ncCosjrtgLzbNdhLSPeC 4kARxbBObzOw9QhEBGrLCWlLVy9itmm+qAG25GgdUlTtrau1nr1i3b+FyONKOyVqMlOTIbi55W M60atTlhES8pWJJ4gYhIbaDCtkP7yUoWBTC8TEg5cc1zAVZt2C96OSLs5Y4CUSztNM1k0SC61R fyGSTnb6YqxTqs8hVxSMBRzZ X-IronPort-AV: E=Sophos;i="5.87,198,1631602800"; d="scan'208";a="137558396" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 01 Nov 2021 01:07:27 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Mon, 1 Nov 2021 01:07:27 -0700 Received: from soft-dev3-1.microsemi.net (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Mon, 1 Nov 2021 01:07:25 -0700 From: Horatiu Vultur To: , , , , , , , , CC: Horatiu Vultur Subject: [RFC PATCH v3 2/4] dt-bindings: clock: lan966x: Extend for clock gate support Date: Mon, 1 Nov 2021 09:08:43 +0100 Message-ID: <20211101080845.3343836-3-horatiu.vultur@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211101080845.3343836-1-horatiu.vultur@microchip.com> References: <20211101080845.3343836-1-horatiu.vultur@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Allow to add an optional resource to be able to access the clock gate registers. Signed-off-by: Horatiu Vultur --- .../devicetree/bindings/clock/microchip,lan966x-gck.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml b/Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml index fca83bd68e26..a53c889629da 100644 --- a/Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml +++ b/Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml @@ -19,7 +19,8 @@ properties: const: microchip,lan966x-gck reg: - maxItems: 1 + minItems: 1 + maxItems: 2 clocks: items: From patchwork Mon Nov 1 08:08:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Horatiu Vultur X-Patchwork-Id: 1549003 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=btUoBPUe; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HjQck1LLPz9sXM for ; Mon, 1 Nov 2021 19:07:34 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231838AbhKAIKF (ORCPT ); Mon, 1 Nov 2021 04:10:05 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:62892 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231823AbhKAIKE (ORCPT ); Mon, 1 Nov 2021 04:10:04 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1635754052; x=1667290052; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GiZSP2N7eXt6hJAdSEsqoCePxdQqvxfYMrEZp11WUS8=; b=btUoBPUemhQzGKzHBKNNqad3bW+w9eS6nGOTGFqM9vyBh+H+dIebIS10 6XJUNHhJ3kd9yqw7NWIvwb+7WgJp2GE3IhPJKUJF7765oGYW7ddlPiWQG 2aBEKxmvRl1GAON6Se2HKQt42HPSEBQzQWznMfBgz1TfJWuku9SisjeP2 LltdH4w7ZXw2qnVUjquYhr7qlx75UNX2ZAxX7w/cTCz9+ohbP+7RIzbcg ZnMrlOntoAgR+T2QEZTPdY4qtcVVQtJWNKF01MIqcNW32zT0MXeI1SDtS Opb640zUM1zHXySaMycB0QZ3Gg8gKIhLRrd+gfEpaXpIVojEVILnhcCDp g==; IronPort-SDR: ZybH/CG+CTCwImvPF6ws7pxj6QcYtMfxmP1jUpsTPGjKR3waPwZBQHngOOj1MbLrC9hZlmNazn 15tK87m74ihysxarg2MXKCVNveGohntGjpIWCXqgeBafVo5FazBw8MhOqhVhSGU6OvLReznZYU 3Dw5zlLkG86NQW0+00WvTUd+yOXRzw6ZYhg3HdqkC20t559KfvoibhRf+0mvOBgvCzEmT+Aq2W k3hYcHqtff6bBszU5LTgK5iTwIXCYlegIllYrun6lOzDE6NY1PSxp6U1JYm+tABnyqOw8f4G2h 7WT3MsnVNQSVR4EO9J3AAyoc X-IronPort-AV: E=Sophos;i="5.87,198,1631602800"; d="scan'208";a="137558403" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 01 Nov 2021 01:07:31 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Mon, 1 Nov 2021 01:07:29 -0700 Received: from soft-dev3-1.microsemi.net (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Mon, 1 Nov 2021 01:07:27 -0700 From: Horatiu Vultur To: , , , , , , , , CC: Horatiu Vultur , Rob Herring Subject: [RFC PATCH v3 3/4] dt-bindings: clock: lan966x: Extend includes with clock gates Date: Mon, 1 Nov 2021 09:08:44 +0100 Message-ID: <20211101080845.3343836-4-horatiu.vultur@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211101080845.3343836-1-horatiu.vultur@microchip.com> References: <20211101080845.3343836-1-horatiu.vultur@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On lan966x it is allow to control the clock to some peripherals like USB. So extend the include file with these clocks. Acked-by: Rob Herring Signed-off-by: Horatiu Vultur --- include/dt-bindings/clock/microchip,lan966x.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/clock/microchip,lan966x.h b/include/dt-bindings/clock/microchip,lan966x.h index fe36ed6d8b5f..6f9d43d76d5a 100644 --- a/include/dt-bindings/clock/microchip,lan966x.h +++ b/include/dt-bindings/clock/microchip,lan966x.h @@ -23,6 +23,12 @@ #define GCK_ID_TIMER 12 #define GCK_ID_USB_REFCLK 13 -#define N_CLOCKS 14 +/* Gate clocks */ +#define GCK_GATE_UHPHS 14 +#define GCK_GATE_UDPHS 15 +#define GCK_GATE_MCRAMC 16 +#define GCK_GATE_HMATRIX 17 + +#define N_CLOCKS 18 #endif