From patchwork Thu Oct 28 14:09:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Fitzgerald X-Patchwork-Id: 1547516 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=cirrus.com header.i=@cirrus.com header.a=rsa-sha256 header.s=PODMain02222019 header.b=HCRdeLx0; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4Hg6qy4ckWz9sRN for ; Fri, 29 Oct 2021 01:09:18 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230255AbhJ1OLn (ORCPT ); Thu, 28 Oct 2021 10:11:43 -0400 Received: from mx0b-001ae601.pphosted.com ([67.231.152.168]:61550 "EHLO mx0b-001ae601.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229887AbhJ1OLm (ORCPT ); Thu, 28 Oct 2021 10:11:42 -0400 Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19S847jo014865; Thu, 28 Oct 2021 09:09:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=PODMain02222019; bh=4FX2fuwgRXUP3OXTschhGuPxmM50MdJ1IjGtnvPd+K8=; b=HCRdeLx0joiEgWt11vmYKkWrW5jbY/934JKZnnyOUlxRk3M2TO2YhEF+8vp0V4V3n5YB zFIt69YTS/iG0Ovcjl9XAuPSXUXJEBTbEkz3zEAiy6eW3qCFyKrHd8LAIim5p1pgrwbh vAYqcxiVf8Ia+5l5hDiFhgD69bhqlpFHDoGEybwaqZ5s87eQF1BUd3K5PklxNZtpcsn0 QVYF1rw8Y4PxFtPIoJo5G6/RGt+RRFDk30ddnxbuFSj48uxRXYjGjd2XYwId0g7Ifq1g BRQJSZ1UuAjy/1C/UmcI3g8Z4l0dSeiSjxtaBSnMvdOnEXfxtATfyvxI7mNdpMTHhRbg Mg== Received: from ediex02.ad.cirrus.com ([87.246.76.36]) by mx0b-001ae601.pphosted.com with ESMTP id 3by8p01bp1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Thu, 28 Oct 2021 09:09:09 -0500 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.7; Thu, 28 Oct 2021 15:09:07 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2375.7 via Frontend Transport; Thu, 28 Oct 2021 15:09:07 +0100 Received: from AUSNPC0LSNW1-debian.cirrus.com (AUSNPC0LSNW1.ad.cirrus.com [198.61.65.32]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 2A7A311DC; Thu, 28 Oct 2021 14:09:07 +0000 (UTC) From: Richard Fitzgerald To: , CC: , , , , Richard Fitzgerald Subject: [PATCH 1/3] ASoC: dt-bindings: cs42l42: Correct description of ts-inv Date: Thu, 28 Oct 2021 15:09:00 +0100 Message-ID: <20211028140902.11786-2-rf@opensource.cirrus.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211028140902.11786-1-rf@opensource.cirrus.com> References: <20211028140902.11786-1-rf@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: NxXuASVleh6ICgOHS2HgSM__x5eyEYpC X-Proofpoint-ORIG-GUID: NxXuASVleh6ICgOHS2HgSM__x5eyEYpC X-Proofpoint-Spam-Reason: safe Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This swaps the descriptions of the 0 and 1 values to match what the driver actually does with this property. The background here is somewhat confusing. The codec has two invert bits for the tip sense. The DT property should have been for the TIP_SENSE_INV bit, which is the one that controls the detect block. Due to some misunderstanding of the hardware the driver actually implemented setting of the TS_INV bit, which is only for swapping the sense of the interrupt bits. The description was taken from the datasheet and refers to TIP_SENSE_INV but unfortunately TS_INV has a different purpose and the net effect of changing it is the reverse of what was intended (this is not clearly described in the datasheet). So the ts-inv settings have always done the exact opposite of what the description said. Given the age of the driver, it's too late now to swap the meanings of the values, so the description is changed to match the behaviour. They have been annotated with the terminology used in the datasheet to avoid the confusion of which one corresponds to what the datasheet calls "inverted tip sense". Signed-off-by: Richard Fitzgerald Fixes: da16c5579353 ("ASoC: cs42l42: Add devicetree bindings for CS42L42") --- Documentation/devicetree/bindings/sound/cs42l42.txt | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/cs42l42.txt b/Documentation/devicetree/bindings/sound/cs42l42.txt index 5d416fdaf023..3b7705623980 100644 --- a/Documentation/devicetree/bindings/sound/cs42l42.txt +++ b/Documentation/devicetree/bindings/sound/cs42l42.txt @@ -19,13 +19,14 @@ Optional properties: (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for further information relating to interrupt properties) - - cirrus,ts-inv : Boolean property. For jacks that invert the tip sense - polarity. Normal jacks will short tip sense pin to HS1 when headphones are - plugged in and leave tip sense floating when not plugged in. Inverting jacks - short tip sense when unplugged and float when plugged in. + - cirrus,ts-inv : Boolean property. Sets the behaviour of the jack plug + detect switch. - 0 = (Default) Non-inverted - 1 = Inverted + 0 = (Default) Shorted to tip when unplugged, open when plugged. + This is "inverted tip sense (ITS)" in the datasheet. + + 1 = Open when unplugged, shorted to tip when plugged. + This is "normal tip sense (TS)" in the datasheet. - cirrus,ts-dbnc-rise : Debounce the rising edge of TIP_SENSE_PLUG. With no debounce, the tip sense pin might be noisy on a plug event. From patchwork Thu Oct 28 14:09:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Fitzgerald X-Patchwork-Id: 1547517 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=cirrus.com header.i=@cirrus.com header.a=rsa-sha256 header.s=PODMain02222019 header.b=ac4P5ixF; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4Hg6r11RBrz9sRN for ; Fri, 29 Oct 2021 01:09:21 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231168AbhJ1OLp (ORCPT ); Thu, 28 Oct 2021 10:11:45 -0400 Received: from mx0a-001ae601.pphosted.com ([67.231.149.25]:10667 "EHLO mx0b-001ae601.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S231132AbhJ1OLo (ORCPT ); Thu, 28 Oct 2021 10:11:44 -0400 Received: from pps.filterd (m0077473.ppops.net [127.0.0.1]) by mx0a-001ae601.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19S8422v008357; Thu, 28 Oct 2021 09:09:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=PODMain02222019; bh=ylyszxl6RmoDk5QKBwTk7IRZiZFRZuDT4K1m74zAvuA=; b=ac4P5ixF5zWnpuPsKQ959F1kqewm54po9vFdCnyCK0+YUa3mGJGM5PEXBMBM3zqe3AsZ 9U3Sr3/qvG8w80yR8jTf2tyWa8tiSSb6abmKh/qbiee4txhqaIWbnl7H3etn5guiAFsX MMIKyvp3JZfMcoS7k/GX+gX3eEuc30DD+O01ZlyuYy44yWRRQy0t/W+ZJK0aVTqtJSR2 IqWMxobdeW7qo8IdpGgh5fMBxIVuFnSM9nDR/VOeAFiQca+peggnRcna5ej5VXocAjiO gdQCS4Fotzn588XBLh535qcwq4keSm84+xAEzo5HnPFaOhpOjN1G76HKAwNQvFPDJt8m Ng== Received: from ediex01.ad.cirrus.com ([87.246.76.36]) by mx0a-001ae601.pphosted.com with ESMTP id 3bya1wh98x-3 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Thu, 28 Oct 2021 09:09:11 -0500 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.7; Thu, 28 Oct 2021 15:09:08 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2375.7 via Frontend Transport; Thu, 28 Oct 2021 15:09:08 +0100 Received: from AUSNPC0LSNW1-debian.cirrus.com (AUSNPC0LSNW1.ad.cirrus.com [198.61.65.32]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id CA15311DC; Thu, 28 Oct 2021 14:09:07 +0000 (UTC) From: Richard Fitzgerald To: , CC: , , , , Richard Fitzgerald Subject: [PATCH 3/3] ASoC: dt-bindings: cs42l42: Convert binding to yaml Date: Thu, 28 Oct 2021 15:09:02 +0100 Message-ID: <20211028140902.11786-4-rf@opensource.cirrus.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211028140902.11786-1-rf@opensource.cirrus.com> References: <20211028140902.11786-1-rf@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: YTENUn3XB1bMF0zsdiuOeyte2ZGDs3ne X-Proofpoint-ORIG-GUID: YTENUn3XB1bMF0zsdiuOeyte2ZGDs3ne X-Proofpoint-Spam-Reason: safe Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Replace the old .txt binding with a new schema binding. At the same time, some of the descriptions are updated to make them clearer, fix errors, or just make them fit better into the style of schema binding. The cirrus,hs-bias-ramp-rate property was missing from the old .txt binding and has been added to the yaml. Signed-off-by: Richard Fitzgerald Reviewed-by: Rob Herring --- .../devicetree/bindings/sound/cirrus,cs42l42.yaml | 225 +++++++++++++++++++++ .../devicetree/bindings/sound/cs42l42.txt | 115 ----------- MAINTAINERS | 1 + 3 files changed, 226 insertions(+), 115 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml delete mode 100644 Documentation/devicetree/bindings/sound/cs42l42.txt diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml new file mode 100644 index 000000000000..31800f70e9d9 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml @@ -0,0 +1,225 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/cirrus,cs42l42.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cirrus Logic CS42L42 audio CODEC + +maintainers: + - patches@opensource.cirrus.com + +description: + The CS42L42 is a low-power audio codec designed for portable applications. + It provides a high-dynamic range, stereo DAC for audio playback and a mono + high-dynamic-range ADC for audio capture. There is an integrated headset + detection block. + +properties: + compatible: + enum: + - cirrus,cs42l42 + + reg: + description: + The I2C address of the CS42L42. + maxItems: 1 + + VP-supply: + description: + VP power supply. + + VCP-supply: + description: + Charge pump power supply. + + VD_FILT-supply: + description: + FILT+ power supply. + + VL-supply: + description: + Logic power supply. + + VA-supply: + description: + Analog power supply. + + reset-gpios: + description: + This pin will be asserted and then deasserted to reset the + CS42L42 before communication starts. + maxItems: 1 + + interrupts: + description: + Interrupt for CS42L42 IRQ line. + maxItems: 1 + + cirrus,ts-inv: + description: | + Sets the behaviour of the jack plug detect switch. + + 0 - (Default) Shorted to tip when unplugged, open when plugged. + This is "inverted tip sense (ITS)" in the datasheet. + + 1 - Open when unplugged, shorted to tip when plugged. + This is "normal tip sense (TS)" in the datasheet. + + The CS42L42_TS_INV_* defines are available for this. + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 1 + + cirrus,ts-dbnc-rise: + description: | + Debounce the rising edge of TIP_SENSE_PLUG. With no + debounce, the tip sense pin might be noisy on a plug event. + + 0 - 0ms + 1 - 125ms + 2 - 250ms + 3 - 500ms + 4 - 750ms + 5 - 1s (Default) + 6 - 1.25s + 7 - 1.5s + + The CS42L42_TS_DBNCE_* defines are available for this. + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 7 + + cirrus,ts-dbnc-fall: + description: | + Debounce the falling edge of TIP_SENSE_UNPLUG. With no + debounce, the tip sense pin might be noisy on an unplug event. + + 0 - 0ms + 1 - 125ms + 2 - 250ms + 3 - 500ms + 4 - 750ms + 5 - 1s (Default) + 6 - 1.25s + 7 - 1.5s + + The CS42L42_TS_DBNCE_* defines are available for this. + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 7 + + cirrus,btn-det-init-dbnce: + description: | + This sets how long to wait after enabling button detection + interrupts before servicing button interrupts, to allow the + HS bias time to settle. Value is in milliseconds. + There may be erroneous button interrupts if this debounce time + is too short. + + 0ms - 200ms, + Default = 100ms + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 200 + + cirrus,btn-det-event-dbnce: + description: | + This sets how long to wait after receiving a button press + interrupt before processing it. Allows time for the button + press to make a clean connection with the bias resistors. + Value is in milliseconds. + + 0ms - 20ms, + Default = 10ms + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 20 + + cirrus,bias-lvls: + description: | + For a level-detect headset button scheme, each button will bias + the mic pin to a certain voltage. To determine which button was + pressed, the voltage is compared to sequential, decreasing + voltages, until the compared voltage < bias voltage. + For different hardware setups, a designer might want to tweak this. + This is an array of descending values for the comparator voltage, + given as percent of the HSBIAS voltage. + + Array of 4 values, each 0-63 + < x1 x2 x3 x4 > + Default = < 15 8 4 1 > + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 4 + maxItems: 4 + items: + minimum: 0 + maximum: 63 + + cirrus,hs-bias-ramp-rate: + description: | + If present this sets the rate that the HS bias should rise and fall. + The actual rise and fall times depend on external hardware (the + datasheet gives several rise and fall time examples). + + 0 - Fast rise time; slow, load-dependent fall time + 1 - Fast + 2 - Slow (default) + 3 - Slowest + + The CS42L42_HSBIAS_RAMP_* defines are available for this. + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 3 + + cirrus,hs-bias-sense-disable: + description: | + If present the HSBIAS sense is disabled. Configures HSBIAS output + current sense through the external 2.21-k resistor. HSBIAS_SENSE + is a hardware feature to reduce the potential pop noise when the + headset plug is removed slowly. But on some platforms ESD voltage + will affect it causing plug detection to fail, especially with CTIA + headset type. For different hardware setups, a designer might want + to tweak default behavior. + type: boolean + +required: + - compatible + - reg + - VP-supply + - VCP-supply + - VD_FILT-supply + - VL-supply + - VA-supply + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + cs42l42: cs42l42@48 { + compatible = "cirrus,cs42l42"; + reg = <0x48>; + VA-supply = <&dummy_vreg>; + VP-supply = <&dummy_vreg>; + VCP-supply = <&dummy_vreg>; + VD_FILT-supply = <&dummy_vreg>; + VL-supply = <&dummy_vreg>; + + reset-gpios = <&axi_gpio_0 1 0>; + interrupt-parent = <&gpio0>; + interrupts = <55 8>; + + cirrus,ts-inv = ; + cirrus,ts-dbnc-rise = ; + cirrus,ts-dbnc-fall = ; + cirrus,btn-det-init-dbnce = <100>; + cirrus,btn-det-event-dbnce = <10>; + cirrus,bias-lvls = <0x0F 0x08 0x04 0x01>; + cirrus,hs-bias-ramp-rate = ; + }; + }; diff --git a/Documentation/devicetree/bindings/sound/cs42l42.txt b/Documentation/devicetree/bindings/sound/cs42l42.txt deleted file mode 100644 index 3b7705623980..000000000000 --- a/Documentation/devicetree/bindings/sound/cs42l42.txt +++ /dev/null @@ -1,115 +0,0 @@ -CS42L42 audio CODEC - -Required properties: - - - compatible : "cirrus,cs42l42" - - - reg : the I2C address of the device for I2C. - - - VP-supply, VCP-supply, VD_FILT-supply, VL-supply, VA-supply : - power supplies for the device, as covered in - Documentation/devicetree/bindings/regulator/regulator.txt. - -Optional properties: - - - reset-gpios : a GPIO spec for the reset pin. If specified, it will be - deasserted before communication to the codec starts. - - - interrupts : IRQ line info CS42L42. - (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt - for further information relating to interrupt properties) - - - cirrus,ts-inv : Boolean property. Sets the behaviour of the jack plug - detect switch. - - 0 = (Default) Shorted to tip when unplugged, open when plugged. - This is "inverted tip sense (ITS)" in the datasheet. - - 1 = Open when unplugged, shorted to tip when plugged. - This is "normal tip sense (TS)" in the datasheet. - - - cirrus,ts-dbnc-rise : Debounce the rising edge of TIP_SENSE_PLUG. With no - debounce, the tip sense pin might be noisy on a plug event. - - 0 - 0ms, - 1 - 125ms, - 2 - 250ms, - 3 - 500ms, - 4 - 750ms, - 5 - (Default) 1s, - 6 - 1.25s, - 7 - 1.5s, - - - cirrus,ts-dbnc-fall : Debounce the falling edge of TIP_SENSE_UNPLUG. - With no debounce, the tip sense pin might be noisy on an unplug event. - - 0 - 0ms, - 1 - 125ms, - 2 - 250ms, - 3 - 500ms, - 4 - 750ms, - 5 - (Default) 1s, - 6 - 1.25s, - 7 - 1.5s, - - - cirrus,btn-det-init-dbnce : This sets how long the driver sleeps after - enabling button detection interrupts. After auto-detection and before - servicing button interrupts, the HS bias needs time to settle. If you - don't wait, there is possibility for erroneous button interrupt. - - 0ms - 200ms, - Default = 100ms - - - cirrus,btn-det-event-dbnce : This sets how long the driver delays after - receiving a button press interrupt. With level detect interrupts, you want - to wait a small amount of time to make sure the button press is making a - clean connection with the bias resistors. - - 0ms - 20ms, - Default = 10ms - - - cirrus,bias-lvls : For a level-detect headset button scheme, each button - will bias the mic pin to a certain voltage. To determine which button was - pressed, the driver will compare this biased voltage to sequential, - decreasing voltages and will stop when a comparator is tripped, - indicating a comparator voltage < bias voltage. This value represents a - percentage of the internally generated HS bias voltage. For different - hardware setups, a designer might want to tweak this. This is an array of - descending values for the comparator voltage. - - Array of 4 values - Each 0-63 - < x1 x2 x3 x4 > - Default = < 15 8 4 1> - - - cirrus,hs-bias-sense-disable: This is boolean property. If present the - HSBIAS sense is disabled. Configures HSBIAS output current sense through - the external 2.21-k resistor. HSBIAS_SENSE is hardware feature to reduce - the potential pop noise during the headset plug out slowly. But on some - platforms ESD voltage will affect it causing test to fail, especially - with CTIA headset type. For different hardware setups, a designer might - want to tweak default behavior. - -Example: - -cs42l42: cs42l42@48 { - compatible = "cirrus,cs42l42"; - reg = <0x48>; - VA-supply = <&dummy_vreg>; - VP-supply = <&dummy_vreg>; - VCP-supply = <&dummy_vreg>; - VD_FILT-supply = <&dummy_vreg>; - VL-supply = <&dummy_vreg>; - - reset-gpios = <&axi_gpio_0 1 0>; - interrupt-parent = <&gpio0>; - interrupts = <55 8> - - cirrus,ts-inv = <0x00>; - cirrus,ts-dbnc-rise = <0x05>; - cirrus,ts-dbnc-fall = <0x00>; - cirrus,btn-det-init-dbnce = <100>; - cirrus,btn-det-event-dbnce = <10>; - cirrus,bias-lvls = <0x0F 0x08 0x04 0x01>; - cirrus,hs-bias-ramp-rate = <0x02>; -}; diff --git a/MAINTAINERS b/MAINTAINERS index 6fc811cd86e9..38555c7f0ce4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4449,6 +4449,7 @@ M: David Rhodes L: alsa-devel@alsa-project.org (moderated for non-subscribers) L: patches@opensource.cirrus.com S: Maintained +F: Documentation/devicetree/bindings/sound/cirrus,cs* F: sound/soc/codecs/cs* CIRRUS LOGIC DSP FIRMWARE DRIVER