From patchwork Fri Oct 15 13:28:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Stubbs X-Patchwork-Id: 1541696 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HW6ZK0G1Bz9shx for ; Sat, 16 Oct 2021 00:29:43 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D3769385782A for ; Fri, 15 Oct 2021 13:29:38 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from esa3.mentor.iphmx.com (esa3.mentor.iphmx.com [68.232.137.180]) by sourceware.org (Postfix) with ESMTPS id 7CABA3857C78 for ; Fri, 15 Oct 2021 13:28:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7CABA3857C78 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=codesourcery.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=mentor.com IronPort-SDR: CqQKdvxi4SwpvsrOwY3QQmDEYaLdwefdd23ZhO8+jHfvAeu+qZipAnpAeuQPVCuutaZ57cN155 7qbV8KQxOoW0e+EaS7Z2tUceAkxPGlBvI807FBkBAygUmmO3vLLv6M9d/+yUQ20xNUvMOQ9XaS LP24sAvaoPfKRGKrGC28GzY4jPm43IoyIz+kuDcIB2PXVY1G4YAKEegiTXpviHUos3529gXo8p jMWQnaG7UYceEmNBBVrslgDMa3U8WCKyJ4Jj/MXWOBZ7JDClQhBYd2CqrdN9daaTNzh+6DiO1V HECBFuOnUEuUrZja2L9wcUOA X-IronPort-AV: E=Sophos;i="5.85,375,1624348800"; d="scan'208";a="67097325" Received: from orw-gwy-02-in.mentorg.com ([192.94.38.167]) by esa3.mentor.iphmx.com with ESMTP; 15 Oct 2021 05:28:44 -0800 IronPort-SDR: yT1RKKMPirCMtb8+x0M9Scgp1QtVI2jgADbcR+eOSyrUSQESdDlXffcmuprDBm7ojWZzAJEOGS RJ7rptFl9XFrGjwAtkv6xTOrxRpgxQUFZoDSfXNFdWM6fluhBZcRZUQDVnZV26fnUmI76OX1qA PpohuJ9hqkbBJspDMbtsbBMWzf2yG56fgWYWsQW2BNoo7NwTv77xlJ/EjVp09faDmM1VuWSN5K 3L3wBuviA0j0Jp0+/RozAO0cdUHnEv3O50x9AYqoT8XzBIze41G74K1+e6IglK3/D9+vawyHIj ZWQ= Message-ID: <4cf03513-153d-33f5-0125-1810b1471a21@codesourcery.com> Date: Fri, 15 Oct 2021 14:28:25 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.2.0 Content-Language: en-GB From: Andrew Stubbs Subject: [committed] amdgcn: fix up offload debug linking with LLVM 13 To: "gcc-patches@gcc.gnu.org" X-Originating-IP: [137.202.0.90] X-ClientProxiedBy: svr-ies-mbx-09.mgc.mentorg.com (139.181.222.9) To svr-ies-mbx-01.mgc.mentorg.com (139.181.222.1) X-Spam-Status: No, score=-11.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_STATUS, KAM_NUMSUBJECT, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" This is a follow-up to my previous LLVM13 support patches (the amdgcn port uses the LLVM assembler) to fix up a corner case. With this patch one can now enable debug information in LLVM 13 offload binaries. This was trickier than you'd think because the different LLVM versions have different attribute interfaces and behaviours and when you fix one issue another issue pops up in another case. The root of the problem with debug is that mkoffload has to set the ELF flags on the early debug binary the same way the assembler will do in all supported cases, or else it won't link. The only known remaining problem with LLVM 13 compatibility is an assembler error with kernels that use mapped variables. It only affects a few test cases in the testsuite. LLVMs 10, 11, and 12 remain unsupported. Andrew amdgcn: fix up offload debug linking with LLVM 13 Between LLVM 9 and LLVM 13 the attribute works differently in several ways, and this needs to be allowed for in GCC and mkoffload independently. This patch fixes up mkoffload when debug info is enabled, which is made more complicated because the configure tests checks whether the attribute option is accepted silently, but does not check if the assembler actually sets the ELF flags for that attribute, and mkoffload needs to mimick that behaviour exactly. The patch therefore removes some of the conditionals. gcc/ChangeLog: * config/gcn/gcn-hsa.h (S_FIJI): Set unconditionally. (S_900): Likewise. (S_906): Likewise. * config/gcn/gcn.c: Hard code SRAM ECC settings for old architectures. * config/gcn/mkoffload.c (ELFABIVERSION_AMDGPU_HSA): Rename to ... (ELFABIVERSION_AMDGPU_HSA_V3): ... this. (ELFABIVERSION_AMDGPU_HSA_V4): New. (SET_SRAM_ECC_UNSUPPORTED): New. (copy_early_debug_info): Create elf flags to match the other objects. (main): Just let the attribute flags pass through. diff --git a/gcc/config/gcn/gcn-hsa.h b/gcc/config/gcn/gcn-hsa.h index 6a432d17d99f..4fd2f07b9836 100644 --- a/gcc/config/gcn/gcn-hsa.h +++ b/gcc/config/gcn/gcn-hsa.h @@ -96,21 +96,10 @@ extern unsigned int gcn_local_sym_hash (const char *name); #define X_908 "march=gfx908:;" #endif -#ifdef HAVE_GCN_SRAM_ECC_FIJI -#define S_FIJI -#else +/* These targets can't have SRAM-ECC, even if a broken assembler allows it. */ #define S_FIJI "!march=*:;march=fiji:;" -#endif -#ifdef HAVE_GCN_SRAM_ECC_GFX900 -#define S_900 -#else #define S_900 "march=gfx900:;" -#endif -#ifdef HAVE_GCN_SRAM_ECC_GFX906 -#define S_906 -#else #define S_906 "march=gfx906:;" -#endif #ifdef HAVE_GCN_SRAM_ECC_GFX908 #define S_908 #else diff --git a/gcc/config/gcn/gcn.c b/gcc/config/gcn/gcn.c index 2e90f327c451..75a9c5766947 100644 --- a/gcc/config/gcn/gcn.c +++ b/gcc/config/gcn/gcn.c @@ -5226,27 +5226,21 @@ output_file_start (void) #ifndef HAVE_GCN_XNACK_FIJI use_xnack_attr = false; #endif -#ifndef HAVE_GCN_SRAM_ECC_FIJI use_sram_attr = false; -#endif break; case PROCESSOR_VEGA10: cpu = "gfx900"; #ifndef HAVE_GCN_XNACK_GFX900 use_xnack_attr = false; #endif -#ifndef HAVE_GCN_SRAM_ECC_GFX900 use_sram_attr = false; -#endif break; case PROCESSOR_VEGA20: cpu = "gfx906"; #ifndef HAVE_GCN_XNACK_GFX906 use_xnack_attr = false; #endif -#ifndef HAVE_GCN_SRAM_ECC_GFX906 use_sram_attr = false; -#endif break; case PROCESSOR_GFX908: cpu = "gfx908"; diff --git a/gcc/config/gcn/mkoffload.c b/gcc/config/gcn/mkoffload.c index a3b22d059b96..b2e71ea5aa00 100644 --- a/gcc/config/gcn/mkoffload.c +++ b/gcc/config/gcn/mkoffload.c @@ -42,8 +42,10 @@ #undef ELFOSABI_AMDGPU_HSA #define ELFOSABI_AMDGPU_HSA 64 -#undef ELFABIVERSION_AMDGPU_HSA -#define ELFABIVERSION_AMDGPU_HSA 1 +#undef ELFABIVERSION_AMDGPU_HSA_V3 +#define ELFABIVERSION_AMDGPU_HSA_V3 1 +#undef ELFABIVERSION_AMDGPU_HSA_V4 +#define ELFABIVERSION_AMDGPU_HSA_V4 2 #undef EF_AMDGPU_MACH_AMDGCN_GFX803 #define EF_AMDGPU_MACH_AMDGCN_GFX803 0x2a @@ -77,6 +79,7 @@ #define SET_SRAM_ECC_ON(VAR) VAR |= EF_AMDGPU_SRAM_ECC_V3 #define SET_SRAM_ECC_ANY(VAR) SET_SRAM_ECC_ON (VAR) #define SET_SRAM_ECC_OFF(VAR) VAR &= ~EF_AMDGPU_SRAM_ECC_V3 +#define SET_SRAM_ECC_UNSUPPORTED(VAR) SET_SRAM_ECC_OFF (VAR) #define TEST_SRAM_ECC_ANY(VAR) 0 /* Not supported. */ #define TEST_SRAM_ECC_ON(VAR) (VAR & EF_AMDGPU_SRAM_ECC_V3) #endif @@ -94,6 +97,9 @@ | EF_AMDGPU_FEATURE_SRAMECC_ANY_V4) #define SET_SRAM_ECC_OFF(VAR) VAR = ((VAR & ~EF_AMDGPU_FEATURE_SRAMECC_V4) \ | EF_AMDGPU_FEATURE_SRAMECC_OFF_V4) +#define SET_SRAM_ECC_UNSUPPORTED(VAR) \ + VAR = ((VAR & ~EF_AMDGPU_FEATURE_SRAMECC_V4) \ + | EF_AMDGPU_FEATURE_SRAMECC_UNSUPPORTED_V4) #define TEST_SRAM_ECC_ANY(VAR) ((VAR & EF_AMDGPU_FEATURE_SRAMECC_V4) \ == EF_AMDGPU_FEATURE_SRAMECC_ANY_V4) #define TEST_SRAM_ECC_ON(VAR) ((VAR & EF_AMDGPU_FEATURE_SRAMECC_V4) \ @@ -346,12 +352,27 @@ copy_early_debug_info (const char *infile, const char *outfile) /* We only support host relocations of x86_64, for now. */ gcc_assert (ehdr.e_machine == EM_X86_64); + /* Fiji devices use HSACOv3 regardless of the assembler. */ + uint32_t elf_flags_actual = (elf_arch == EF_AMDGPU_MACH_AMDGCN_GFX803 + ? 0 : elf_flags); + /* GFX900 devices don't support the sramecc attribute even if + a buggy assembler thinks it does. This must match gcn-hsa.h */ + if (elf_arch == EF_AMDGPU_MACH_AMDGCN_GFX900) + SET_SRAM_ECC_UNSUPPORTED (elf_flags_actual); + /* Patch the correct elf architecture flag into the file. */ ehdr.e_ident[7] = ELFOSABI_AMDGPU_HSA; - ehdr.e_ident[8] = ELFABIVERSION_AMDGPU_HSA; +#ifdef HAVE_GCN_ASM_V3_SYNTAX + ehdr.e_ident[8] = ELFABIVERSION_AMDGPU_HSA_V3; +#endif +#ifdef HAVE_GCN_ASM_V4_SYNTAX + ehdr.e_ident[8] = (elf_arch == EF_AMDGPU_MACH_AMDGCN_GFX803 + ? ELFABIVERSION_AMDGPU_HSA_V3 + : ELFABIVERSION_AMDGPU_HSA_V4); +#endif ehdr.e_type = ET_REL; ehdr.e_machine = EM_AMDGPU; - ehdr.e_flags = elf_arch | elf_flags; + ehdr.e_flags = elf_arch | elf_flags_actual; /* Load the section headers so we can walk them later. */ Elf64_Shdr *sections = (Elf64_Shdr *)xmalloc (sizeof (Elf64_Shdr) @@ -987,13 +1008,6 @@ main (int argc, char **argv) obstack_ptr_grow (&cc_argv_obstack, "-xlto"); if (fopenmp) obstack_ptr_grow (&cc_argv_obstack, "-mgomp"); - obstack_ptr_grow (&cc_argv_obstack, - (TEST_XNACK (elf_flags) - ? "-mxnack" : "-mno-xnack")); - obstack_ptr_grow (&cc_argv_obstack, - (TEST_SRAM_ECC_ON (elf_flags) ? "-msram-ecc=on" - : TEST_SRAM_ECC_ANY (elf_flags) ? "-msram-ecc=any" - : "-msram-ecc=off")); for (int ix = 1; ix != argc; ix++) {