From patchwork Fri Oct 1 00:04:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 1535098 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HL9Mb0WGFz9sR4 for ; Fri, 1 Oct 2021 10:04:27 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350902AbhJAAGH (ORCPT ); Thu, 30 Sep 2021 20:06:07 -0400 Received: from inva021.nxp.com ([92.121.34.21]:51480 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230208AbhJAAGG (ORCPT ); Thu, 30 Sep 2021 20:06:06 -0400 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id AA098200B66; Fri, 1 Oct 2021 02:04:22 +0200 (CEST) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 6B223200B63; Fri, 1 Oct 2021 02:04:22 +0200 (CEST) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.142]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id 9260740BCF; Thu, 30 Sep 2021 17:04:21 -0700 (MST) From: Li Yang To: Shawn Guo , Rob Herring , devicetree@vger.kernel.org, Oleksij Rempel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Li Yang , Rob Herring Subject: [PATCH v2 01/16] dt-bindings: arm: fsl: add ls1021a-tsn board Date: Thu, 30 Sep 2021 19:04:02 -0500 Message-Id: <20211001000417.15334-2-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20211001000417.15334-1-leoyang.li@nxp.com> References: <20211001000417.15334-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the missing board in the binding docuemnt. Signed-off-by: Li Yang Acked-by: Rob Herring --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 60f4862ba15e..65299c0d1272 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -886,6 +886,7 @@ properties: - enum: - fsl,ls1021a-moxa-uc-8410a - fsl,ls1021a-qds + - fsl,ls1021a-tsn - fsl,ls1021a-twr - const: fsl,ls1021a From patchwork Fri Oct 1 00:04:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 1535099 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HL9Mb2pc1z9sP7 for ; Fri, 1 Oct 2021 10:04:27 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350975AbhJAAGI (ORCPT ); Thu, 30 Sep 2021 20:06:08 -0400 Received: from inva020.nxp.com ([92.121.34.13]:60602 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345765AbhJAAGH (ORCPT ); Thu, 30 Sep 2021 20:06:07 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id F08021A0D89; Fri, 1 Oct 2021 02:04:22 +0200 (CEST) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id B5A2E1A0D85; Fri, 1 Oct 2021 02:04:22 +0200 (CEST) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.142]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id EBDB640A55; Thu, 30 Sep 2021 17:04:21 -0700 (MST) From: Li Yang To: Shawn Guo , Rob Herring , devicetree@vger.kernel.org, Oleksij Rempel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Li Yang Subject: [PATCH v2 02/16] dt-bindings: i2c: imx: update schema to align with original txt binding Date: Thu, 30 Sep 2021 19:04:03 -0500 Message-Id: <20211001000417.15334-3-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20211001000417.15334-1-leoyang.li@nxp.com> References: <20211001000417.15334-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org When the binding was converted from txt to yaml, it actually added more constrains than the original txt binding which was already used in many in-tree DTSes. Some of the newly added constrains are either not valid or not neccessary. Not all SoCs use ipg as the clock name for i2c. There is no point in having SoC integration information defined in i2c binding. Remove the clock name requirement in the schema. The original txt binding didn't require the order of tx and rx for dmas/dma-names. Many in tree DTSes are already using the other order. Both orders should just work fine. Update the schema to allow both. Signed-off-by: Li Yang --- v2: Updated the patch description Documentation/devicetree/bindings/i2c/i2c-imx.yaml | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml index 3592d49235e0..da55d37a09a4 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml @@ -54,20 +54,20 @@ properties: maxItems: 1 clock-names: - const: ipg + maxItems: 1 clock-frequency: enum: [ 100000, 400000 ] dmas: - items: - - description: DMA controller phandle and request line for RX - - description: DMA controller phandle and request line for TX + minItems: 2 + maxItems: 2 dma-names: + minItems: 2 + maxItems: 2 items: - - const: rx - - const: tx + enum: [ "rx", "tx" ] sda-gpios: maxItems: 1