From patchwork Tue Aug 31 11:17:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 1522539 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=rAAC8VPv; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GzPpY1l48z9sSs for ; Tue, 31 Aug 2021 21:19:17 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 15ECC3858429 for ; Tue, 31 Aug 2021 11:19:15 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 15ECC3858429 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1630408755; bh=I7gw84gc141W96XRwf9XumU4GCOXxlgSPuZFzvr7rr4=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=rAAC8VPvA57Zqx1GBag7CS8bGCLlCcVrLVwoqb8GFEK1WLgQZP/eMrsPG1TOpKTXO atbjtZ5Kz8nv/mcBxcP0bWsPUQ5CuFZaGa/kxBh6iRd8YGCIJ1HAVD6tqZJy9k1p9Y PVEym0xq627aXdjBatNryrsZN+fW95QXVoQ4jESI= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by sourceware.org (Postfix) with ESMTPS id 5DDA73858428 for ; Tue, 31 Aug 2021 11:17:54 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 5DDA73858428 X-IronPort-AV: E=McAfee;i="6200,9189,10092"; a="198688051" X-IronPort-AV: E=Sophos;i="5.84,366,1620716400"; d="scan'208";a="198688051" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Aug 2021 04:17:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,366,1620716400"; d="scan'208";a="645280338" Received: from scymds01.sc.intel.com ([10.148.94.138]) by orsmga005.jf.intel.com with ESMTP; 31 Aug 2021 04:17:52 -0700 Received: from shliclel219.sh.intel.com (shliclel219.sh.intel.com [10.239.236.219]) by scymds01.sc.intel.com with ESMTP id 17VBHnAc029757; Tue, 31 Aug 2021 04:17:51 -0700 To: gcc-patches@gcc.gnu.org Subject: [PATCH 1/2] Revert "Make sure we're playing with integral modes before call extract_integral_bit_field." Date: Tue, 31 Aug 2021 19:17:48 +0800 Message-Id: <20210831111749.1530591-2-hongtao.liu@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210831111749.1530591-1-hongtao.liu@intel.com> References: <20210831111749.1530591-1-hongtao.liu@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: liuhongt Reply-To: liuhongt Cc: richard.sandiford@arm.com Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" This reverts commit 7218c2ec365ce95f5a1012a6eb425b0a36aec6bf. PR middle-end/102133 --- gcc/expmed.c | 103 +++++++++++++-------------------------------------- 1 file changed, 25 insertions(+), 78 deletions(-) diff --git a/gcc/expmed.c b/gcc/expmed.c index f083d6e86d0..3143f38e057 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -71,14 +71,7 @@ static void store_split_bit_field (rtx, opt_scalar_int_mode, static rtx extract_integral_bit_field (rtx, opt_scalar_int_mode, unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT, int, rtx, - machine_mode, machine_mode, - scalar_int_mode, bool, bool); -static rtx extract_and_convert_fixed_bit_field (scalar_int_mode, - machine_mode, machine_mode, - rtx, opt_scalar_int_mode, - unsigned HOST_WIDE_INT, - unsigned HOST_WIDE_INT, rtx, - int, bool); + machine_mode, machine_mode, bool, bool); static rtx extract_fixed_bit_field (machine_mode, rtx, opt_scalar_int_mode, unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT, rtx, int, bool); @@ -1639,7 +1632,6 @@ extract_bit_field_1 (rtx str_rtx, poly_uint64 bitsize, poly_uint64 bitnum, { rtx op0 = str_rtx; machine_mode mode1; - scalar_int_mode int_tmode; if (tmode == VOIDmode) tmode = mode; @@ -1861,46 +1853,10 @@ extract_bit_field_1 (rtx str_rtx, poly_uint64 bitsize, poly_uint64 bitnum, /* It's possible we'll need to handle other cases here for polynomial bitnum and bitsize. */ - /* Make sure we are playing with integral modes. Pun with subregs - if we aren't. When tmode is HFmode, op0 is SImode, there will be ICE - in extract_integral_bit_field. */ - opt_scalar_int_mode target_imode = int_mode_for_mode (tmode); - if (!target_imode.exists (&int_tmode) || int_tmode != tmode) - { - if (target_imode.exists (&int_tmode)) - { - rtx ret = extract_integral_bit_field (op0, op0_mode, - bitsize.to_constant (), - bitnum.to_constant (), - unsignedp, NULL, int_tmode, - int_tmode, int_tmode, - reverse, fallback_p); - gcc_assert (ret); - - if (!REG_P (ret)) - ret = force_reg (int_tmode, ret); - return gen_lowpart_SUBREG (tmode, ret); - } - else - { - if (!fallback_p) - return NULL; - - int_tmode = int_mode_for_mode (mode).require (); - return extract_and_convert_fixed_bit_field (int_tmode, tmode, mode, - op0, op0_mode, - bitsize.to_constant (), - bitnum.to_constant (), - target, unsignedp, - reverse); - } - } - /* From here on we need to be looking at a fixed-size insertion. */ return extract_integral_bit_field (op0, op0_mode, bitsize.to_constant (), bitnum.to_constant (), unsignedp, - target, mode, tmode, - int_tmode, reverse, fallback_p); + target, mode, tmode, reverse, fallback_p); } /* Subroutine of extract_bit_field_1, with the same arguments, except @@ -1913,7 +1869,6 @@ extract_integral_bit_field (rtx op0, opt_scalar_int_mode op0_mode, unsigned HOST_WIDE_INT bitsize, unsigned HOST_WIDE_INT bitnum, int unsignedp, rtx target, machine_mode mode, machine_mode tmode, - scalar_int_mode int_tmode, bool reverse, bool fallback_p) { /* Handle fields bigger than a word. */ @@ -2080,10 +2035,29 @@ extract_integral_bit_field (rtx op0, opt_scalar_int_mode op0_mode, if (!fallback_p) return NULL; - return extract_and_convert_fixed_bit_field (int_tmode, tmode, mode, - op0, op0_mode, bitsize, - bitnum, target, unsignedp, - reverse); + /* Find a correspondingly-sized integer field, so we can apply + shifts and masks to it. */ + scalar_int_mode int_mode; + if (!int_mode_for_mode (tmode).exists (&int_mode)) + /* If this fails, we should probably push op0 out to memory and then + do a load. */ + int_mode = int_mode_for_mode (mode).require (); + + target = extract_fixed_bit_field (int_mode, op0, op0_mode, bitsize, + bitnum, target, unsignedp, reverse); + + /* Complex values must be reversed piecewise, so we need to undo the global + reversal, convert to the complex mode and reverse again. */ + if (reverse && COMPLEX_MODE_P (tmode)) + { + target = flip_storage_order (int_mode, target); + target = convert_extracted_bit_field (target, mode, tmode, unsignedp); + target = flip_storage_order (tmode, target); + } + else + target = convert_extracted_bit_field (target, mode, tmode, unsignedp); + + return target; } /* Generate code to extract a byte-field from STR_RTX @@ -2155,33 +2129,6 @@ extract_bit_field (rtx str_rtx, poly_uint64 bitsize, poly_uint64 bitnum, return extract_bit_field_1 (str_rtx, bitsize, bitnum, unsignedp, target, mode, tmode, reverse, true, alt_rtl); } - -/* Combination of extract_fixed_bit_field and convert_extracted_bit_field. */ -static rtx -extract_and_convert_fixed_bit_field (scalar_int_mode int_tmode, - machine_mode tmode, machine_mode mode, - rtx op0, opt_scalar_int_mode op0_mode, - unsigned HOST_WIDE_INT bitsize, - unsigned HOST_WIDE_INT bitnum, - rtx target, int unsignedp, bool reverse) -{ - target = extract_fixed_bit_field (int_tmode, op0, op0_mode, bitsize, - bitnum, target, unsignedp, reverse); - - /* Complex values must be reversed piecewise, so we need to undo the global - reversal, convert to the complex mode and reverse again. */ - if (reverse && COMPLEX_MODE_P (tmode)) - { - target = flip_storage_order (int_tmode, target); - target = convert_extracted_bit_field (target, mode, tmode, unsignedp); - target = flip_storage_order (tmode, target); - } - else - target = convert_extracted_bit_field (target, mode, tmode, unsignedp); - - return target; -} - /* Use shifts and boolean operations to extract a field of BITSIZE bits from bit BITNUM of OP0. If OP0_MODE is defined, it is the mode of OP0, From patchwork Tue Aug 31 11:17:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 1522541 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=ystFi+9C; dkim-atps=neutral Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GzPrr5sd4z9sSs for ; Tue, 31 Aug 2021 21:21:16 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 75D9D3858424 for ; Tue, 31 Aug 2021 11:21:14 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 75D9D3858424 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1630408874; bh=/T9LaOFiFXPCkq/eUG3TNsqcIzX1ltt9vxogHYCreLo=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=ystFi+9CcLMooL0apTUdFeyopfleLaYEbKIGsyj/dzUyiCnP1jSNkmF+2O0D7kCBR tO7uPkdUeO4MOrnU2gvw/VkTHeV7vmKDrNgQ3Agjf75IzzvIrdScPonUR6zwF0VrU8 OeJn9A9w6OxqbpCaFtRShxpTpL6GGoU3VYT9fdsc= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by sourceware.org (Postfix) with ESMTPS id DFE7E385842A for ; Tue, 31 Aug 2021 11:18:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org DFE7E385842A X-IronPort-AV: E=McAfee;i="6200,9189,10092"; a="304027045" X-IronPort-AV: E=Sophos;i="5.84,366,1620716400"; d="scan'208";a="304027045" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Aug 2021 04:17:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,366,1620716400"; d="scan'208";a="509908573" Received: from scymds01.sc.intel.com ([10.148.94.138]) by orsmga001.jf.intel.com with ESMTP; 31 Aug 2021 04:17:54 -0700 Received: from shliclel219.sh.intel.com (shliclel219.sh.intel.com [10.239.236.219]) by scymds01.sc.intel.com with ESMTP id 17VBHnAd029757; Tue, 31 Aug 2021 04:17:53 -0700 To: gcc-patches@gcc.gnu.org Subject: [PATCH 2/2] Get rid of all float-int special cases in validate_subreg. Date: Tue, 31 Aug 2021 19:17:49 +0800 Message-Id: <20210831111749.1530591-3-hongtao.liu@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210831111749.1530591-1-hongtao.liu@intel.com> References: <20210831111749.1530591-1-hongtao.liu@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: liuhongt Reply-To: liuhongt Cc: richard.sandiford@arm.com Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" gcc/ChangeLog: * emit-rtl.c (validate_subreg): Get rid of all float-int special cases. --- gcc/emit-rtl.c | 40 ---------------------------------------- 1 file changed, 40 deletions(-) diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c index ff3b4449b37..77ea8948ee8 100644 --- a/gcc/emit-rtl.c +++ b/gcc/emit-rtl.c @@ -922,46 +922,6 @@ validate_subreg (machine_mode omode, machine_mode imode, poly_uint64 regsize = REGMODE_NATURAL_SIZE (imode); - /* ??? This should not be here. Temporarily continue to allow word_mode - subregs of anything. The most common offender is (subreg:SI (reg:DF)). - Generally, backends are doing something sketchy but it'll take time to - fix them all. */ - if (omode == word_mode) - ; - /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field - is the culprit here, and not the backends. */ - else if (known_ge (osize, regsize) && known_ge (isize, osize)) - ; - /* Allow component subregs of complex and vector. Though given the below - extraction rules, it's not always clear what that means. */ - else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode)) - && GET_MODE_INNER (imode) == omode) - ; - /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs, - i.e. (subreg:V4SF (reg:SF) 0) or (subreg:V4SF (reg:V2SF) 0). This - surely isn't the cleanest way to represent this. It's questionable - if this ought to be represented at all -- why can't this all be hidden - in post-reload splitters that make arbitrarily mode changes to the - registers themselves. */ - else if (VECTOR_MODE_P (omode) - && GET_MODE_INNER (omode) == GET_MODE_INNER (imode)) - ; - /* Subregs involving floating point modes are not allowed to - change size. Therefore (subreg:DI (reg:DF) 0) is fine, but - (subreg:SI (reg:DF) 0) isn't. */ - else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode)) - { - if (! (known_eq (isize, osize) - /* LRA can use subreg to store a floating point value in - an integer mode. Although the floating point and the - integer modes need the same number of hard registers, - the size of floating point mode can be less than the - integer mode. LRA also uses subregs for a register - should be used in different mode in on insn. */ - || lra_in_progress)) - return false; - } - /* Paradoxical subregs must have offset zero. */ if (maybe_gt (osize, isize)) return known_eq (offset, 0U);