From patchwork Tue Aug 17 09:05:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 1517659 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=O6olBVqs; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GplYS6ch0z9sSn for ; Tue, 17 Aug 2021 19:07:56 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3E3C6383303C for ; Tue, 17 Aug 2021 09:07:54 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3E3C6383303C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1629191274; bh=meWkiG0vdaOlUm870nSeAqvZ2HSAjQQusk34fBLKjOY=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=O6olBVqsA8krNpS9LYXRsbM74NE325f3JUpYrzJh0GTojAXMbY7bpb4mDul0Fqeww nCqkmEivM4lXUDgXOjaOiSX9cLtMaO5ysAfuiCwZPXr2MVZ6A4/9cbVZWp3Rhz3iVb 63UGujgmV8DcUeMiHQEi389AnfkcmYSLbCRHzWyo= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by sourceware.org (Postfix) with ESMTPS id 60D8D3835C34 for ; Tue, 17 Aug 2021 09:05:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 60D8D3835C34 X-IronPort-AV: E=McAfee;i="6200,9189,10078"; a="212907971" X-IronPort-AV: E=Sophos;i="5.84,328,1620716400"; d="scan'208";a="212907971" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Aug 2021 02:05:56 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,328,1620716400"; d="scan'208";a="449193705" Received: from scymds01.sc.intel.com ([10.148.94.138]) by fmsmga007.fm.intel.com with ESMTP; 17 Aug 2021 02:05:56 -0700 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.236.50]) by scymds01.sc.intel.com with ESMTP id 17H95s51017531; Tue, 17 Aug 2021 02:05:55 -0700 To: gcc-patches@gcc.gnu.org Subject: [PATCH] [i386] Add x86 tune to enable v2df vector reduction by paddpd. Date: Tue, 17 Aug 2021 17:05:54 +0800 Message-Id: <20210817090554.92213-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.18.1 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: liuhongt Reply-To: liuhongt Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi: This patch add a new x86 tune named X86_TUNE_V2DF_REDUCTION_PREFER_HADDPD to enable haddpd for v2df vector reduction, the tune is disabled by default. Bootstrapped and regtested on x86_64-linux-gnu{-m32,} Ok for trunk? gcc/ChangeLog: PR target/97147 * config/i386/i386.h (TARGET_V2DF_REDUCTION_PREFER_HADDPD): New macro. * config/i386/sse.md (*sse3_haddv2df3_low): Add TARGET_V2DF_REDUCTION_PREFER_HADDPD. (*sse3_hsubv2df3_low): Ditto. * config/i386/x86-tune.def (X86_TUNE_V2DF_REDUCTION_PREFER_HADDPD): New tune. gcc/testsuite/ChangeLog: PR target/97147 * gcc.target/i386/pr54400.c: Adjust testcase. * gcc.target/i386/pr94147.c: New test. --- gcc/config/i386/i386.h | 2 ++ gcc/config/i386/sse.md | 4 ++-- gcc/config/i386/x86-tune.def | 5 +++++ gcc/testsuite/gcc.target/i386/pr54400.c | 2 +- gcc/testsuite/gcc.target/i386/pr94147.c | 22 ++++++++++++++++++++++ 5 files changed, 32 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr94147.c diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 21fe51bba40..b3e57a83846 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -418,6 +418,8 @@ extern unsigned char ix86_tune_features[X86_TUNE_LAST]; ix86_tune_features[X86_TUNE_EMIT_VZEROUPPER] #define TARGET_EXPAND_ABS \ ix86_tune_features[X86_TUNE_EXPAND_ABS] +#define TARGET_V2DF_REDUCTION_PREFER_HADDPD \ + ix86_tune_features[X86_TUNE_V2DF_REDUCTION_PREFER_HADDPD] /* Feature tests against the various architecture variations. */ enum ix86_arch_indices { diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 27e25cc7952..13889687793 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -2771,7 +2771,7 @@ (define_insn "*sse3_haddv2df3_low" (vec_select:DF (match_dup 1) (parallel [(match_operand:SI 3 "const_0_to_1_operand")]))))] - "TARGET_SSE3 + "TARGET_SSE3 && TARGET_V2DF_REDUCTION_PREFER_HADDPD && INTVAL (operands[2]) != INTVAL (operands[3])" "@ haddpd\t{%0, %0|%0, %0} @@ -2790,7 +2790,7 @@ (define_insn "*sse3_hsubv2df3_low" (vec_select:DF (match_dup 1) (parallel [(const_int 1)]))))] - "TARGET_SSE3" + "TARGET_SSE3 && TARGET_V2DF_REDUCTION_PREFER_HADDPD" "@ hsubpd\t{%0, %0|%0, %0} vhsubpd\t{%1, %1, %0|%0, %1, %1}" diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def index eb057a67750..8f55da89c92 100644 --- a/gcc/config/i386/x86-tune.def +++ b/gcc/config/i386/x86-tune.def @@ -452,6 +452,11 @@ DEF_TUNE (X86_TUNE_AVOID_128FMA_CHAINS, "avoid_fma_chains", m_ZNVER) smaller FMA chain. */ DEF_TUNE (X86_TUNE_AVOID_256FMA_CHAINS, "avoid_fma256_chains", m_ZNVER2 | m_ZNVER3) +/* X86_TUNE_V2DF_REDUCTION_PREFER_PHADDPD: Prefer haddpd + for v2df vector reduction. */ +DEF_TUNE (X86_TUNE_V2DF_REDUCTION_PREFER_HADDPD, + "v2df_reduction_prefer_haddpd", m_NONE) + /*****************************************************************************/ /* AVX instruction selection tuning (some of SSE flags affects AVX, too) */ /*****************************************************************************/ diff --git a/gcc/testsuite/gcc.target/i386/pr54400.c b/gcc/testsuite/gcc.target/i386/pr54400.c index 5ed5ba06644..3a450376b9e 100644 --- a/gcc/testsuite/gcc.target/i386/pr54400.c +++ b/gcc/testsuite/gcc.target/i386/pr54400.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -msse3 -mfpmath=sse" } */ +/* { dg-options "-O2 -msse3 -mfpmath=sse -mtune-ctrl=v2df_reduction_prefer_haddpd" } */ #include diff --git a/gcc/testsuite/gcc.target/i386/pr94147.c b/gcc/testsuite/gcc.target/i386/pr94147.c new file mode 100644 index 00000000000..8ff5c34834f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr94147.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse3 -mfpmath=sse" } */ + +#include + +double f (__m128d p) +{ + return p[0] - p[1]; +} + +double g1 (__m128d p) +{ + return p[0] + p[1]; +} + +double g2 (__m128d p) +{ + return p[1] + p[0]; +} + +/* { dg-final { scan-assembler-not "hsubpd" } } */ +/* { dg-final { scan-assembler-not "haddpd" } } */