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Tue, 10 Aug 2021 06:45:11 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: T Karthik Reddy , Ashok Reddy Soma , Adrian Fiergolski , Bharat Gooty , Ilias Apalodimas , Jorge Ramirez-Ortiz , Michal Simek , Rayagonda Kokatanur Subject: [PATCH 1/4] soc: xilinx: zynqmp: Add soc_xilinx_zynqmp driver Date: Tue, 10 Aug 2021 15:45:02 +0200 Message-Id: <66aea7ba3d8990a7066ec8adf3d4f7ba49666d12.1628603101.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean From: T Karthik Reddy soc_xilinx_zynqmp driver allows identification of family & revision of zynqmp SoC. This driver is selected by CONFIG_SOC_XILINX_ZYNQMP. Add this config to xilinx_zynqmp_virt_defconfig file. Probe this driver using platdata U_BOOT_DEVICE structure which is specified in mach-zynqmp/cpu.c. Signed-off-by: T Karthik Reddy Reviewed-by: Ashok Reddy Soma Signed-off-by: Michal Simek --- MAINTAINERS | 1 + arch/arm/Kconfig | 1 + arch/arm/mach-zynqmp/cpu.c | 5 ++ arch/arm/mach-zynqmp/include/mach/hardware.h | 3 + configs/xilinx_zynqmp_virt_defconfig | 1 + drivers/soc/Kconfig | 8 ++ drivers/soc/Makefile | 1 + drivers/soc/soc_xilinx_zynqmp.c | 78 ++++++++++++++++++++ 8 files changed, 98 insertions(+) create mode 100644 drivers/soc/soc_xilinx_zynqmp.c diff --git a/MAINTAINERS b/MAINTAINERS index 868d4e145ca2..af5a1fedf1d3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -602,6 +602,7 @@ F: drivers/net/zynq_gem.c F: drivers/serial/serial_zynq.c F: drivers/reset/reset-zynqmp.c F: drivers/rtc/zynqmp_rtc.c +F: drivers/soc/soc_xilinx_zynqmp.c F: drivers/spi/zynq_qspi.c F: drivers/spi/zynq_spi.c F: drivers/timer/cadence-ttc.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3a745ce126aa..3e8a31f8ad56 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1133,6 +1133,7 @@ config ARCH_ZYNQMP select SPL_SEPARATE_BSS if SPL select SUPPORT_SPL select ZYNQMP_IPI + select SOC_DEVICE imply BOARD_LATE_INIT imply CMD_DM imply ENV_VARS_UBOOT_RUNTIME_CONFIG diff --git a/arch/arm/mach-zynqmp/cpu.c b/arch/arm/mach-zynqmp/cpu.c index 29743cae5aab..26e285c24fe0 100644 --- a/arch/arm/mach-zynqmp/cpu.c +++ b/arch/arm/mach-zynqmp/cpu.c @@ -15,6 +15,7 @@ #include #include #include +#include #define ZYNQ_SILICON_VER_MASK 0xF000 #define ZYNQ_SILICON_VER_SHIFT 12 @@ -218,3 +219,7 @@ int zynqmp_mmio_read(const u32 address, u32 *value) return ret; } + +U_BOOT_DRVINFO(soc_xilinx_zynqmp) = { + .name = "soc_xilinx_zynqmp", +}; diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h index 37764990707c..eebf38551c2f 100644 --- a/arch/arm/mach-zynqmp/include/mach/hardware.h +++ b/arch/arm/mach-zynqmp/include/mach/hardware.h @@ -69,6 +69,9 @@ struct iou_scntr_secure { #define iou_scntr_secure ((struct iou_scntr_secure *)ZYNQMP_IOU_SCNTR_SECURE) +#define ZYNQMP_PS_VERSION 0xFFCA0044 +#define ZYNQMP_PS_VER_MASK GENMASK(1, 0) + /* Bootmode setting values */ #define BOOT_MODES_MASK 0x0000000F #define QSPI_MODE_24BIT 0x00000001 diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 2c888130fa59..5b2f2f69e461 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -160,6 +160,7 @@ CONFIG_DM_SCSI=y CONFIG_ARM_DCC=y CONFIG_XILINX_UARTLITE=y CONFIG_ZYNQ_SERIAL=y +CONFIG_SOC_XILINX_ZYNQMP=y CONFIG_SPI=y CONFIG_ZYNQ_SPI=y CONFIG_ZYNQMP_GQSPI=y diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig index 864d00a88538..17fb4c4d65e5 100644 --- a/drivers/soc/Kconfig +++ b/drivers/soc/Kconfig @@ -16,6 +16,14 @@ config SOC_DEVICE_TI_K3 This allows Texas Instruments Keystone 3 SoCs to identify specifics about the SoC in use. +config SOC_XILINX_ZYNQMP + bool "Enable SoC Device ID driver for Xilinx ZynqMP" + depends on SOC_DEVICE && ARCH_ZYNQMP + help + Enable this option to select SoC device id driver for Xilinx ZynqMP. + This allows other drivers to verify the SoC familiy & revision + using matching SoC attributes. + source "drivers/soc/ti/Kconfig" endmenu diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile index 9ef20ca5066f..9b26573c71c8 100644 --- a/drivers/soc/Makefile +++ b/drivers/soc/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_SOC_TI) += ti/ obj-$(CONFIG_SOC_DEVICE) += soc-uclass.o obj-$(CONFIG_SOC_DEVICE_TI_K3) += soc_ti_k3.o obj-$(CONFIG_SANDBOX) += soc_sandbox.o +obj-$(CONFIG_SOC_XILINX_ZYNQMP) += soc_xilinx_zynqmp.o diff --git a/drivers/soc/soc_xilinx_zynqmp.c b/drivers/soc/soc_xilinx_zynqmp.c new file mode 100644 index 000000000000..7d33ce2163d8 --- /dev/null +++ b/drivers/soc/soc_xilinx_zynqmp.c @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx ZynqMP SOC driver + * + * Copyright (C) 2021 Xilinx, Inc. + */ + +#include +#include +#include +#include +#include +#include +#include + +/* + * Zynqmp has 4 silicon revisions + * v0 -> 0(XCZU9EG-ES1) + * v1 -> 1(XCZU3EG-ES1, XCZU15EG-ES1) + * v2 -> 2(XCZU7EV-ES1, XCZU9EG-ES2, XCZU19EG-ES1) + * v3 -> 3(Production Level) + */ +static const char zynqmp_family[] = "ZynqMP"; + +struct soc_xilinx_zynqmp_priv { + const char *family; + char revision; +}; + +static int soc_xilinx_zynqmp_get_family(struct udevice *dev, char *buf, int size) +{ + struct soc_xilinx_zynqmp_priv *priv = dev_get_priv(dev); + + return snprintf(buf, size, "%s", priv->family); +} + +static int soc_xilinx_zynqmp_get_revision(struct udevice *dev, char *buf, int size) +{ + struct soc_xilinx_zynqmp_priv *priv = dev_get_priv(dev); + + return snprintf(buf, size, "v%d", priv->revision); +} + +static const struct soc_ops soc_xilinx_zynqmp_ops = { + .get_family = soc_xilinx_zynqmp_get_family, + .get_revision = soc_xilinx_zynqmp_get_revision, +}; + +static int soc_xilinx_zynqmp_probe(struct udevice *dev) +{ + struct soc_xilinx_zynqmp_priv *priv = dev_get_priv(dev); + u32 ret_payload[4]; + int ret; + + priv->family = zynqmp_family; + + if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3 || + !IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) + ret = zynqmp_mmio_read(ZYNQMP_PS_VERSION, &ret_payload[2]); + else + ret = xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0, + ret_payload); + if (ret < 0) + return ret; + + priv->revision = ret_payload[2] & ZYNQMP_PS_VER_MASK; + + return 0; +} + +U_BOOT_DRIVER(soc_xilinx_zynqmp) = { + .name = "soc_xilinx_zynqmp", + .id = UCLASS_SOC, + .ops = &soc_xilinx_zynqmp_ops, + .probe = soc_xilinx_zynqmp_probe, + .priv_auto = sizeof(struct soc_xilinx_zynqmp_priv), + .flags = DM_FLAG_PRE_RELOC, +}; From patchwork Tue Aug 10 13:45:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1515415 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=otfneGSV; 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Tue, 10 Aug 2021 06:45:13 -0700 (PDT) Received: from localhost ([2a02:768:2307:40d6::648]) by smtp.gmail.com with ESMTPSA id u16sm1406280wmc.41.2021.08.10.06.45.12 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 10 Aug 2021 06:45:12 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: T Karthik Reddy , Ashok Reddy Soma , Bharat Gooty , Rayagonda Kokatanur Subject: [PATCH 2/4] soc: xilinx: versal: Add soc_xilinx_versal driver Date: Tue, 10 Aug 2021 15:45:03 +0200 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean From: T Karthik Reddy soc_xilinx_versal driver allows identification of family & revision of versal SoC. This driver is selected by CONFIG_SOC_XILINX_VERSAL. Probe this driver using platdata U_BOOT_DEVICE structure which is defined at mach-versal/cpu.c. Add this config to xilinx_versal_virt_defconfig & xilinx_versal_mini_ospi_defconfig file to select this driver. Signed-off-by: T Karthik Reddy Reviewed-by: Ashok Reddy Soma Signed-off-by: Michal Simek --- MAINTAINERS | 1 + arch/arm/Kconfig | 1 + arch/arm/mach-versal/cpu.c | 5 ++ arch/arm/mach-versal/include/mach/hardware.h | 4 ++ configs/xilinx_versal_virt_defconfig | 1 + drivers/soc/Kconfig | 8 +++ drivers/soc/Makefile | 1 + drivers/soc/soc_xilinx_versal.c | 76 ++++++++++++++++++++ 8 files changed, 97 insertions(+) create mode 100644 drivers/soc/soc_xilinx_versal.c diff --git a/MAINTAINERS b/MAINTAINERS index af5a1fedf1d3..4cf0c33c5d58 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -546,6 +546,7 @@ S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git F: arch/arm/mach-versal/ F: drivers/net/xilinx_axi_mrmac.* +F: drivers/soc/soc_xilinx_versal.c F: drivers/watchdog/xilinx_wwdt.c N: (? #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -120,3 +121,7 @@ int arm_reserve_mmu(void) return 0; } #endif + +U_BOOT_DRVINFO(soc_xilinx_versal) = { + .name = "soc_xilinx_versal", +}; diff --git a/arch/arm/mach-versal/include/mach/hardware.h b/arch/arm/mach-versal/include/mach/hardware.h index 9af5afd3f3f4..7b728ac11018 100644 --- a/arch/arm/mach-versal/include/mach/hardware.h +++ b/arch/arm/mach-versal/include/mach/hardware.h @@ -65,6 +65,10 @@ struct crp_regs { #define crp_base ((struct crp_regs *)VERSAL_CRP_BASEADDR) +#define VERSAL_PS_PMC_VERSION 0xF11A0004 +#define VERSAL_PS_VER_MASK GENMASK(7, 0) +#define VERSAL_PS_VER_SHIFT 12 + /* Bootmode setting values */ #define BOOT_MODES_MASK 0x0000000F #define QSPI_MODE_24BIT 0x00000001 diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index c894d32a9259..15fa5b9900c9 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -96,6 +96,7 @@ CONFIG_ZYNQ_GEM=y CONFIG_ARM_DCC=y CONFIG_PL01X_SERIAL=y CONFIG_XILINX_UARTLITE=y +CONFIG_SOC_XILINX_VERSAL=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_ZYNQ_SPI=y diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig index 17fb4c4d65e5..292dc41b6fa2 100644 --- a/drivers/soc/Kconfig +++ b/drivers/soc/Kconfig @@ -24,6 +24,14 @@ config SOC_XILINX_ZYNQMP This allows other drivers to verify the SoC familiy & revision using matching SoC attributes. +config SOC_XILINX_VERSAL + bool "Enable SoC Device ID driver for Xilinx Versal" + depends on SOC_DEVICE && ARCH_VERSAL + help + Enable this option to select SoC device id driver for Xilinx Versal. + This allows other drivers to verify the SoC familiy & revision using + matching SoC attributes. + source "drivers/soc/ti/Kconfig" endmenu diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile index 9b26573c71c8..031fa7612f48 100644 --- a/drivers/soc/Makefile +++ b/drivers/soc/Makefile @@ -7,3 +7,4 @@ obj-$(CONFIG_SOC_DEVICE) += soc-uclass.o obj-$(CONFIG_SOC_DEVICE_TI_K3) += soc_ti_k3.o obj-$(CONFIG_SANDBOX) += soc_sandbox.o obj-$(CONFIG_SOC_XILINX_ZYNQMP) += soc_xilinx_zynqmp.o +obj-$(CONFIG_SOC_XILINX_VERSAL) += soc_xilinx_versal.o diff --git a/drivers/soc/soc_xilinx_versal.c b/drivers/soc/soc_xilinx_versal.c new file mode 100644 index 000000000000..f8bcd9ab404d --- /dev/null +++ b/drivers/soc/soc_xilinx_versal.c @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal SOC driver + * + * Copyright (C) 2021 Xilinx, Inc. + */ + +#include +#include +#include +#include +#include +#include + +/* + * v1 -> 0x10 - ES1 + * v2 -> 0x20 - Production + */ +static const char versal_family[] = "Versal"; + +struct soc_xilinx_versal_priv { + const char *family; + char revision; +}; + +static int soc_xilinx_versal_get_family(struct udevice *dev, char *buf, int size) +{ + struct soc_xilinx_versal_priv *priv = dev_get_priv(dev); + + return snprintf(buf, size, "%s", priv->family); +} + +static int soc_xilinx_versal_get_revision(struct udevice *dev, char *buf, int size) +{ + struct soc_xilinx_versal_priv *priv = dev_get_priv(dev); + + return snprintf(buf, size, "v%d", priv->revision); +} + +static const struct soc_ops soc_xilinx_versal_ops = { + .get_family = soc_xilinx_versal_get_family, + .get_revision = soc_xilinx_versal_get_revision, +}; + +static int soc_xilinx_versal_probe(struct udevice *dev) +{ + struct soc_xilinx_versal_priv *priv = dev_get_priv(dev); + u32 ret_payload[4]; + int ret; + + priv->family = versal_family; + + if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) { + ret = xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0, + ret_payload); + if (ret) + return ret; + } else { + ret_payload[2] = readl(VERSAL_PS_PMC_VERSION); + if (!ret_payload[2]) + return -EINVAL; + } + + priv->revision = ret_payload[2] >> VERSAL_PS_VER_SHIFT; + + return 0; +} + +U_BOOT_DRIVER(soc_xilinx_versal) = { + .name = "soc_xilinx_versal", + .id = UCLASS_SOC, + .ops = &soc_xilinx_versal_ops, + .probe = soc_xilinx_versal_probe, + .priv_auto = sizeof(struct soc_xilinx_versal_priv), + .flags = DM_FLAG_PRE_RELOC, +}; From patchwork Tue Aug 10 13:45:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1515416 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; 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This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy Reviewed-by: Ashok Reddy Soma Signed-off-by: Michal Simek --- board/xilinx/common/board.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 92b61d83ca47..90c87bab5cff 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -18,6 +18,7 @@ #include #include #include +#include #include "fru.h" @@ -440,3 +441,28 @@ int __maybe_unused board_fit_config_name_match(const char *name) return -1; } + +#if defined(CONFIG_DISPLAY_CPUINFO) && !defined(CONFIG_ARCH_ZYNQ) +int print_cpuinfo(void) +{ + struct udevice *soc; + char name[SOC_MAX_STR_SIZE]; + int ret; + + ret = soc_get(&soc); + if (ret) { + printf("CPU: UNKNOWN\n"); + return 0; + } + + ret = soc_get_family(soc, name, SOC_MAX_STR_SIZE); + if (ret) + printf("CPU: %s\n", name); + + ret = soc_get_revision(soc, name, SOC_MAX_STR_SIZE); + if (ret) + printf("Silicon: %s\n", name); + + return 0; +} +#endif From patchwork Tue Aug 10 13:45:05 2021 Content-Type: text/plain; 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Tue, 10 Aug 2021 06:45:15 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: T Karthik Reddy , Ashok Reddy Soma , Ilias Apalodimas , Michal Simek Subject: [PATCH 4/4] xilinx: Enable config to display cpuinfo Date: Tue, 10 Aug 2021 15:45:05 +0200 Message-Id: <22c4c09d4f075699b98f07125b3bee9730cf6863.1628603101.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean From: T Karthik Reddy Enable CONFIG_DISPLAY_CPUINFO to display SoC family & revision. Signed-off-by: T Karthik Reddy Reviewed-by: Ashok Reddy Soma Signed-off-by: Michal Simek --- configs/xilinx_versal_virt_defconfig | 1 - configs/xilinx_zynqmp_virt_defconfig | 1 - 2 files changed, 2 deletions(-) diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 15fa5b9900c9..590a2171c114 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -16,7 +16,6 @@ CONFIG_FIT_VERBOSE=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOOTDELAY=5 CONFIG_USE_PREBOOT=y -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="Versal> " CONFIG_CMD_BOOTMENU=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 5b2f2f69e461..2d3402857f48 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -24,7 +24,6 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="scsi reset;usb reset" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_FPGA=y