From patchwork Sat Jul 31 21:35:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 1511972 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-ide-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=mJCeppVm; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Gcd0q67r7z9sRf for ; Sun, 1 Aug 2021 07:38:03 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231766AbhGaViJ (ORCPT ); Sat, 31 Jul 2021 17:38:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56670 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230350AbhGaViI (ORCPT ); Sat, 31 Jul 2021 17:38:08 -0400 Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D557EC06175F for ; Sat, 31 Jul 2021 14:38:01 -0700 (PDT) Received: by mail-lj1-x22a.google.com with SMTP id f12so18302564ljn.1 for ; Sat, 31 Jul 2021 14:38:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=W7qUFzW5XAPgMODU+xc+DKpwo9r3q77YftplfblNgVI=; b=mJCeppVmqjSBrvbTKMa2nnzoFAO1JLl8f0wUQlFYVG938UEEWVXNI77QIr5Kq/VTxE MN3DSwwHgXtZ+YtSb07xCtD4D1T/jw0uZSzTzcow8tqEe5HD55idiuKr0Gj5DVQJxoxI /68jDI+JQt3e7Dw4iVQlHIEnRkhioRSbdykQV6UZ6yScBhjlH6s7Ij4oBCCj27fCoox/ 1YzXf8V6SZWLV/I4yaPCSoETup9les5HBDuWHFqKtumK26v61uKr/4/8yWYl/Htv/q4f b/BXsKhyfjzqGWNTL+LSUcPUhJMuNUfpwDvZtabe1Lwkp5gzUHUQ8Y14JovSNVfqh87n oA7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=W7qUFzW5XAPgMODU+xc+DKpwo9r3q77YftplfblNgVI=; b=Skne0NzrAltwiF2PwI+RMe3KfnkwC405/iojMPp0HBRFjDCGPAjohhtWWBoCy5KBfB ygkM2GbiyHkvxfRcVT4OTc8S1p4Fjxc/Omv07qOA68oamZ1CC+bmJqE5AlYWXJWMN8xj UlMQ8so6tEiR4smG8ns97wWmDD7Cr1yF4+GpKQ9ORPsxt43yju04OrG6JuVyZszKmJs5 eZtTQVA8xrrwQ/mdI9ddKL2G23u68mWaNsp4JoU3jQs8qq37OW0HZRGVHJxjPk2gN8bz xH1dzCNRFF/8Ln2XxLJwehyIOCcLXhaCdKr2H6RTktL6qv4qIFovV/Ek7uwHXG5BDmln 0ByQ== X-Gm-Message-State: AOAM5330VYTWhU/oClUSUXoXDK5rafDV+u82TVN1FeKrbQevrfEI4OZp dquTbpivy1IGzGz8tpTop3ehqQ== X-Google-Smtp-Source: ABdhPJyS4HS3DvVj5QrSFzJeYphjyLAko6m0p9h+LTFak+WRFXEe4fMouq8OyYtOEaMZtD+zLWd8IQ== X-Received: by 2002:a2e:2286:: with SMTP id i128mr6184963lji.260.1627767480260; Sat, 31 Jul 2021 14:38:00 -0700 (PDT) Received: from localhost.localdomain (c-fdcc225c.014-348-6c756e10.bbcust.telenor.se. [92.34.204.253]) by smtp.gmail.com with ESMTPSA id t17sm440430ljk.102.2021.07.31.14.37.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Jul 2021 14:37:59 -0700 (PDT) From: Linus Walleij To: Jens Axboe , linux-ide@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Imre Kaloz , Krzysztof Halasa , Linus Walleij Subject: [PATCH 1/5 v2] pata: ixp4xx: Use local dev variable Date: Sat, 31 Jul 2021 23:35:51 +0200 Message-Id: <20210731213555.2965356-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org Let's simplify all &pdev->dev references by creating a local struct device *dev variable. Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - No changes --- drivers/ata/pata_ixp4xx_cf.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/ata/pata_ixp4xx_cf.c b/drivers/ata/pata_ixp4xx_cf.c index 5881d64af943..23f0f7cacd52 100644 --- a/drivers/ata/pata_ixp4xx_cf.c +++ b/drivers/ata/pata_ixp4xx_cf.c @@ -139,6 +139,7 @@ static int ixp4xx_pata_probe(struct platform_device *pdev) struct resource *cs0, *cs1; struct ata_host *host; struct ata_port *ap; + struct device *dev = &pdev->dev; struct ixp4xx_pata_data *data = dev_get_platdata(&pdev->dev); int ret; int irq; @@ -150,17 +151,17 @@ static int ixp4xx_pata_probe(struct platform_device *pdev) return -EINVAL; /* allocate host */ - host = ata_host_alloc(&pdev->dev, 1); + host = ata_host_alloc(dev, 1); if (!host) return -ENOMEM; /* acquire resources and fill host */ - ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); if (ret) return ret; - data->cs0 = devm_ioremap(&pdev->dev, cs0->start, 0x1000); - data->cs1 = devm_ioremap(&pdev->dev, cs1->start, 0x1000); + data->cs0 = devm_ioremap(dev, cs0->start, 0x1000); + data->cs1 = devm_ioremap(dev, cs1->start, 0x1000); if (!data->cs0 || !data->cs1) return -ENOMEM; @@ -185,7 +186,7 @@ static int ixp4xx_pata_probe(struct platform_device *pdev) ixp4xx_setup_port(ap, data, cs0->start, cs1->start); - ata_print_version_once(&pdev->dev, DRV_VERSION); + ata_print_version_once(dev, DRV_VERSION); /* activate host */ return ata_host_activate(host, irq, ata_sff_interrupt, 0, &ixp4xx_sht); From patchwork Sat Jul 31 21:35:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 1511973 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-ide-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=zZ/g1t1o; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Gcd1M1tb6z9sRf for ; Sun, 1 Aug 2021 07:38:31 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231765AbhGaVih (ORCPT ); Sat, 31 Jul 2021 17:38:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56778 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230350AbhGaVig (ORCPT ); Sat, 31 Jul 2021 17:38:36 -0400 Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D8800C06175F for ; Sat, 31 Jul 2021 14:38:29 -0700 (PDT) Received: by mail-lf1-x131.google.com with SMTP id g13so25735075lfj.12 for ; Sat, 31 Jul 2021 14:38:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1s2gp+Z0A+42wMyMuLTufRoIAkb04D7YA7vr8UMT6UM=; b=zZ/g1t1osZgQctQuobiLT625UqjXeKdwYeXz22SbvpVDw1MpB7tnuq7Uj7XCuSFVDf 6PJ4Kg+mywE8RkEH5gC/oFfraLLlhQwAzUrSKwiNuA2W6VE/PdRhWGw99KOirVTy7Eh5 3VExEaeudIWXxaLdClUDXG6T9T8tKQbDY9m8ImCXbcpYOGqqIGMUS+ga6oKG/V1lpfmI mD7D4dpX0abjzLDCzUeNe3RbL8b4NLHv8nXJcU96p+kxMBvx12I4sipShBH73vrrIIFT A5tBHlDxpilsfBJEEFaIzcp9AGBhq0Tc7m2KpZrFB5YXwZhyxJMIEnbr1WSK1Wz9p02n iV5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1s2gp+Z0A+42wMyMuLTufRoIAkb04D7YA7vr8UMT6UM=; b=IRF2I91IuhdV/dP0n5lTtUiUn60RL2jd4ACKKRhwXyIdeSWOPUMFb1ES784St625oK F7gTUmSm9ioKwU89p8lXCoeCxDjT23m8pEWRndIxfJCmkouesZYft48RuBFrv9sCzTB5 Nc7KO8/3IXTaZPTyOQclAJQ3NnZRKXsXk24Rc64eVHE/BdXg2RUDOzrZ7Njb1hxweLC1 0o1DkIhPxwd3O2l8ZXxfS4ns8cLvFoT3r+2qr8PQ32034rlkq+1zCFWO7mTzDZSEUpzD G4kdskUU1PR9MA9VCMp2vcFVyNVgZjuqu7kOybImNQTNYmFyswFpiyQR47Rig4sMTWPl T+Lg== X-Gm-Message-State: AOAM531PjxuSLFsvBy5E4GWdGLtKJhFjINb7StrMFrxxfELIjR8tWeqp OzFdza/NaSsXO/fZc7PxkJokyQ== X-Google-Smtp-Source: ABdhPJwsHhKIULHtEBrNk92eDI/kXyQUBTX3ATT6nGpvZcj/b229z2rZHxG7PUKUCPOsk+3BkW7fBQ== X-Received: by 2002:ac2:4475:: with SMTP id y21mr6511257lfl.487.1627767508262; Sat, 31 Jul 2021 14:38:28 -0700 (PDT) Received: from localhost.localdomain (c-fdcc225c.014-348-6c756e10.bbcust.telenor.se. [92.34.204.253]) by smtp.gmail.com with ESMTPSA id t17sm440430ljk.102.2021.07.31.14.38.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Jul 2021 14:38:27 -0700 (PDT) From: Linus Walleij To: Jens Axboe , linux-ide@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Imre Kaloz , Krzysztof Halasa , Linus Walleij Subject: [PATCH 2/5 v2] pata: ixp4xx: Use IS_ENABLED() to determine endianness Date: Sat, 31 Jul 2021 23:35:52 +0200 Message-Id: <20210731213555.2965356-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210731213555.2965356-1-linus.walleij@linaro.org> References: <20210731213555.2965356-1-linus.walleij@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org Instead of an ARM-specific ifdef, use the global CPU config and if (IS_ENABLED()). Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - No changes --- drivers/ata/pata_ixp4xx_cf.c | 45 ++++++++++++++++++------------------ 1 file changed, 22 insertions(+), 23 deletions(-) diff --git a/drivers/ata/pata_ixp4xx_cf.c b/drivers/ata/pata_ixp4xx_cf.c index 23f0f7cacd52..bc5029d6525d 100644 --- a/drivers/ata/pata_ixp4xx_cf.c +++ b/drivers/ata/pata_ixp4xx_cf.c @@ -107,29 +107,28 @@ static void ixp4xx_setup_port(struct ata_port *ap, ata_sff_std_ports(ioaddr); -#ifndef __ARMEB__ - - /* adjust the addresses to handle the address swizzling of the - * ixp4xx in little endian mode. - */ - - *(unsigned long *)&ioaddr->data_addr ^= 0x02; - *(unsigned long *)&ioaddr->cmd_addr ^= 0x03; - *(unsigned long *)&ioaddr->altstatus_addr ^= 0x03; - *(unsigned long *)&ioaddr->ctl_addr ^= 0x03; - *(unsigned long *)&ioaddr->error_addr ^= 0x03; - *(unsigned long *)&ioaddr->feature_addr ^= 0x03; - *(unsigned long *)&ioaddr->nsect_addr ^= 0x03; - *(unsigned long *)&ioaddr->lbal_addr ^= 0x03; - *(unsigned long *)&ioaddr->lbam_addr ^= 0x03; - *(unsigned long *)&ioaddr->lbah_addr ^= 0x03; - *(unsigned long *)&ioaddr->device_addr ^= 0x03; - *(unsigned long *)&ioaddr->status_addr ^= 0x03; - *(unsigned long *)&ioaddr->command_addr ^= 0x03; - - raw_cmd ^= 0x03; - raw_ctl ^= 0x03; -#endif + if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) { + /* adjust the addresses to handle the address swizzling of the + * ixp4xx in little endian mode. + */ + + *(unsigned long *)&ioaddr->data_addr ^= 0x02; + *(unsigned long *)&ioaddr->cmd_addr ^= 0x03; + *(unsigned long *)&ioaddr->altstatus_addr ^= 0x03; + *(unsigned long *)&ioaddr->ctl_addr ^= 0x03; + *(unsigned long *)&ioaddr->error_addr ^= 0x03; + *(unsigned long *)&ioaddr->feature_addr ^= 0x03; + *(unsigned long *)&ioaddr->nsect_addr ^= 0x03; + *(unsigned long *)&ioaddr->lbal_addr ^= 0x03; + *(unsigned long *)&ioaddr->lbam_addr ^= 0x03; + *(unsigned long *)&ioaddr->lbah_addr ^= 0x03; + *(unsigned long *)&ioaddr->device_addr ^= 0x03; + *(unsigned long *)&ioaddr->status_addr ^= 0x03; + *(unsigned long *)&ioaddr->command_addr ^= 0x03; + + raw_cmd ^= 0x03; + raw_ctl ^= 0x03; + } ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", raw_cmd, raw_ctl); } From patchwork Sat Jul 31 21:35:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 1511974 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-ide-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=O2CPeAgt; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Gcd1N6P2lz9srX for ; Sun, 1 Aug 2021 07:38:32 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230350AbhGaVii (ORCPT ); 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[92.34.204.253]) by smtp.gmail.com with ESMTPSA id t17sm440430ljk.102.2021.07.31.14.38.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Jul 2021 14:38:29 -0700 (PDT) From: Linus Walleij To: Jens Axboe , linux-ide@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Imre Kaloz , Krzysztof Halasa , Linus Walleij Subject: [PATCH 3/5 v2] pata: ixp4xx: Refer to cmd and ctl rather than csN Date: Sat, 31 Jul 2021 23:35:53 +0200 Message-Id: <20210731213555.2965356-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210731213555.2965356-1-linus.walleij@linaro.org> References: <20210731213555.2965356-1-linus.walleij@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org The two "cs0" and "cs1" are "chip selects" but on some platforms such as GW2358 they are actually both in CS3 making this terminology very confusing. Call the addresses "cmd" and "ctl" after function instead. Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - No changes --- drivers/ata/pata_ixp4xx_cf.c | 27 ++++++++++---------- include/linux/platform_data/pata_ixp4xx_cf.h | 4 +-- 2 files changed, 15 insertions(+), 16 deletions(-) diff --git a/drivers/ata/pata_ixp4xx_cf.c b/drivers/ata/pata_ixp4xx_cf.c index bc5029d6525d..72d6d6f2ef99 100644 --- a/drivers/ata/pata_ixp4xx_cf.c +++ b/drivers/ata/pata_ixp4xx_cf.c @@ -95,15 +95,14 @@ static struct ata_port_operations ixp4xx_port_ops = { static void ixp4xx_setup_port(struct ata_port *ap, struct ixp4xx_pata_data *data, - unsigned long raw_cs0, unsigned long raw_cs1) + unsigned long raw_cmd, unsigned long raw_ctl) { struct ata_ioports *ioaddr = &ap->ioaddr; - unsigned long raw_cmd = raw_cs0; - unsigned long raw_ctl = raw_cs1 + 0x06; - ioaddr->cmd_addr = data->cs0; - ioaddr->altstatus_addr = data->cs1 + 0x06; - ioaddr->ctl_addr = data->cs1 + 0x06; + raw_ctl += 0x06; + ioaddr->cmd_addr = data->cmd; + ioaddr->altstatus_addr = data->ctl + 0x06; + ioaddr->ctl_addr = data->ctl + 0x06; ata_sff_std_ports(ioaddr); @@ -135,7 +134,7 @@ static void ixp4xx_setup_port(struct ata_port *ap, static int ixp4xx_pata_probe(struct platform_device *pdev) { - struct resource *cs0, *cs1; + struct resource *cmd, *ctl; struct ata_host *host; struct ata_port *ap; struct device *dev = &pdev->dev; @@ -143,10 +142,10 @@ static int ixp4xx_pata_probe(struct platform_device *pdev) int ret; int irq; - cs0 = platform_get_resource(pdev, IORESOURCE_MEM, 0); - cs1 = platform_get_resource(pdev, IORESOURCE_MEM, 1); + cmd = platform_get_resource(pdev, IORESOURCE_MEM, 0); + ctl = platform_get_resource(pdev, IORESOURCE_MEM, 1); - if (!cs0 || !cs1) + if (!cmd || !ctl) return -EINVAL; /* allocate host */ @@ -159,10 +158,10 @@ static int ixp4xx_pata_probe(struct platform_device *pdev) if (ret) return ret; - data->cs0 = devm_ioremap(dev, cs0->start, 0x1000); - data->cs1 = devm_ioremap(dev, cs1->start, 0x1000); + data->cmd = devm_ioremap(dev, cmd->start, 0x1000); + data->ctl = devm_ioremap(dev, ctl->start, 0x1000); - if (!data->cs0 || !data->cs1) + if (!data->cmd || !data->ctl) return -ENOMEM; irq = platform_get_irq(pdev, 0); @@ -183,7 +182,7 @@ static int ixp4xx_pata_probe(struct platform_device *pdev) ap->pio_mask = ATA_PIO4; ap->flags |= ATA_FLAG_NO_ATAPI; - ixp4xx_setup_port(ap, data, cs0->start, cs1->start); + ixp4xx_setup_port(ap, data, cmd->start, ctl->start); ata_print_version_once(dev, DRV_VERSION); diff --git a/include/linux/platform_data/pata_ixp4xx_cf.h b/include/linux/platform_data/pata_ixp4xx_cf.h index 601ba97fef57..e60fa41da4a5 100644 --- a/include/linux/platform_data/pata_ixp4xx_cf.h +++ b/include/linux/platform_data/pata_ixp4xx_cf.h @@ -14,8 +14,8 @@ struct ixp4xx_pata_data { volatile u32 *cs1_cfg; unsigned long cs0_bits; unsigned long cs1_bits; - void __iomem *cs0; - void __iomem *cs1; + void __iomem *cmd; + void __iomem *ctl; }; #endif From patchwork Sat Jul 31 21:35:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 1511975 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[92.34.204.253]) by smtp.gmail.com with ESMTPSA id t17sm440430ljk.102.2021.07.31.14.38.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Jul 2021 14:38:30 -0700 (PDT) From: Linus Walleij To: Jens Axboe , linux-ide@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Imre Kaloz , Krzysztof Halasa , Linus Walleij , devicetree@vger.kernel.org Subject: [PATCH 4/5 v2] pata: ixp4xx: Add DT bindings Date: Sat, 31 Jul 2021 23:35:54 +0200 Message-Id: <20210731213555.2965356-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210731213555.2965356-1-linus.walleij@linaro.org> References: <20210731213555.2965356-1-linus.walleij@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org This adds device tree bindings for the Intel IXP4xx compact flash card interface. Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij Reviewed-by: Rob Herring --- ChangeLog v1->v2: - Itemize the registers - Drop the epansion bus set-up to alleviate warnings --- .../ata/intel,ixp4xx-compact-flash.yaml | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml diff --git a/Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml b/Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml new file mode 100644 index 000000000000..52e18600ecff --- /dev/null +++ b/Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/intel,ixp4xx-compact-flash.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel IXP4xx CompactFlash Card Controller + +maintainers: + - Linus Walleij + +description: | + The IXP4xx network processors have a CompactFlash interface that presents + a CompactFlash card to the system as a true IDE (parallel ATA) device. The + device is always connected to the expansion bus of the IXP4xx SoCs using one + or two chip select areas and address translating logic on the board. The + node must be placed inside a chip select node on the IXP4xx expansion bus. + +properties: + compatible: + const: intel,ixp4xx-compact-flash + + reg: + items: + - description: Command interface registers + - description: Control interface registers + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +allOf: + - $ref: pata-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + + bus@c4000000 { + compatible = "intel,ixp43x-expansion-bus-controller", "syscon"; + reg = <0xc4000000 0x1000>; + native-endian; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0x0 0x50000000 0x01000000>, <1 0x0 0x51000000 0x01000000>; + dma-ranges = <0 0x0 0x50000000 0x01000000>, <1 0x0 0x51000000 0x01000000>; + ide@1,0 { + compatible = "intel,ixp4xx-compact-flash"; + reg = <1 0x00000000 0x1000>, <1 0x00040000 0x1000>; + interrupt-parent = <&gpio0>; + interrupts = <12 IRQ_TYPE_EDGE_RISING>; + }; + }; + +... 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[92.34.204.253]) by smtp.gmail.com with ESMTPSA id t17sm440430ljk.102.2021.07.31.14.38.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Jul 2021 14:38:32 -0700 (PDT) From: Linus Walleij To: Jens Axboe , linux-ide@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Imre Kaloz , Krzysztof Halasa , Linus Walleij Subject: [PATCH 5/5 v2] pata: ixp4xx: Rewrite to use device tree Date: Sat, 31 Jul 2021 23:35:55 +0200 Message-Id: <20210731213555.2965356-5-linus.walleij@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210731213555.2965356-1-linus.walleij@linaro.org> References: <20210731213555.2965356-1-linus.walleij@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org This rewrites the IXP4xx CF (IDE) libata driver to use the device tree exclusively to look up its resources: - Probe exclusively from the device tree and look up all resources from there. - Allocate a local state container with devres and pass this around in .private_data. - Initialize with struct ata_port_info. - Use the .set_piomode() callback instead of the much wider .set_mode(), we only support PIO after all. - Bump driver version number from 0.2 to 1.0 to reflect this wider change. - Get a handle on the expansion bus syscon regmap to alter the timings on the chip select. - Put in the more elaborate timing adjustment code for PIO0 to PIO4 in 8 and 16bit mode from the downstream OpenWrt patch. The board file initialization path and platform data include is dropped because the board files will be deleted at the same time as this patch is merged. The platform data file is not deleted right now so as not to conflict with the removal of board files. Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - No changes --- drivers/ata/pata_ixp4xx_cf.c | 201 +++++++++++++++++++++++++++-------- 1 file changed, 154 insertions(+), 47 deletions(-) diff --git a/drivers/ata/pata_ixp4xx_cf.c b/drivers/ata/pata_ixp4xx_cf.c index 72d6d6f2ef99..99c63087c8ae 100644 --- a/drivers/ata/pata_ixp4xx_cf.c +++ b/drivers/ata/pata_ixp4xx_cf.c @@ -13,45 +13,134 @@ */ #include +#include #include #include #include #include -#include +#include #include #define DRV_NAME "pata_ixp4xx_cf" -#define DRV_VERSION "0.2" +#define DRV_VERSION "1.0" -static int ixp4xx_set_mode(struct ata_link *link, struct ata_device **error) +struct ixp4xx_pata { + struct ata_host *host; + struct regmap *rmap; + u32 cmd_csreg; + void __iomem *cmd; + void __iomem *ctl; +}; + +#define IXP4XX_EXP_TIMING_STRIDE 0x04 +/* The timings for the chipselect is in bits 29..16 */ +#define IXP4XX_EXP_T1_T5_MASK GENMASK(29, 16) +#define IXP4XX_EXP_PIO_0_8 0x0a470000 +#define IXP4XX_EXP_PIO_1_8 0x06430000 +#define IXP4XX_EXP_PIO_2_8 0x02410000 +#define IXP4XX_EXP_PIO_3_8 0x00820000 +#define IXP4XX_EXP_PIO_4_8 0x00400000 +#define IXP4XX_EXP_PIO_0_16 0x29640000 +#define IXP4XX_EXP_PIO_1_16 0x05030000 +#define IXP4XX_EXP_PIO_2_16 0x00b20000 +#define IXP4XX_EXP_PIO_3_16 0x00820000 +#define IXP4XX_EXP_PIO_4_16 0x00400000 +#define IXP4XX_EXP_BW_MASK (BIT(6)|BIT(0)) +#define IXP4XX_EXP_BYTE_RD16 BIT(6) /* Byte reads on half-word devices */ +#define IXP4XX_EXP_BYTE_EN BIT(0) /* Use 8bit data bus if set */ + +static void ixp4xx_set_8bit_timing(struct ixp4xx_pata *ixpp, u8 pio_mode) +{ + switch (pio_mode) { + case XFER_PIO_0: + regmap_update_bits(ixpp->rmap, ixpp->cmd_csreg, + IXP4XX_EXP_T1_T5_MASK, IXP4XX_EXP_PIO_0_8); + break; + case XFER_PIO_1: + regmap_update_bits(ixpp->rmap, ixpp->cmd_csreg, + IXP4XX_EXP_T1_T5_MASK, IXP4XX_EXP_PIO_1_8); + break; + case XFER_PIO_2: + regmap_update_bits(ixpp->rmap, ixpp->cmd_csreg, + IXP4XX_EXP_T1_T5_MASK, IXP4XX_EXP_PIO_2_8); + break; + case XFER_PIO_3: + regmap_update_bits(ixpp->rmap, ixpp->cmd_csreg, + IXP4XX_EXP_T1_T5_MASK, IXP4XX_EXP_PIO_3_8); + break; + case XFER_PIO_4: + regmap_update_bits(ixpp->rmap, ixpp->cmd_csreg, + IXP4XX_EXP_T1_T5_MASK, IXP4XX_EXP_PIO_4_8); + break; + default: + break; + } + regmap_update_bits(ixpp->rmap, ixpp->cmd_csreg, + IXP4XX_EXP_BW_MASK, IXP4XX_EXP_BYTE_RD16|IXP4XX_EXP_BYTE_EN); +} + +static void ixp4xx_set_16bit_timing(struct ixp4xx_pata *ixpp, u8 pio_mode) { - struct ata_device *dev; - - ata_for_each_dev(dev, link, ENABLED) { - ata_dev_info(dev, "configured for PIO0\n"); - dev->pio_mode = XFER_PIO_0; - dev->xfer_mode = XFER_PIO_0; - dev->xfer_shift = ATA_SHIFT_PIO; - dev->flags |= ATA_DFLAG_PIO; + switch (pio_mode){ + case XFER_PIO_0: + regmap_update_bits(ixpp->rmap, ixpp->cmd_csreg, + IXP4XX_EXP_T1_T5_MASK, IXP4XX_EXP_PIO_0_16); + break; + case XFER_PIO_1: + regmap_update_bits(ixpp->rmap, ixpp->cmd_csreg, + IXP4XX_EXP_T1_T5_MASK, IXP4XX_EXP_PIO_1_16); + break; + case XFER_PIO_2: + regmap_update_bits(ixpp->rmap, ixpp->cmd_csreg, + IXP4XX_EXP_T1_T5_MASK, IXP4XX_EXP_PIO_2_16); + break; + case XFER_PIO_3: + regmap_update_bits(ixpp->rmap, ixpp->cmd_csreg, + IXP4XX_EXP_T1_T5_MASK, IXP4XX_EXP_PIO_3_16); + break; + case XFER_PIO_4: + regmap_update_bits(ixpp->rmap, ixpp->cmd_csreg, + IXP4XX_EXP_T1_T5_MASK, IXP4XX_EXP_PIO_4_16); + break; + default: + break; } - return 0; + regmap_update_bits(ixpp->rmap, ixpp->cmd_csreg, + IXP4XX_EXP_BW_MASK, IXP4XX_EXP_BYTE_RD16); } +/* This sets up the timing on the chipselect CMD accordingly */ +static void ixp4xx_set_piomode(struct ata_port *ap, struct ata_device *adev) +{ + struct ixp4xx_pata *ixpp = ap->host->private_data; + + ata_dev_printk(adev, KERN_INFO, "configured for PIO%d 8bit\n", + adev->pio_mode - XFER_PIO_0); + ixp4xx_set_8bit_timing(ixpp, adev->pio_mode); +} + + static unsigned int ixp4xx_mmio_data_xfer(struct ata_queued_cmd *qc, - unsigned char *buf, unsigned int buflen, int rw) + unsigned char *buf, unsigned int buflen, int rw) { unsigned int i; unsigned int words = buflen >> 1; u16 *buf16 = (u16 *) buf; + struct ata_device *adev = qc->dev; struct ata_port *ap = qc->dev->link->ap; void __iomem *mmio = ap->ioaddr.data_addr; - struct ixp4xx_pata_data *data = dev_get_platdata(ap->host->dev); + struct ixp4xx_pata *ixpp = ap->host->private_data; + unsigned long flags; + + ata_dev_printk(adev, KERN_DEBUG, "%s %d bytes\n", (rw == READ) ? "READ" : "WRITE", + buflen); + spin_lock_irqsave(ap->lock, flags); /* set the expansion bus in 16bit mode and restore * 8 bit mode after the transaction. */ - *data->cs0_cfg &= ~(0x01); - udelay(100); + ixp4xx_set_16bit_timing(ixpp, adev->pio_mode); + udelay(5); /* Transfer multiple of 2 bytes */ if (rw == READ) @@ -76,8 +165,10 @@ static unsigned int ixp4xx_mmio_data_xfer(struct ata_queued_cmd *qc, words++; } - udelay(100); - *data->cs0_cfg |= 0x01; + ixp4xx_set_8bit_timing(ixpp, adev->pio_mode); + udelay(5); + + spin_unlock_irqrestore(ap->lock, flags); return words << 1; } @@ -90,19 +181,25 @@ static struct ata_port_operations ixp4xx_port_ops = { .inherits = &ata_sff_port_ops, .sff_data_xfer = ixp4xx_mmio_data_xfer, .cable_detect = ata_cable_40wire, - .set_mode = ixp4xx_set_mode, + .set_piomode = ixp4xx_set_piomode, +}; + +static struct ata_port_info ixp4xx_port_info = { + .flags = ATA_FLAG_NO_ATAPI, + .pio_mask = ATA_PIO4, + .port_ops = &ixp4xx_port_ops, }; static void ixp4xx_setup_port(struct ata_port *ap, - struct ixp4xx_pata_data *data, + struct ixp4xx_pata *ixpp, unsigned long raw_cmd, unsigned long raw_ctl) { struct ata_ioports *ioaddr = &ap->ioaddr; raw_ctl += 0x06; - ioaddr->cmd_addr = data->cmd; - ioaddr->altstatus_addr = data->ctl + 0x06; - ioaddr->ctl_addr = data->ctl + 0x06; + ioaddr->cmd_addr = ixpp->cmd; + ioaddr->altstatus_addr = ixpp->ctl + 0x06; + ioaddr->ctl_addr = ixpp->ctl + 0x06; ata_sff_std_ports(ioaddr); @@ -135,10 +232,12 @@ static void ixp4xx_setup_port(struct ata_port *ap, static int ixp4xx_pata_probe(struct platform_device *pdev) { struct resource *cmd, *ctl; - struct ata_host *host; - struct ata_port *ap; + struct ata_port_info pi = ixp4xx_port_info; + const struct ata_port_info *ppi[] = { &pi, NULL }; struct device *dev = &pdev->dev; - struct ixp4xx_pata_data *data = dev_get_platdata(&pdev->dev); + struct device_node *np = dev->of_node; + struct ixp4xx_pata *ixpp; + u32 csindex; int ret; int irq; @@ -148,20 +247,32 @@ static int ixp4xx_pata_probe(struct platform_device *pdev) if (!cmd || !ctl) return -EINVAL; - /* allocate host */ - host = ata_host_alloc(dev, 1); - if (!host) + ixpp = devm_kzalloc(dev, sizeof(*ixpp), GFP_KERNEL); + if (!ixpp) + return -ENOMEM; + + ixpp->rmap = syscon_node_to_regmap(np->parent); + if (IS_ERR(ixpp->rmap)) + return dev_err_probe(dev, PTR_ERR(ixpp->rmap), "no regmap\n"); + /* Inspect our address to figure out what chipselect the CMD is on */ + ret = of_property_read_u32_index(np, "reg", 0, &csindex); + if (ret) + return dev_err_probe(dev, ret, "can't inspect CMD address\n"); + dev_info(dev, "using CS%d for PIO timing configuration\n", csindex); + ixpp->cmd_csreg = csindex * IXP4XX_EXP_TIMING_STRIDE; + + ixpp->host = ata_host_alloc_pinfo(dev, ppi, 1); + if (!ixpp->host) return -ENOMEM; + ixpp->host->private_data = ixpp; - /* acquire resources and fill host */ ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); if (ret) return ret; - data->cmd = devm_ioremap(dev, cmd->start, 0x1000); - data->ctl = devm_ioremap(dev, ctl->start, 0x1000); - - if (!data->cmd || !data->ctl) + ixpp->cmd = devm_ioremap_resource(dev, cmd); + ixpp->ctl = devm_ioremap_resource(dev, ctl); + if (IS_ERR(ixpp->cmd) || IS_ERR(ixpp->ctl)) return -ENOMEM; irq = platform_get_irq(pdev, 0); @@ -172,27 +283,23 @@ static int ixp4xx_pata_probe(struct platform_device *pdev) else return -EINVAL; - /* Setup expansion bus chip selects */ - *data->cs0_cfg = data->cs0_bits; - *data->cs1_cfg = data->cs1_bits; - - ap = host->ports[0]; - - ap->ops = &ixp4xx_port_ops; - ap->pio_mask = ATA_PIO4; - ap->flags |= ATA_FLAG_NO_ATAPI; - - ixp4xx_setup_port(ap, data, cmd->start, ctl->start); + /* Just one port to set up */ + ixp4xx_setup_port(ixpp->host->ports[0], ixpp, cmd->start, ctl->start); ata_print_version_once(dev, DRV_VERSION); - /* activate host */ - return ata_host_activate(host, irq, ata_sff_interrupt, 0, &ixp4xx_sht); + return ata_host_activate(ixpp->host, irq, ata_sff_interrupt, 0, &ixp4xx_sht); } +static const struct of_device_id ixp4xx_pata_of_match[] = { + { .compatible = "intel,ixp4xx-compact-flash", }, + { }, +}; + static struct platform_driver ixp4xx_pata_platform_driver = { .driver = { .name = DRV_NAME, + .of_match_table = ixp4xx_pata_of_match, }, .probe = ixp4xx_pata_probe, .remove = ata_platform_remove_one,