From patchwork Sat Jul 10 15:10:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 1503483 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=Qgby/js7; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4GMYQK2c5vz9sWc for ; Sun, 11 Jul 2021 01:11:21 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231975AbhGJPOB (ORCPT ); Sat, 10 Jul 2021 11:14:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231708AbhGJPN4 (ORCPT ); Sat, 10 Jul 2021 11:13:56 -0400 Received: from mail-qk1-x732.google.com (mail-qk1-x732.google.com [IPv6:2607:f8b0:4864:20::732]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66789C0613DD; Sat, 10 Jul 2021 08:11:11 -0700 (PDT) Received: by mail-qk1-x732.google.com with SMTP id e14so12833681qkl.9; Sat, 10 Jul 2021 08:11:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8D7EIFwB7o5lBsBYzgDc20GRiSV4PVIHl0mW81aH3ao=; b=Qgby/js7lMkIIxjOk24LsdAV2ArrCT61nLBrSuyfcCNWvJL6Fc0lJLlSOB58ax2577 aJl5zqFNzY10xNi3ONe6xnLFx08HGCNPCsSjGGIiDSkc6AdfEXX+qNWtucI2dkjaZrSm 9oIU/MgFrRAlqrrJV1epMRLp9Gn7SBeTYQFkeYUbxfAvo4mbAZJjgwlV+Wfg8HNkkCxj TDOCIb4P1S2uURolNXsOWullmyvnjTZM0o9V85bOvPaBc6+jWwkSUXvHv01HWruGKD0s 3Y3sDgskaiUlCmWhqB0NiXEmdPlW38EXnqlAAWX8otpJEdjRMsRcfbboQdoryqdJGRas GTpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8D7EIFwB7o5lBsBYzgDc20GRiSV4PVIHl0mW81aH3ao=; b=pACMATmyl6h3mLzpQJjL/jncbYIJYlZxqxU4OkvhF0YeJOTkscIpoGi2b9XAr0bE3S 344YLqRMTy3vWkdAtnTRcvws2O84FCbQyS6vvIIJi1kXqDZGmS9DmOhlRjDvnn25ajr7 lEc7Mjt85RplovoiPc9Ci4vqSL7RHQNjAdQvK/s7Y5B59zSwC2QI+VCQQNtwALhKhm+Z ZSXnsWNCT/YlvEReVanFzsdqR0jenVMLPpSnf23xW8LPrGOCTxt5bgn/0d/f3SzEV8Ax OOPAFic4J6Vj/S0ii/UUdVmlJpfL+kPCG0KKB79hDhrpNJ30+pnhv7uvgxy5IMsIz0U6 dJBQ== X-Gm-Message-State: AOAM530k2ocufPEkAVsUvG7R4nDvNvNDnTm9fu5wH2Fkt8NoGzqXQvrH FBsZkJWo7iQnDlBRrnR2Lsg= X-Google-Smtp-Source: ABdhPJzPNBZ5G4E3G40bv2Oo0EU79tFdSEEjxZIaE094wpCe3XBZZq/kORo/IXOKPYmBmp5Je218ZQ== X-Received: by 2002:a37:b2c3:: with SMTP id b186mr620714qkf.172.1625929870518; Sat, 10 Jul 2021 08:11:10 -0700 (PDT) Received: from master-laptop.sparksnet ([2601:153:980:85b1:ecc6:5233:6153:7b36]) by smtp.gmail.com with ESMTPSA id w14sm3445482qtc.55.2021.07.10.08.11.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 10 Jul 2021 08:11:10 -0700 (PDT) From: Peter Geis To: Rob Herring , Heiko Stuebner , Liang Chen Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Peter Geis Subject: [RFC PATCH 1/4] arm64: dts: rockchip: move rk3568 dtsi to rk356x dtsi Date: Sat, 10 Jul 2021 11:10:31 -0400 Message-Id: <20210710151034.32857-2-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210710151034.32857-1-pgwipeout@gmail.com> References: <20210710151034.32857-1-pgwipeout@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In preparation for separating the rk3568 and rk3566 device trees, move the base rk3568 dtsi to rk356x dtsi. This will allow us to strip out the rk3568 specific nodes. Signed-off-by: Peter Geis --- arch/arm64/boot/dts/rockchip/{rk3568.dtsi => rk356x.dtsi} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename arch/arm64/boot/dts/rockchip/{rk3568.dtsi => rk356x.dtsi} (100%) diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi similarity index 100% rename from arch/arm64/boot/dts/rockchip/rk3568.dtsi rename to arch/arm64/boot/dts/rockchip/rk356x.dtsi From patchwork Sat Jul 10 15:10:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 1503484 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=vh2x2RZF; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4GMYQV2d46z9s24 for ; Sun, 11 Jul 2021 01:11:30 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232105AbhGJPOF (ORCPT ); Sat, 10 Jul 2021 11:14:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48686 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231972AbhGJPN7 (ORCPT ); Sat, 10 Jul 2021 11:13:59 -0400 Received: from mail-qt1-x835.google.com (mail-qt1-x835.google.com [IPv6:2607:f8b0:4864:20::835]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9E713C0613DD; Sat, 10 Jul 2021 08:11:13 -0700 (PDT) Received: by mail-qt1-x835.google.com with SMTP id w13so10011134qtc.0; Sat, 10 Jul 2021 08:11:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kiXhNGjwgPMqZlw9r/TOYc015iT7vsKfLAN0xOZdoCo=; b=vh2x2RZF5s9o+h9/ljgq0kO/zdk1OYkk7S0v7EHCQIllZoU6NUwYXoBpCyEhK5LvaR ea1O5lel5VioUFHesw1MkfUmv9h2psmH67HNV5hpIiBXuVfkk0Y4VmlO36eaP7uD6TLa eteK4MlyVwdciyFS8/F27CeBVnC5VbfnOtPpWBG6pyNsYh89pJ/sD7ARBMuQWRVpbGGk 0K2BZT0iGL7y7KNTWmuTLpHauv3fqSMH7mY+VESXR4ZNMUr/nZXQXxlHpvqjRGF6hMkA dLthLvxgEmR3MHqmtSJLSaVos3izknNUrakXhNi2JpNmI8nlu6VfDzlS3gbN2cRsvAe7 c+Aw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kiXhNGjwgPMqZlw9r/TOYc015iT7vsKfLAN0xOZdoCo=; b=Xt/eHFGuZElJiMVHN8FOOMn0vIBLbbBNff9OjWTHnnuPnIrYJB7AeJj9ibURrgjdYH F2r2V3ZqJpuRpTZFssTXez9OC8Rey50b0/+3iB2CYijVhzGcuwRY/WJaqkXCYz1ujnfS EksDVJ4sr7RmqcP6X0looSoBUCRqLgB9jjpVcbs9ZCfEsm9sWV+oNa9Uveh/1izUKSBh dnA5tnW92g+zsL+zSDVYm8dbeXf6cyPe+afGzNGqJodjQK48e0Y8szvfM49QL5WjWpjh 3id5M1+GQgHSvsDwpSwLhiwZGjl5iz79GQgtKOzqNNdzXtPpuB87GkLEW2qinZ2ZBsl4 j7bQ== X-Gm-Message-State: AOAM533FHYdzUmBJgBlm5/plE5UeIcDC2Ls7dITSlPWHz0SXk4j75HRh eIDivdrkHDFMA7FdY9vogZ4= X-Google-Smtp-Source: ABdhPJz7QaTlM2stRRPSvKsAW5YARCkE51wL824yvBD1hC5kBGfqM2bhuEGo4KOgvLzgW/K4PhxKew== X-Received: by 2002:ac8:7a97:: with SMTP id x23mr30542073qtr.48.1625929872676; Sat, 10 Jul 2021 08:11:12 -0700 (PDT) Received: from master-laptop.sparksnet ([2601:153:980:85b1:ecc6:5233:6153:7b36]) by smtp.gmail.com with ESMTPSA id w14sm3445482qtc.55.2021.07.10.08.11.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 10 Jul 2021 08:11:12 -0700 (PDT) From: Peter Geis To: Rob Herring , Heiko Stuebner , Liang Chen Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Peter Geis Subject: [RFC PATCH 4/4] arm64: dts: rockchip: add basic dts for Pine64 Quartz64-A Date: Sat, 10 Jul 2021 11:10:34 -0400 Message-Id: <20210710151034.32857-5-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210710151034.32857-1-pgwipeout@gmail.com> References: <20210710151034.32857-1-pgwipeout@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a basic dts for the Pine64 Quartz64 Model A Single Board Computer. This board outputs on uart2 for debug. Signed-off-by: Peter Geis Acked-by: Rob Herring --- .../devicetree/bindings/arm/rockchip.yaml | 5 + arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3566-quartz64-a.dts | 321 ++++++++++++++++++ 3 files changed, 327 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 6546b015fc62..652e40c309bd 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -455,6 +455,11 @@ properties: - const: pine64,rockpro64 - const: rockchip,rk3399 + - description: Pine64 Quartz64 Model A + items: + - const: pine64,quartz64-a + - const: rockchip,rk3566 + - description: Radxa Rock items: - const: radxa,rock diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 7fdb41de01ec..a1f4351be166 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -51,4 +51,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts new file mode 100644 index 000000000000..42dc21f2b350 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -0,0 +1,321 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include +#include +#include "rk3566.dtsi" + +/ { + model = "Pine64 RK3566 Quartz64-A Board"; + compatible = "pine64,quartz64-a", "rockchip,rk3566"; + + aliases { + mmc1 = &sdhci; + }; + + chosen: chosen { + stdout-path = "serial2:1500000n8"; + }; + + vcc12v_dcin: vcc12v_dcin { + compatible = "regulator-fixed"; + regulator-name = "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + /* vbus feeds the rk817 usb input. + * With no battery attached, also feeds vcc_bat+ + * via ON/OFF_BAT jumper + */ + vbus: vbus { + compatible = "regulator-fixed"; + regulator-name = "vbus"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; + }; + + vcc5v0_usb: vcc5v0_usb { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; + }; + + /* sourced from vbus and vcc_bat+ via rk817 sw5 */ + vcc_sys: vcc_sys { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <4400000>; + regulator-max-microvolt = <4400000>; + vin-supply = <&vbus>; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&i2c0 { + status = "okay"; + + vdd_cpu: regulator@1c { + compatible = "tcs,tcs4525"; + reg = <0x1c>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1150000>; + regulator-ramp-delay = <2300>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk817: pmic@20 { + compatible = "rockchip,rk817"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = ; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_sys>; + vcc9-supply = <&dcdc_boost>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_logic"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_gpu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_3v3: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_3v3"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda_0v9"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda0v9_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_acodec"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_1v8: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_dvp: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8_dvp"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc2v8_dvp: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vcc2v8_dvp"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + dcdc_boost: BOOST { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-name = "boost"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + otg_switch: OTG_SWITCH { + regulator-name = "otg_switch"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&pinctrl { + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&sdhci { + bus-width = <8>; + max-frequency = <200000000>; + non-removable; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_1v8>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +};