From patchwork Fri Jul 9 15:06:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 1503241 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=gSkqCPlm; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GLxNJ5XV0z9sRf for ; Sat, 10 Jul 2021 01:07:27 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8787F398EC68 for ; Fri, 9 Jul 2021 15:07:25 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8787F398EC68 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1625843245; bh=uMMPCJCPR0z3sS5pKImlqHoEe6flqFMN0o29Q+qK1+0=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=gSkqCPlmyJau/dWBmW2nKt7wCIKVcKc0oXvPPIF2cVGLyqm6FEFnDED0bXQsqKh4o wHJ4uPo7BBx+n2X7meSicmXu3vLn/6e4H3AcbruZ1TvCIwj+4j4bDdf8TfUpMgKlcu yl+rCw5KKH59nq7yFP6+C3mXWLLbq9XmXstrvTUo= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-qt1-x82b.google.com (mail-qt1-x82b.google.com [IPv6:2607:f8b0:4864:20::82b]) by sourceware.org (Postfix) with ESMTPS id E9A25385041C for ; Fri, 9 Jul 2021 15:07:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E9A25385041C Received: by mail-qt1-x82b.google.com with SMTP id z12so7794188qtj.3 for ; Fri, 09 Jul 2021 08:07:04 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=uMMPCJCPR0z3sS5pKImlqHoEe6flqFMN0o29Q+qK1+0=; b=hJUnBPZxg6mfa1kDJ+ReqRjNpPPE29QPE/ZbiSniuF7VlH/qCKzgBA+EzMn8gG98gu a9LMGl6dttwWzYNlL6kmt0RpL666ZB759cGPfMFJid9ehhc3LDqeXIV5OKteA/YoksXV TkMgk9Y4vrC2FnIp/ewD2fKaFEK3/OBNmaIp5SzzAzLN7vYY1NP2rw8ElOd7b+r865EC mLpNKFvNMCd4pKeAhW4JflAo/7rSIHXsWGir8NQwhEZMLVtsgfpZE/ufOMl3MZN+3wtF hn/zssKw1li2uAYTZN6RScovkwFWiNo0cPexhoDBpQxbaE+dNIBp9Zr6tUzjc8ohkDTX Xp7Q== X-Gm-Message-State: AOAM530Z7V7SyvKQl0+FZ/l0H1YdOUaSwydp0uOkL3I/wlf5hC2wdWIk 7pYjlEkwtqFXjtadDdhXp8VZQe5CTY4BP08holpRBRvZmd9JJg== X-Google-Smtp-Source: ABdhPJzYru/sQJpz1qUlbTnNCwgnxoX5rndec1kl5QqvG0QecoJTXh5UUZK0xdnF200KIb8Rz+/UokpXMIqisuysx5Q= X-Received: by 2002:ac8:564b:: with SMTP id 11mr10366228qtt.60.1625843224293; Fri, 09 Jul 2021 08:07:04 -0700 (PDT) MIME-Version: 1.0 Date: Fri, 9 Jul 2021 17:06:52 +0200 Message-ID: Subject: [PATCH] Change the type of memory classification functions to bool To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-9.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" 2021-07-09 Uroš Bizjak gcc/ * recog.c (memory_address_addr_space_p): Change the type to bool. Return true/false instead of 1/0. (offsettable_memref_p): Ditto. (offsettable_nonstrict_memref_p): Ditto. (offsettable_address_addr_space_p): Ditto. Change the type of addressp indirect function to bool. * recog.h (memory_address_addr_space_p): Change the type to bool. (strict_memory_address_addr_space_p): Ditto. (offsettable_memref_p): Ditto. (offsettable_nonstrict_memref_p): Ditto. (offsettable_address_addr_space_p): Ditto. * reload.c (maybe_memory_address_addr_space_p): Ditto. (strict_memory_address_addr_space_p): Change the type to bool. Return true/false instead of 1/0. (maybe_memory_address_addr_space_p): Change the type to bool. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. OK for master? Uros. diff --git a/gcc/recog.c b/gcc/recog.c index 2114df8c0d1..5a42c45361d 100644 --- a/gcc/recog.c +++ b/gcc/recog.c @@ -1776,20 +1776,20 @@ pop_operand (rtx op, machine_mode mode) return XEXP (op, 0) == stack_pointer_rtx; } -/* Return 1 if ADDR is a valid memory address +/* Return true if ADDR is a valid memory address for mode MODE in address space AS. */ -int +bool memory_address_addr_space_p (machine_mode mode ATTRIBUTE_UNUSED, rtx addr, addr_space_t as) { #ifdef GO_IF_LEGITIMATE_ADDRESS gcc_assert (ADDR_SPACE_GENERIC_P (as)); GO_IF_LEGITIMATE_ADDRESS (mode, addr, win); - return 0; + return false; win: - return 1; + return true; #else return targetm.addr_space.legitimate_address_p (mode, addr, 0, as); #endif @@ -2361,18 +2361,16 @@ find_constant_term_loc (rtx *p) return 0; } -/* Return 1 if OP is a memory reference - whose address contains no side effects - and remains valid after the addition - of a positive integer less than the - size of the object being referenced. +/* Return true if OP is a memory reference whose address contains + no side effects and remains valid after the addition of a positive + integer less than the size of the object being referenced. We assume that the original address is valid and do not check it. This uses strict_memory_address_p as a subroutine, so don't use it before reload. */ -int +bool offsettable_memref_p (rtx op) { return ((MEM_P (op)) @@ -2383,7 +2381,7 @@ offsettable_memref_p (rtx op) /* Similar, but don't require a strictly valid mem ref: consider pseudo-regs valid as index or base regs. */ -int +bool offsettable_nonstrict_memref_p (rtx op) { return ((MEM_P (op)) @@ -2391,7 +2389,7 @@ offsettable_nonstrict_memref_p (rtx op) MEM_ADDR_SPACE (op))); } -/* Return 1 if Y is a memory address which contains no side effects +/* Return true if Y is a memory address which contains no side effects and would remain valid for address space AS after the addition of a positive integer less than the size of that mode. @@ -2401,7 +2399,7 @@ offsettable_nonstrict_memref_p (rtx op) If STRICTP is nonzero, we require a strictly valid address, for the sake of use in reload.c. */ -int +bool offsettable_address_addr_space_p (int strictp, machine_mode mode, rtx y, addr_space_t as) { @@ -2409,19 +2407,19 @@ offsettable_address_addr_space_p (int strictp, machine_mode mode, rtx y, rtx z; rtx y1 = y; rtx *y2; - int (*addressp) (machine_mode, rtx, addr_space_t) = + bool (*addressp) (machine_mode, rtx, addr_space_t) = (strictp ? strict_memory_address_addr_space_p : memory_address_addr_space_p); poly_int64 mode_sz = GET_MODE_SIZE (mode); if (CONSTANT_ADDRESS_P (y)) - return 1; + return true; /* Adjusting an offsettable address involves changing to a narrower mode. Make sure that's OK. */ if (mode_dependent_address_p (y, as)) - return 0; + return false; machine_mode address_mode = GET_MODE (y); if (address_mode == VOIDmode) @@ -2442,7 +2440,7 @@ offsettable_address_addr_space_p (int strictp, machine_mode mode, rtx y, if ((ycode == PLUS) && (y2 = find_constant_term_loc (&y1))) { - int good; + bool good; y1 = *y2; *y2 = plus_constant (address_mode, *y2, mode_sz - 1); @@ -2456,7 +2454,7 @@ offsettable_address_addr_space_p (int strictp, machine_mode mode, rtx y, } if (GET_RTX_CLASS (ycode) == RTX_AUTOINC) - return 0; + return false; /* The offset added here is chosen as the maximum offset that any instruction could need to add when operating on something @@ -2486,7 +2484,7 @@ offsettable_address_addr_space_p (int strictp, machine_mode mode, rtx y, return (*addressp) (QImode, z, as); } -/* Return 1 if ADDR is an address-expression whose effect depends +/* Return true if ADDR is an address-expression whose effect depends on the mode of the memory reference it is used in. ADDRSPACE is the address space associated with the address. diff --git a/gcc/recog.h b/gcc/recog.h index 653d0b08184..1df1a6e7404 100644 --- a/gcc/recog.h +++ b/gcc/recog.h @@ -200,11 +200,11 @@ extern void temporarily_undo_changes (int); extern void redo_changes (int); extern int constrain_operands (int, alternative_mask); extern int constrain_operands_cached (rtx_insn *, int); -extern int memory_address_addr_space_p (machine_mode, rtx, addr_space_t); +extern bool memory_address_addr_space_p (machine_mode, rtx, addr_space_t); #define memory_address_p(mode,addr) \ memory_address_addr_space_p ((mode), (addr), ADDR_SPACE_GENERIC) -extern int strict_memory_address_addr_space_p (machine_mode, rtx, - addr_space_t); +extern bool strict_memory_address_addr_space_p (machine_mode, rtx, + addr_space_t); #define strict_memory_address_p(mode,addr) \ strict_memory_address_addr_space_p ((mode), (addr), ADDR_SPACE_GENERIC) extern int validate_replace_rtx_subexp (rtx, rtx, rtx_insn *, rtx *); @@ -218,9 +218,9 @@ extern int num_changes_pending (void); extern bool reg_fits_class_p (const_rtx, reg_class_t, int, machine_mode); extern bool valid_insn_p (rtx_insn *); -extern int offsettable_memref_p (rtx); -extern int offsettable_nonstrict_memref_p (rtx); -extern int offsettable_address_addr_space_p (int, machine_mode, rtx, +extern bool offsettable_memref_p (rtx); +extern bool offsettable_nonstrict_memref_p (rtx); +extern bool offsettable_address_addr_space_p (int, machine_mode, rtx, addr_space_t); #define offsettable_address_p(strict,mode,addr) \ offsettable_address_addr_space_p ((strict), (mode), (addr), \ diff --git a/gcc/reload.c b/gcc/reload.c index d21be917e56..4c55ca58a5f 100644 --- a/gcc/reload.c +++ b/gcc/reload.c @@ -262,8 +262,8 @@ static bool alternative_allows_const_pool_ref (rtx, const char *, int); static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx_insn *, int *); static rtx make_memloc (rtx, int); -static int maybe_memory_address_addr_space_p (machine_mode, rtx, - addr_space_t, rtx *); +static bool maybe_memory_address_addr_space_p (machine_mode, rtx, + addr_space_t, rtx *); static int find_reloads_address (machine_mode, rtx *, rtx, rtx *, int, enum reload_type, int, rtx_insn *); static rtx subst_reg_equivs (rtx, rtx_insn *); @@ -2156,21 +2156,21 @@ hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x) return 0; } -/* Return 1 if ADDR is a valid memory address for mode MODE +/* Return true if ADDR is a valid memory address for mode MODE in address space AS, and check that each pseudo reg has the proper kind of hard reg. */ -int +bool strict_memory_address_addr_space_p (machine_mode mode ATTRIBUTE_UNUSED, rtx addr, addr_space_t as) { #ifdef GO_IF_LEGITIMATE_ADDRESS gcc_assert (ADDR_SPACE_GENERIC_P (as)); GO_IF_LEGITIMATE_ADDRESS (mode, addr, win); - return 0; + return false; win: - return 1; + return true; #else return targetm.addr_space.legitimate_address_p (mode, addr, 1, as); #endif @@ -4829,11 +4829,11 @@ make_memloc (rtx ad, int regno) to mode MODE in address space AS by reloading the part pointed to by PART into a register. */ -static int +static bool maybe_memory_address_addr_space_p (machine_mode mode, rtx ad, addr_space_t as, rtx *part) { - int retv; + bool retv; rtx tem = *part; rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());