From patchwork Thu Jul 1 07:51:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongyu Wang X-Patchwork-Id: 1499432 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=O8dvuWlA; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GFr7B449Hz9sV8 for ; Thu, 1 Jul 2021 17:53:26 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E9B0B396DC2C for ; Thu, 1 Jul 2021 07:53:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E9B0B396DC2C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1625126004; bh=S/cPhBkqxMjT6kYrW9uASzjl/tdu6N21aXVrb5FuaPM=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=O8dvuWlAKj8ZeZwfEAvj3qbfBTd0pNKYLnd6+nmcjKOtACwwvgEK1vVBQh/4oWfIP RIQIxKcAv7NxhP8ns69L3Zf0fizbkceR4nFmTfcxsRhamBO1W+7+ahAHVrJu55qUan ZpCPfIwSJUaMKhv8lVSb0w7gVIddKtvWgVzVmXQE= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by sourceware.org (Postfix) with ESMTPS id B992E396E00C for ; Thu, 1 Jul 2021 07:51:55 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org B992E396E00C X-IronPort-AV: E=McAfee;i="6200,9189,10031"; a="195653642" X-IronPort-AV: E=Sophos;i="5.83,313,1616482800"; d="scan'208";a="195653642" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jul 2021 00:51:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.83,313,1616482800"; d="scan'208";a="626280820" Received: from scymds01.sc.intel.com ([10.148.94.138]) by orsmga005.jf.intel.com with ESMTP; 01 Jul 2021 00:51:50 -0700 Received: from shliclel314.sh.intel.com (shliclel314.sh.intel.com [10.239.236.214]) by scymds01.sc.intel.com with ESMTP id 1617pnFK010875; Thu, 1 Jul 2021 00:51:50 -0700 To: gcc-patches@gcc.gnu.org Subject: [PATCH] [i386] Clear odata for aes(enc|dec)(wide)?kl intrinsics Date: Thu, 1 Jul 2021 15:51:49 +0800 Message-Id: <20210701075149.1619883-1-hongyu.wang@intel.com> X-Mailer: git-send-email 2.18.2 X-Spam-Status: No, score=-10.4 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM, GIT_PATCH_0, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_SOFTFAIL, SPOOFED_FREEMAIL, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Hongyu Wang via Gcc-patches From: Hongyu Wang Reply-To: Hongyu Wang Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" For Keylocker aesenc/aesdec intrinsics, current implementation moves idata to odata unconditionally, which causes safety issue when the instruction meets runtime error. So we add a branch to clear odata when ZF is set after instruction exectution. gcc/ChangeLog: * config/i386/i386-expand.c (ix86_expand_builtin): Add branch to clear odata when ZF is set for asedecenc_expand and wideaesdecenc_expand. gcc/testsuite/ChangeLog: * gcc.target/i386/keylocker-aesdec128kl.c: Update test. * gcc.target/i386/keylocker-aesdec256kl.c: Likewise. * gcc.target/i386/keylocker-aesdecwide128kl.c: Likewise. * gcc.target/i386/keylocker-aesdecwide256kl.c: Likewise. * gcc.target/i386/keylocker-aesenc128kl.c: Likewise. * gcc.target/i386/keylocker-aesenc256kl.c: Likewise. * gcc.target/i386/keylocker-aesencwide128kl.c: Likewise. * gcc.target/i386/keylocker-aesencwide256kl.c: Likewise. --- gcc/config/i386/i386-expand.c | 33 ++++++++++++++++--- .../gcc.target/i386/keylocker-aesdec128kl.c | 2 ++ .../gcc.target/i386/keylocker-aesdec256kl.c | 2 ++ .../i386/keylocker-aesdecwide128kl.c | 9 +++++ .../i386/keylocker-aesdecwide256kl.c | 9 +++++ .../gcc.target/i386/keylocker-aesenc128kl.c | 2 ++ .../gcc.target/i386/keylocker-aesenc256kl.c | 2 ++ .../i386/keylocker-aesencwide128kl.c | 9 +++++ .../i386/keylocker-aesencwide256kl.c | 9 +++++ 9 files changed, 72 insertions(+), 5 deletions(-) diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c index e9763eb5b3e..de85f256fee 100644 --- a/gcc/config/i386/i386-expand.c +++ b/gcc/config/i386/i386-expand.c @@ -11556,6 +11556,9 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, aesdecenc_expand: + rtx_code_label *ok_label; + rtx tmp; + arg0 = CALL_EXPR_ARG (exp, 0); // __m128i *odata arg1 = CALL_EXPR_ARG (exp, 1); // __m128i idata arg2 = CALL_EXPR_ARG (exp, 2); // const void *p @@ -11586,10 +11589,21 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, if (target == 0) target = gen_reg_rtx (QImode); - pat = gen_rtx_EQ (QImode, gen_rtx_REG (CCZmode, FLAGS_REG), - const0_rtx); - emit_insn (gen_rtx_SET (target, pat)); + /* NB: For some keylocker insn, ZF will be set when runtime + error occurs. Then the output should be cleared for safety. */ + tmp = gen_rtx_REG (CCZmode, FLAGS_REG); + pat = gen_rtx_EQ (QImode, tmp, const0_rtx); + ok_label = gen_label_rtx (); + emit_cmp_and_jump_insns (tmp, const0_rtx, NE, 0, GET_MODE (tmp), + true, ok_label); + /* Usually the runtime error seldom occur, so predict OK path as + hotspot to optimize it as fallthrough block. */ + predict_jump (REG_BR_PROB_BASE * 90 / 100); + + emit_insn (gen_rtx_SET (op1, const0_rtx)); + emit_label (ok_label); + emit_insn (gen_rtx_SET (target, pat)); emit_insn (gen_rtx_SET (op0, op1)); return target; @@ -11644,8 +11658,17 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, if (target == 0) target = gen_reg_rtx (QImode); - pat = gen_rtx_EQ (QImode, gen_rtx_REG (CCZmode, FLAGS_REG), - const0_rtx); + tmp = gen_rtx_REG (CCZmode, FLAGS_REG); + pat = gen_rtx_EQ (QImode, tmp, const0_rtx); + ok_label = gen_label_rtx (); + emit_cmp_and_jump_insns (tmp, const0_rtx, NE, 0, GET_MODE (tmp), + true, ok_label); + predict_jump (REG_BR_PROB_BASE * 90 / 100); + + for (i = 0; i < 8; i++) + emit_insn (gen_rtx_SET (xmm_regs[i], const0_rtx)); + + emit_label (ok_label); emit_insn (gen_rtx_SET (target, pat)); for (i = 0; i < 8; i++) diff --git a/gcc/testsuite/gcc.target/i386/keylocker-aesdec128kl.c b/gcc/testsuite/gcc.target/i386/keylocker-aesdec128kl.c index d134612beea..71111c3206c 100644 --- a/gcc/testsuite/gcc.target/i386/keylocker-aesdec128kl.c +++ b/gcc/testsuite/gcc.target/i386/keylocker-aesdec128kl.c @@ -2,8 +2,10 @@ /* { dg-options "-mkl -O2" } */ /* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ /* { dg-final { scan-assembler "aesdec128kl\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "j\[ez\]" } } */ /* { dg-final { scan-assembler "sete" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/keylocker-aesdec256kl.c b/gcc/testsuite/gcc.target/i386/keylocker-aesdec256kl.c index 34736d2d61a..30189d6ae06 100644 --- a/gcc/testsuite/gcc.target/i386/keylocker-aesdec256kl.c +++ b/gcc/testsuite/gcc.target/i386/keylocker-aesdec256kl.c @@ -2,8 +2,10 @@ /* { dg-options "-mkl -O2" } */ /* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ /* { dg-final { scan-assembler "aesdec256kl\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "j\[ez\]" } } */ /* { dg-final { scan-assembler "sete" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/keylocker-aesdecwide128kl.c b/gcc/testsuite/gcc.target/i386/keylocker-aesdecwide128kl.c index d23cf4b6517..93806e51508 100644 --- a/gcc/testsuite/gcc.target/i386/keylocker-aesdecwide128kl.c +++ b/gcc/testsuite/gcc.target/i386/keylocker-aesdecwide128kl.c @@ -9,6 +9,7 @@ /* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*96\[^\\n\\r\]*, %xmm6" } } */ /* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*112\[^\\n\\r\]*, %xmm7" } } */ /* { dg-final { scan-assembler "aesdecwide128kl\[ \\t\]+\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "j\[ez\]" } } */ /* { dg-final { scan-assembler "sete" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm1,\[^\\n\\r\]*16\[^\\n\\r\]*" } } */ @@ -18,6 +19,14 @@ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm5,\[^\\n\\r\]*80\[^\\n\\r\]*" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm6,\[^\\n\\r\]*96\[^\\n\\r\]*" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm7,\[^\\n\\r\]*112\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm1, %xmm1" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm2, %xmm2" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm3, %xmm3" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm4, %xmm4" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm5, %xmm5" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm6, %xmm6" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm7, %xmm7" } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/keylocker-aesdecwide256kl.c b/gcc/testsuite/gcc.target/i386/keylocker-aesdecwide256kl.c index 44c3252ab47..f9ccc82c7ca 100644 --- a/gcc/testsuite/gcc.target/i386/keylocker-aesdecwide256kl.c +++ b/gcc/testsuite/gcc.target/i386/keylocker-aesdecwide256kl.c @@ -9,6 +9,7 @@ /* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*96\[^\\n\\r\]*, %xmm6" } } */ /* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*112\[^\\n\\r\]*, %xmm7" } } */ /* { dg-final { scan-assembler "aesdecwide256kl\[ \\t\]+\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "j\[ez\]" } } */ /* { dg-final { scan-assembler "sete" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm1,\[^\\n\\r\]*16\[^\\n\\r\]*" } } */ @@ -18,6 +19,14 @@ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm5,\[^\\n\\r\]*80\[^\\n\\r\]*" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm6,\[^\\n\\r\]*96\[^\\n\\r\]*" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm7,\[^\\n\\r\]*112\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm1, %xmm1" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm2, %xmm2" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm3, %xmm3" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm4, %xmm4" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm5, %xmm5" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm6, %xmm6" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm7, %xmm7" } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/keylocker-aesenc128kl.c b/gcc/testsuite/gcc.target/i386/keylocker-aesenc128kl.c index 9ff483656fd..61a9cc279fc 100644 --- a/gcc/testsuite/gcc.target/i386/keylocker-aesenc128kl.c +++ b/gcc/testsuite/gcc.target/i386/keylocker-aesenc128kl.c @@ -2,8 +2,10 @@ /* { dg-options "-mkl -O2" } */ /* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ /* { dg-final { scan-assembler "aesenc128kl\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "j\[ez\]" } } */ /* { dg-final { scan-assembler "sete" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/keylocker-aesenc256kl.c b/gcc/testsuite/gcc.target/i386/keylocker-aesenc256kl.c index 1c5e0765c07..f8e6bb7321f 100644 --- a/gcc/testsuite/gcc.target/i386/keylocker-aesenc256kl.c +++ b/gcc/testsuite/gcc.target/i386/keylocker-aesenc256kl.c @@ -2,8 +2,10 @@ /* { dg-options "-mkl -O2" } */ /* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ /* { dg-final { scan-assembler "aesenc256kl\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "j\[ez\]" } } */ /* { dg-final { scan-assembler "sete" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/keylocker-aesencwide128kl.c b/gcc/testsuite/gcc.target/i386/keylocker-aesencwide128kl.c index 9fb9c49314f..c0fcd28fb07 100644 --- a/gcc/testsuite/gcc.target/i386/keylocker-aesencwide128kl.c +++ b/gcc/testsuite/gcc.target/i386/keylocker-aesencwide128kl.c @@ -9,6 +9,7 @@ /* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*96\[^\\n\\r\]*, %xmm6" } } */ /* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*112\[^\\n\\r\]*, %xmm7" } } */ /* { dg-final { scan-assembler "aesencwide128kl\[ \\t\]+\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "j\[ez\]" } } */ /* { dg-final { scan-assembler "sete" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm1,\[^\\n\\r\]*16\[^\\n\\r\]*" } } */ @@ -18,6 +19,14 @@ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm5,\[^\\n\\r\]*80\[^\\n\\r\]*" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm6,\[^\\n\\r\]*96\[^\\n\\r\]*" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm7,\[^\\n\\r\]*112\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm1, %xmm1" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm2, %xmm2" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm3, %xmm3" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm4, %xmm4" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm5, %xmm5" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm6, %xmm6" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm7, %xmm7" } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/keylocker-aesencwide256kl.c b/gcc/testsuite/gcc.target/i386/keylocker-aesencwide256kl.c index 125a787dcd9..31463a8b2da 100644 --- a/gcc/testsuite/gcc.target/i386/keylocker-aesencwide256kl.c +++ b/gcc/testsuite/gcc.target/i386/keylocker-aesencwide256kl.c @@ -9,6 +9,7 @@ /* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*96\[^\\n\\r\]*, %xmm6" } } */ /* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*112\[^\\n\\r\]*, %xmm7" } } */ /* { dg-final { scan-assembler "aesencwide256kl\[ \\t\]+\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "j\[ez\]" } } */ /* { dg-final { scan-assembler "sete" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm1,\[^\\n\\r\]*16\[^\\n\\r\]*" } } */ @@ -18,6 +19,14 @@ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm5,\[^\\n\\r\]*80\[^\\n\\r\]*" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm6,\[^\\n\\r\]*96\[^\\n\\r\]*" } } */ /* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm7,\[^\\n\\r\]*112\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm1, %xmm1" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm2, %xmm2" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm3, %xmm3" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm4, %xmm4" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm5, %xmm5" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm6, %xmm6" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm7, %xmm7" } } */ #include