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Thu, 27 May 2021 01:18:25 -0700 (PDT) From: Denis Kalashnikov X-Google-Original-From: Denis Kalashnikov To: openwrt-devel@lists.openwrt.org Cc: Denis Kalashnikov , Gabor Juhos , Koen Vandeputte , Sergey Ryazanov Subject: [PATCH 1/3] ath79: add gpio-latch driver for MikroTik RouterBOARDs Date: Thu, 27 May 2021 11:16:44 +0300 Message-Id: <20210527081646.4813-2-user@home.lan> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210527081646.4813-1-user@home.lan> References: <20210527081646.4813-1-user@home.lan> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210527_011828_324001_227D5496 X-CRM114-Status: GOOD ( 23.78 ) X-Spam-Score: 0.1 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Denis Kalashnikov This is a slighty modified version of ar71xx gpio-latch driver written by Gabor Juhos . Changes: * DTS support, * New gpio API (gpiod_*). Content analysis details: (0.1 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [denis281089[at]gmail.com] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [denis281089[at]gmail.com] -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:130 listed in] [list.dnswl.org] -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org From: Denis Kalashnikov This is a slighty modified version of ar71xx gpio-latch driver written by Gabor Juhos . Changes: * DTS support, * New gpio API (gpiod_*). Signed-off-by: Denis Kalashnikov Reviewed-by: Sergey Ryazanov --- Changelog: RFC v1 --> RFC v2 - Don't use MFD driver API anymore, - Use the new gpio API (gpiod_*), - Add support of kernel 5.10. RFC v2 --> v1 - Change DTS node params -- remove redundant latch-enable-gpios param, - Delete unneeded direction input callback (latch is output-only), - Add support of pin holes (unconnected lines of the latch). --- .../ath79/files/drivers/gpio/gpio-latch.c | 203 ++++++++++++++++++ .../patches-5.10/939-mikrotik-rb91x.patch | 26 +++ .../patches-5.4/939-mikrotik-rb91x.patch | 23 ++ 3 files changed, 252 insertions(+) create mode 100644 target/linux/ath79/files/drivers/gpio/gpio-latch.c create mode 100644 target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch create mode 100644 target/linux/ath79/patches-5.4/939-mikrotik-rb91x.patch diff --git a/target/linux/ath79/files/drivers/gpio/gpio-latch.c b/target/linux/ath79/files/drivers/gpio/gpio-latch.c new file mode 100644 index 0000000000..f3545a663e --- /dev/null +++ b/target/linux/ath79/files/drivers/gpio/gpio-latch.c @@ -0,0 +1,203 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * GPIO latch driver + * + * Copyright (C) 2014 Gabor Juhos + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define GPIO_LATCH_DRIVER_NAME "gpio-latch" +#define GPIO_LATCH_LINES 9 + +struct gpio_latch_chip { + struct gpio_chip gc; + struct mutex mutex; + struct mutex latch_mutex; + bool latch_enabled; + int le_gpio; + bool le_active_low; + struct gpio_desc *gpios[GPIO_LATCH_LINES]; +}; + +static inline struct gpio_latch_chip *to_gpio_latch_chip(struct gpio_chip *gc) +{ + return container_of(gc, struct gpio_latch_chip, gc); +} + +static void gpio_latch_lock(struct gpio_latch_chip *glc, bool enable) +{ + mutex_lock(&glc->mutex); + + if (enable) + glc->latch_enabled = true; + + if (glc->latch_enabled) + mutex_lock(&glc->latch_mutex); +} + +static void gpio_latch_unlock(struct gpio_latch_chip *glc, bool disable) +{ + if (glc->latch_enabled) + mutex_unlock(&glc->latch_mutex); + + if (disable) + glc->latch_enabled = true; + + mutex_unlock(&glc->mutex); +} + +static int +gpio_latch_get(struct gpio_chip *gc, unsigned offset) +{ + struct gpio_latch_chip *glc = to_gpio_latch_chip(gc); + int ret; + + gpio_latch_lock(glc, false); + ret = gpiod_get_value(glc->gpios[offset]); + gpio_latch_unlock(glc, false); + + return ret; +} + +static void +gpio_latch_set(struct gpio_chip *gc, unsigned offset, int value) +{ + struct gpio_latch_chip *glc = to_gpio_latch_chip(gc); + bool enable_latch = false; + bool disable_latch = false; + + if (offset == glc->le_gpio) { + enable_latch = value ^ glc->le_active_low; + disable_latch = !enable_latch; + } + + gpio_latch_lock(glc, enable_latch); + gpiod_set_raw_value(glc->gpios[offset], value); + gpio_latch_unlock(glc, disable_latch); +} + +static int +gpio_latch_direction_output(struct gpio_chip *gc, unsigned offset, int value) +{ + struct gpio_latch_chip *glc = to_gpio_latch_chip(gc); + bool enable_latch = false; + bool disable_latch = false; + int ret; + + if (offset == glc->le_gpio) { + enable_latch = value ^ glc->le_active_low; + disable_latch = !enable_latch; + } + + gpio_latch_lock(glc, enable_latch); + ret = gpiod_direction_output_raw(glc->gpios[offset], value); + gpio_latch_unlock(glc, disable_latch); + + return ret; +} + +static int gpio_latch_probe(struct platform_device *pdev) +{ + struct gpio_latch_chip *glc; + struct gpio_chip *gc; + struct device *dev = &pdev->dev; + struct device_node *of_node = dev->of_node; + int i, n; + + glc = devm_kzalloc(dev, sizeof(*glc), GFP_KERNEL); + if (!glc) + return -ENOMEM; + + mutex_init(&glc->mutex); + mutex_init(&glc->latch_mutex); + + n = gpiod_count(dev, NULL); + if (n <= 0) { + dev_err(dev, "failed to get gpios: %d\n", n); + return n; + } else if (n != GPIO_LATCH_LINES) { + dev_err(dev, "expected %d gpios\n", GPIO_LATCH_LINES); + return -EINVAL; + } + + for (i = 0; i < n; i++) { + glc->gpios[i] = devm_gpiod_get_index_optional(dev, NULL, i, + GPIOD_OUT_LOW); + if (IS_ERR(glc->gpios[i])) { + dev_err(dev, "failed to get gpio %d: %d\n", i, + PTR_ERR(glc->gpios[i])); + return PTR_ERR(glc->gpios[i]); + } + } + + glc->le_gpio = 8; + glc->le_active_low = gpiod_is_active_low(glc->gpios[glc->le_gpio]); + + if (!glc->gpios[glc->le_gpio]) { + dev_err(dev, "missing required latch-enable gpio %d\n", + glc->le_gpio); + return -EINVAL; + } + + gc = &glc->gc; + gc->label = GPIO_LATCH_DRIVER_NAME; + gc->can_sleep = true; + gc->base = -1; + gc->ngpio = GPIO_LATCH_LINES; + gc->get = gpio_latch_get; + gc->set = gpio_latch_set; + gc->direction_output = gpio_latch_direction_output; + gc->of_node = of_node; + + platform_set_drvdata(pdev, glc); + + i = gpiochip_add(&glc->gc); + if (i) { + dev_err(dev, "gpiochip_add() failed: %d\n", i); + return i; + } + + return 0; +} + +static int gpio_latch_remove(struct platform_device *pdev) +{ + struct gpio_latch_chip *glc = platform_get_drvdata(pdev); + + gpiochip_remove(&glc->gc); + return 0; +} + +static const struct of_device_id gpio_latch_match[] = { + { .compatible = GPIO_LATCH_DRIVER_NAME }, + {}, +}; + +MODULE_DEVICE_TABLE(of, gpio_latch_match); + +static struct platform_driver gpio_latch_driver = { + .probe = gpio_latch_probe, + .remove = gpio_latch_remove, + .driver = { + .name = GPIO_LATCH_DRIVER_NAME, + .owner = THIS_MODULE, + .of_match_table = gpio_latch_match, + }, +}; + +module_platform_driver(gpio_latch_driver); + +MODULE_DESCRIPTION("GPIO latch driver"); +MODULE_AUTHOR("Gabor Juhos "); +MODULE_AUTHOR("Denis Kalashnikov "); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:" GPIO_LATCH_DRIVER_NAME); diff --git a/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch b/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch new file mode 100644 index 0000000000..9315a34182 --- /dev/null +++ b/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch @@ -0,0 +1,26 @@ +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -341,6 +341,13 @@ config GPIO_IXP4XX + IXP4xx series of chips. + + If unsure, say N. ++ ++config GPIO_LATCH ++ tristate "MikroTik RouterBOARD GPIO latch support" ++ depends on ATH79 ++ help ++ GPIO driver for latch on some MikroTik RouterBOARDs. ++ + config GPIO_LOGICVC + tristate "Xylon LogiCVC GPIO support" + depends on MFD_SYSCON && OF +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -72,6 +72,7 @@ obj-$(CONFIG_GPIO_IT87) += gpio-it87.o + obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4xx.o + obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o + obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o ++obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o + obj-$(CONFIG_GPIO_LOGICVC) += gpio-logicvc.o + obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o + obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o diff --git a/target/linux/ath79/patches-5.4/939-mikrotik-rb91x.patch b/target/linux/ath79/patches-5.4/939-mikrotik-rb91x.patch new file mode 100644 index 0000000000..baeaab4611 --- /dev/null +++ b/target/linux/ath79/patches-5.4/939-mikrotik-rb91x.patch @@ -0,0 +1,23 @@ +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -130,6 +130,10 @@ config GPIO_ATH79 + Select this option to enable GPIO driver for + Atheros AR71XX/AR724X/AR913X SoC devices. + ++config GPIO_LATCH ++ tristate "MikroTik RouterBOARD GPIO latch support" ++ depends on ATH79 ++ + config GPIO_RASPBERRYPI_EXP + tristate "Raspberry Pi 3 GPIO Expander" + default RASPBERRYPI_FIRMWARE +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -67,6 +67,7 @@ obj-$(CONFIG_GPIO_IT87) += gpio-it87.o + obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4xx.o + obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o + obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o ++obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o + obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o + obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o + obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o From patchwork Thu May 27 08:16:45 2021 Content-Type: text/plain; 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Thu, 27 May 2021 01:18:29 -0700 (PDT) From: Denis Kalashnikov X-Google-Original-From: Denis Kalashnikov To: openwrt-devel@lists.openwrt.org Cc: Denis Kalashnikov , Gabor Juhos , Koen Vandeputte , Sergey Ryazanov Subject: [PATCH 2/3] ath79: add NAND driver for MikroTik RB91xG series Date: Thu, 27 May 2021 11:16:45 +0300 Message-Id: <20210527081646.4813-3-user@home.lan> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210527081646.4813-1-user@home.lan> References: <20210527081646.4813-1-user@home.lan> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210527_011832_176216_30E3791E X-CRM114-Status: GOOD ( 29.60 ) X-Spam-Score: 0.1 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Denis Kalashnikov Main part is copied from ar71xx original driver rb91x_nand written by Gabor Juhos . What is done: * Support of kernel 5.4 and 5.10, * DTS support, * New gpio API (gpiod_*) support. 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What is done: * Support of kernel 5.4 and 5.10, * DTS support, * New gpio API (gpiod_*) support. Signed-off-by: Denis Kalashnikov Reviewed-by: Sergey Ryazanov --- Changelog: RFC v1 --> RFC v2 - Do not use MFD driver API anymore, - Change DTS node params, - Use the new gpio API (gpiod_*), - Add kernel 5.10 support. RFC v2 --> v1 - Get partitions info from DTS, - Change DTS node params: use a gpios array instead of separate named gpios params, - Minor cosmetic code fixes. --- .../files/drivers/mtd/nand/raw/rb91x_nand.c | 375 ++++++++++++++++++ target/linux/ath79/mikrotik/config-default | 1 + .../patches-5.10/939-mikrotik-rb91x.patch | 23 ++ .../patches-5.4/939-mikrotik-rb91x.patch | 21 + 4 files changed, 420 insertions(+) create mode 100644 target/linux/ath79/files/drivers/mtd/nand/raw/rb91x_nand.c diff --git a/target/linux/ath79/files/drivers/mtd/nand/raw/rb91x_nand.c b/target/linux/ath79/files/drivers/mtd/nand/raw/rb91x_nand.c new file mode 100644 index 0000000000..e231944519 --- /dev/null +++ b/target/linux/ath79/files/drivers/mtd/nand/raw/rb91x_nand.c @@ -0,0 +1,375 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * MikroTik RB91x NAND flash driver + * + * Main part is copied from original driver written by Gabor Juhos. + * + * Copyright (C) 2013-2014 Gabor Juhos + */ + +/* + * WARNING: to speed up NAND reading/writing we are working with SoC GPIO + * controller registers directly -- not through standard GPIO API. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +/* Bit masks for NAND data lines in ath79 gpio 32-bit register */ +#define RB91X_NAND_NRW_BIT BIT(12) +#define RB91X_NAND_DATA_BITS (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) \ + | BIT(13) | BIT(14) | BIT(15)) +#define RB91X_NAND_LOW_DATA_MASK 0x1f +#define RB91X_NAND_HIGH_DATA_MASK 0xe0 +#define RB91X_NAND_HIGH_DATA_SHIFT 8 + +enum rb91x_nand_gpios { + RB91X_NAND_READ,/* Read */ + RB91X_NAND_RDY, /* NAND Ready */ + RB91X_NAND_NCE, /* Chip Enable. Active low */ + RB91X_NAND_CLE, /* Command Latch Enable */ + RB91X_NAND_ALE, /* Address Latch Enable */ + RB91X_NAND_NRW, /* Read/Write. Active low */ + RB91X_NAND_NLE, /* Latch Enable. Active low */ + + RB91X_NAND_GPIOS, +}; + +struct rb91x_nand_drvdata { + struct nand_chip chip; + struct device *dev; + struct gpio_desc **gpio; + void __iomem *ath79_gpio_base; +}; + +static inline void rb91x_nand_latch_lock(struct rb91x_nand_drvdata *drvdata, + int lock) +{ + gpiod_set_value_cansleep(drvdata->gpio[RB91X_NAND_NLE], lock); +} + +static int rb91x_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 8; + oobregion->length = 3; + return 0; + case 1: + oobregion->offset = 13; + oobregion->length = 3; + return 0; + default: + return -ERANGE; + } +} + +static int rb91x_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + switch (section) { + case 0: + oobregion->offset = 0; + oobregion->length = 4; + return 0; + case 1: + oobregion->offset = 4; + oobregion->length = 1; + return 0; + case 2: + oobregion->offset = 6; + oobregion->length = 2; + return 0; + case 3: + oobregion->offset = 11; + oobregion->length = 2; + return 0; + default: + return -ERANGE; + } +} + +static const struct mtd_ooblayout_ops rb91x_nand_ecclayout_ops = { + .ecc = rb91x_ooblayout_ecc, + .free = rb91x_ooblayout_free, +}; + +static void rb91x_nand_write(struct rb91x_nand_drvdata *drvdata, + const u8 *buf, + unsigned len) +{ + void __iomem *base = drvdata->ath79_gpio_base; + u32 oe_reg; + u32 out_reg; + u32 out; + unsigned i; + + rb91x_nand_latch_lock(drvdata, 1); + + oe_reg = __raw_readl(base + AR71XX_GPIO_REG_OE); + out_reg = __raw_readl(base + AR71XX_GPIO_REG_OUT); + + /* Set data lines to output mode */ + __raw_writel(oe_reg & ~(RB91X_NAND_DATA_BITS | RB91X_NAND_NRW_BIT), + base + AR71XX_GPIO_REG_OE); + + out = out_reg & ~(RB91X_NAND_DATA_BITS | RB91X_NAND_NRW_BIT); + for (i = 0; i != len; i++) { + u32 data; + + data = (buf[i] & RB91X_NAND_HIGH_DATA_MASK) << + RB91X_NAND_HIGH_DATA_SHIFT; + data |= buf[i] & RB91X_NAND_LOW_DATA_MASK; + data |= out; + __raw_writel(data, base + AR71XX_GPIO_REG_OUT); + + /* Deactivate WE line */ + data |= RB91X_NAND_NRW_BIT; + __raw_writel(data, base + AR71XX_GPIO_REG_OUT); + /* Flush write */ + __raw_readl(base + AR71XX_GPIO_REG_OUT); + } + + /* Restore registers */ + __raw_writel(out_reg, base + AR71XX_GPIO_REG_OUT); + __raw_writel(oe_reg, base + AR71XX_GPIO_REG_OE); + /* Flush write */ + __raw_readl(base + AR71XX_GPIO_REG_OUT); + + rb91x_nand_latch_lock(drvdata, 0); +} + +static void rb91x_nand_read(struct rb91x_nand_drvdata *drvdata, + u8 *read_buf, + unsigned len) +{ + void __iomem *base = drvdata->ath79_gpio_base; + u32 oe_reg; + u32 out_reg; + unsigned i; + + /* Enable read mode */ + gpiod_set_value_cansleep(drvdata->gpio[RB91X_NAND_READ], 1); + + rb91x_nand_latch_lock(drvdata, 1); + + /* Save registers */ + oe_reg = __raw_readl(base + AR71XX_GPIO_REG_OE); + out_reg = __raw_readl(base + AR71XX_GPIO_REG_OUT); + + /* Set data lines to input mode */ + __raw_writel(oe_reg | RB91X_NAND_DATA_BITS, + base + AR71XX_GPIO_REG_OE); + + for (i = 0; i < len; i++) { + u32 in; + u8 data; + + /* Activate RE line */ + __raw_writel(RB91X_NAND_NRW_BIT, base + AR71XX_GPIO_REG_CLEAR); + /* Flush write */ + __raw_readl(base + AR71XX_GPIO_REG_CLEAR); + + /* Read input lines */ + in = __raw_readl(base + AR71XX_GPIO_REG_IN); + + /* Deactivate RE line */ + __raw_writel(RB91X_NAND_NRW_BIT, base + AR71XX_GPIO_REG_SET); + + data = (in & RB91X_NAND_LOW_DATA_MASK); + data |= (in >> RB91X_NAND_HIGH_DATA_SHIFT) & + RB91X_NAND_HIGH_DATA_MASK; + + read_buf[i] = data; + } + + /* Restore registers */ + __raw_writel(out_reg, base + AR71XX_GPIO_REG_OUT); + __raw_writel(oe_reg, base + AR71XX_GPIO_REG_OE); + /* Flush write */ + __raw_readl(base + AR71XX_GPIO_REG_OUT); + + rb91x_nand_latch_lock(drvdata, 0); + + /* Disable read mode */ + gpiod_set_value_cansleep(drvdata->gpio[RB91X_NAND_READ], 0); +} + +static int rb91x_nand_dev_ready(struct nand_chip *chip) +{ + struct rb91x_nand_drvdata *drvdata = (struct rb91x_nand_drvdata *)(chip->priv); + + return gpiod_get_value_cansleep(drvdata->gpio[RB91X_NAND_RDY]); +} + +static void rb91x_nand_cmd_ctrl(struct nand_chip *chip, int cmd, + unsigned int ctrl) +{ + struct rb91x_nand_drvdata *drvdata = chip->priv; + + if (ctrl & NAND_CTRL_CHANGE) { + gpiod_set_value_cansleep(drvdata->gpio[RB91X_NAND_CLE], + (ctrl & NAND_CLE) ? 1 : 0); + gpiod_set_value_cansleep(drvdata->gpio[RB91X_NAND_ALE], + (ctrl & NAND_ALE) ? 1 : 0); + gpiod_set_value_cansleep(drvdata->gpio[RB91X_NAND_NCE], + (ctrl & NAND_NCE) ? 1 : 0); + } + + if (cmd != NAND_CMD_NONE) { + u8 t = cmd; + + rb91x_nand_write(drvdata, &t, 1); + } +} + +static u8 rb91x_nand_read_byte(struct nand_chip *chip) +{ + u8 data = 0xff; + + rb91x_nand_read(chip->priv, &data, 1); + + return data; +} + +static void rb91x_nand_read_buf(struct nand_chip *chip, u8 *buf, int len) +{ + rb91x_nand_read(chip->priv, buf, len); +} + +static void rb91x_nand_write_buf(struct nand_chip *chip, const u8 *buf, int len) +{ + rb91x_nand_write(chip->priv, buf, len); +} + +static void rb91x_nand_release(struct rb91x_nand_drvdata *drvdata) +{ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0) + mtd_device_unregister(nand_to_mtd(&drvdata->chip)); + nand_cleanup(&drvdata->chip); +#else + nand_release(&drvdata->chip); +#endif +} + +static int rb91x_nand_probe(struct platform_device *pdev) +{ + struct rb91x_nand_drvdata *drvdata; + struct mtd_info *mtd; + int r; + struct device *dev = &pdev->dev; + struct gpio_descs *gpios; + + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + platform_set_drvdata(pdev, drvdata); + + gpios = gpiod_get_array(dev, NULL, GPIOD_OUT_LOW); + if (IS_ERR(gpios)) { + dev_err(dev, "failed to get gpios: %d\n", (int)gpios); + return -EINVAL; + } + + if (gpios->ndescs != RB91X_NAND_GPIOS) { + dev_err(dev, "expected %d gpios\n", RB91X_NAND_GPIOS); + return -EINVAL; + } + + drvdata->gpio = gpios->desc; + + gpiod_direction_input(drvdata->gpio[RB91X_NAND_RDY]); + + drvdata->ath79_gpio_base = ioremap(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE); + + drvdata->dev = dev; + + drvdata->chip.priv = drvdata; + + drvdata->chip.legacy.cmd_ctrl = rb91x_nand_cmd_ctrl; + drvdata->chip.legacy.dev_ready = rb91x_nand_dev_ready; + drvdata->chip.legacy.read_byte = rb91x_nand_read_byte; + drvdata->chip.legacy.write_buf = rb91x_nand_write_buf; + drvdata->chip.legacy.read_buf = rb91x_nand_read_buf; + + drvdata->chip.legacy.chip_delay = 25; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,9,0) + drvdata->chip.ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT; + drvdata->chip.ecc.algo = NAND_ECC_ALGO_HAMMING; +#else + drvdata->chip.ecc.mode = NAND_ECC_SOFT; + drvdata->chip.ecc.algo = NAND_ECC_HAMMING; +#endif + drvdata->chip.options = NAND_NO_SUBPAGE_WRITE; + + r = nand_scan(&drvdata->chip, 1); + if (r) { + dev_err(dev, "nand_scan() failed: %d\n", r); + return r; + } + + mtd = nand_to_mtd(&drvdata->chip); + mtd->dev.parent = dev; + mtd_set_of_node(mtd, dev->of_node); + mtd->owner = THIS_MODULE; + if (mtd->writesize == 512) + mtd_set_ooblayout(mtd, &rb91x_nand_ecclayout_ops); + + r = mtd_device_register(mtd, NULL, 0); + if (r) { + dev_err(dev, "mtd_device_register() failed: %d\n", + r); + goto err_release_nand; + } + + return 0; + +err_release_nand: + rb91x_nand_release(drvdata); + return r; +} + +static int rb91x_nand_remove(struct platform_device *pdev) +{ + struct rb91x_nand_drvdata *drvdata = platform_get_drvdata(pdev); + + rb91x_nand_release(drvdata); + + return 0; +} + +static const struct of_device_id rb91x_nand_match[] = { + { .compatible = "mikrotik,rb91x-nand" }, + {}, +}; + +MODULE_DEVICE_TABLE(of, rb91x_nand_match); + +static struct platform_driver rb91x_nand_driver = { + .probe = rb91x_nand_probe, + .remove = rb91x_nand_remove, + .driver = { + .name = "rb91x-nand", + .owner = THIS_MODULE, + .of_match_table = rb91x_nand_match, + }, +}; + +module_platform_driver(rb91x_nand_driver); + +MODULE_DESCRIPTION("MikrotTik RB91x NAND flash driver"); +MODULE_VERSION(DRV_VERSION); +MODULE_AUTHOR("Gabor Juhos "); +MODULE_AUTHOR("Denis Kalashnikov "); +MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ath79/mikrotik/config-default b/target/linux/ath79/mikrotik/config-default index 1e637bdfd3..efea74a239 100644 --- a/target/linux/ath79/mikrotik/config-default +++ b/target/linux/ath79/mikrotik/config-default @@ -15,6 +15,7 @@ CONFIG_MTD_NAND_AR934X=y CONFIG_MTD_NAND_CORE=y CONFIG_MTD_NAND_ECC=y CONFIG_MTD_NAND_RB4XX=y +CONFIG_MTD_NAND_RB91X=y CONFIG_MTD_RAW_NAND=y CONFIG_MTD_ROUTERBOOT_PARTS=y CONFIG_MTD_SPI_NAND=y diff --git a/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch b/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch index 9315a34182..b2c5bf4bfc 100644 --- a/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch +++ b/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch @@ -24,3 +24,26 @@ obj-$(CONFIG_GPIO_LOGICVC) += gpio-logicvc.o obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o +--- a/drivers/mtd/nand/raw/Kconfig ++++ b/drivers/mtd/nand/raw/Kconfig +@@ -571,4 +571,10 @@ config MTD_NAND_RB4XX + Enables support for the NAND flash chip on Mikrotik Routerboard + RB4xx series. + ++config MTD_NAND_RB91X ++ tristate "MikroTik RB91x NAND driver support" ++ depends on ATH79 && MTD_RAW_NAND ++ help ++ Enables support for the NAND flash chip on MikroTik RB91x series. ++ + endif # MTD_RAW_NAND +--- a/drivers/mtd/nand/raw/Makefile ++++ b/drivers/mtd/nand/raw/Makefile +@@ -60,6 +60,7 @@ obj-$(CONFIG_MTD_NAND_CADENCE) += caden + obj-$(CONFIG_MTD_NAND_ARASAN) += arasan-nand-controller.o + obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o + obj-$(CONFIG_MTD_NAND_RB4XX) += nand_rb4xx.o ++obj-$(CONFIG_MTD_NAND_RB91X) += rb91x_nand.o + + nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o + nand-objs += nand_onfi.o diff --git a/target/linux/ath79/patches-5.4/939-mikrotik-rb91x.patch b/target/linux/ath79/patches-5.4/939-mikrotik-rb91x.patch index baeaab4611..6d84443945 100644 --- a/target/linux/ath79/patches-5.4/939-mikrotik-rb91x.patch +++ b/target/linux/ath79/patches-5.4/939-mikrotik-rb91x.patch @@ -1,3 +1,24 @@ +--- a/drivers/mtd/nand/raw/Kconfig ++++ b/drivers/mtd/nand/raw/Kconfig +@@ -559,4 +559,8 @@ config MTD_NAND_RB4XX + Enables support for the NAND flash chip on Mikrotik Routerboard + RB4xx series. + ++config MTD_NAND_RB91X ++ tristate "MikroTik RB91x NAND driver support" ++ depends on ATH79 && MTD_RAW_NAND ++ + endif # MTD_RAW_NAND +--- a/drivers/mtd/nand/raw/Makefile ++++ b/drivers/mtd/nand/raw/Makefile +@@ -59,6 +59,7 @@ obj-$(CONFIG_MTD_NAND_STM32_FMC2) += stm + obj-$(CONFIG_MTD_NAND_MESON) += meson_nand.o + obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o + obj-$(CONFIG_MTD_NAND_RB4XX) += nand_rb4xx.o ++obj-$(CONFIG_MTD_NAND_RB91X) += rb91x_nand.o + + nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o + nand-objs += nand_onfi.o --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -130,6 +130,10 @@ config GPIO_ATH79 From patchwork Thu May 27 08:16:46 2021 Content-Type: text/plain; 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Thu, 27 May 2021 01:18:33 -0700 (PDT) From: Denis Kalashnikov X-Google-Original-From: Denis Kalashnikov To: openwrt-devel@lists.openwrt.org Cc: Denis Kalashnikov , Gabor Juhos , Koen Vandeputte , Sergey Ryazanov Subject: [PATCH 3/3] ath79: add support for MikroTik RouterBOARD 912UAG-2HPnD Date: Thu, 27 May 2021 11:16:46 +0300 Message-Id: <20210527081646.4813-4-user@home.lan> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210527081646.4813-1-user@home.lan> References: <20210527081646.4813-1-user@home.lan> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210527_011836_091840_78CB6AC3 X-CRM114-Status: GOOD ( 20.21 ) X-Spam-Score: 0.1 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Denis Kalashnikov This board has been supported in the ar71xx. Links: * https://mikrotik.com/product/RB912UAG-2HPnD * https://openwrt.org/toh/hwdata/mikrotik/mikrotik_rb912uag-2hpnd Content analysis details: (0.1 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:22c listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [denis281089[at]gmail.com] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [denis281089[at]gmail.com] -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org From: Denis Kalashnikov This board has been supported in the ar71xx. Links: * https://mikrotik.com/product/RB912UAG-2HPnD * https://openwrt.org/toh/hwdata/mikrotik/mikrotik_rb912uag-2hpnd Hardware: * SoC: Atheros AR9342, * RAM: DDR 64MB, * SPI NOR: 64KB, * NAND: 128MB, * Ethernet: x1 10/100/1000 port with passive POE in, * Wi-Fi: 802.11 b/g/n, * PCIe, * USB: 2.0 EHCI controller, connected to mPCIe slot and a Type-A port -- both can be used for LTE modem. But only one can be used. * LEDs: 5 general purpose LEDs (led1..led5), power LED, user LED, Ethernet phy LED, * Button, * Beeper. Not working: * Button: it shares gpio line 15 with NAND ALE and NAND IO7, and current drivers doesn't easily support this configuration, * Beeper: it is connected to bit 5 of a serial shift register (tested with sysfs led trigger timer). But kmod-gpio-beeper doesn't work -- we left this as is for now. Flashing: * Use the RouterBOARD Reset button to enable TFTP netboot, boot kernel and initramfs and then perform sysupgrade. * From ar71xx OpenWrt firmware run: $ sysupgrade -F /tmp/ For more info see: https://openwrt.org/toh/mikrotik/common. Co-Developed-by: Koen Vandeputte Signed-off-by: Denis Kalashnikov Reviewed-by: Sergey Ryazanov --- Changelog: RFC v1 --> RFC v2 - Delete uneeded comments from DTS, - Delete ascii-art of board scheme near NAND latch from DTS, - Rewrite gpio_latch and nand_gpio nodes to be consistent with the new versions of drivers, - Fix SPI NOR flash and SPI serial shift register maximum speeds (thanks to Koen Vandeputte), - Add UART, PCIe, USB support and gpio exports (thanks to Koen Vandeputte), - Fix Ethernet node (thanks to Koen Vandeputte), - Add key and beeper nodes in disabled state just to be documented. RFC v2 --> v1 - Add led aliases -- now OpenWrt controls power led, - Remove disabled nodes (reset key and gpio-beeper), - Fix gpio-export node, - Fix model name, - Move gpio_nand and gpio_latch nodes from ahb node to the root node. --- ...9342_mikrotik_routerboard-912uag-2hpnd.dts | 214 ++++++++++++++++++ target/linux/ath79/image/mikrotik.mk | 9 + .../base-files/etc/board.d/02_network | 2 + .../etc/hotplug.d/firmware/10-ath9k-eeprom | 1 + .../base-files/lib/upgrade/platform.sh | 1 + 5 files changed, 227 insertions(+) create mode 100644 target/linux/ath79/dts/ar9342_mikrotik_routerboard-912uag-2hpnd.dts diff --git a/target/linux/ath79/dts/ar9342_mikrotik_routerboard-912uag-2hpnd.dts b/target/linux/ath79/dts/ar9342_mikrotik_routerboard-912uag-2hpnd.dts new file mode 100644 index 0000000000..ffca700e0a --- /dev/null +++ b/target/linux/ath79/dts/ar9342_mikrotik_routerboard-912uag-2hpnd.dts @@ -0,0 +1,214 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "ar9344.dtsi" + +#include +#include + +/ { + compatible = "mikrotik,routerboard-912uag-2hpnd", "qca,ar9342"; + model = "MikroTik RouterBOARD 912UAG-2HPnD"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + gpio_latch: gpio_latch { + compatible = "gpio-latch"; + gpio-controller; + #gpio-cells = <2>; + gpios = <&gpio 0 GPIO_ACTIVE_HIGH>, + <&gpio 1 GPIO_ACTIVE_HIGH>, + <&gpio 2 GPIO_ACTIVE_HIGH>, + <&gpio 3 GPIO_ACTIVE_HIGH>, + <0>, /* Not connected */ + <&gpio 13 GPIO_ACTIVE_HIGH>, + <&gpio 14 GPIO_ACTIVE_HIGH>, + <&gpio 15 GPIO_ACTIVE_HIGH>, + <&gpio 11 GPIO_ACTIVE_LOW>; /* Latch Enable */ + }; + + nand_gpio { + compatible = "mikrotik,rb91x-nand"; + + gpios = <&gpio_latch 3 GPIO_ACTIVE_HIGH>, /* Read */ + <&gpio 4 GPIO_ACTIVE_HIGH>, /* Ready (RDY) */ + <&gpio_latch 5 GPIO_ACTIVE_LOW>, /* Chip Enable (nCE) */ + <&gpio_latch 6 GPIO_ACTIVE_HIGH>, /* Command Latch Enable (CLE) */ + <&gpio_latch 7 GPIO_ACTIVE_HIGH>, /* Address Latch Enable (ALE) */ + <&gpio 12 GPIO_ACTIVE_LOW>, /* Read/Write Enable (nRW) */ + <&gpio_latch 8 GPIO_ACTIVE_LOW>; /* Latch Enable (nLE) */ + + partitions { + compatible = "fixed-partitions"; + #size-cells = <1>; + + partition@0 { + label = "booter"; + reg = <0x0 0x0040000>; + read-only; + }; + + partition@40000 { + label = "kernel"; + reg = <0x0040000 0x03c0000>; + }; + + partition@400000 { + label = "ubi"; + reg = <0x0400000 0x7c00000>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power: power { + label = "green:power"; + gpios = <&gpio_latch 1 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + user { + label = "green:user"; + gpios = <&gpio_latch 2 GPIO_ACTIVE_HIGH>; + }; + + led1 { + label = "green:led1"; + gpios = <&ssr 0 GPIO_ACTIVE_HIGH>; + }; + + led2 { + label = "green:led2"; + gpios = <&ssr 1 GPIO_ACTIVE_HIGH>; + }; + + led3 { + label = "green:led3"; + gpios = <&ssr 2 GPIO_ACTIVE_HIGH>; + }; + + led4 { + label = "green:led4"; + gpios = <&ssr 3 GPIO_ACTIVE_HIGH>; + }; + + led5 { + label = "green:led5"; + gpios = <&ssr 4 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio-export { + compatible = "gpio-export"; + + usb_power { + label = "power:usb"; + gpio-export,name = "power-usb"; + gpio-export,output = <1>; + gpios = <&ssr 6 GPIO_ACTIVE_HIGH>; + }; + + pcie_power { + label = "power:pcie"; + gpio-export,name = "power-pcie"; + gpio-export,output = <0>; + gpios = <&ssr 7 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&spi { + status = "okay"; + + compatible = "qca,ar7100-spi"; + + cs-gpios = <0>, <&gpio_latch 0 GPIO_ACTIVE_LOW>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <80000000>; + + partitions { + compatible = "mikrotik,routerboot-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "routerboot"; + reg = <0x0 0x0>; + read-only; + }; + + hard_config: hard_config { + read-only; + }; + + bios { + size = <0x1000>; + read-only; + }; + + soft_config { + }; + }; + }; + + ssr: ssr@1 { + compatible = "fairchild,74hc595"; + gpio-controller; + #gpio-cells = <2>; + registers-number = <1>; + reg = <1>; + spi-max-frequency = <50000000>; + }; +}; + +&mdio0 { + status = "okay"; + + phy-mask = <0>; + + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +ð0 { + status = "okay"; + + phy-mode = "rgmii-id"; + phy-handle = <&phy0>; + pll-data = <0x02000000 0x00000101 0x00001313>; + + gmac-config { + device = <&gmac>; + rgmii-gmac0 = <1>; + rgmii-enabled = <1>; + rxd-delay = <1>; + txd-delay = <1>; + }; +}; + +&wmac { + status = "okay"; + qca,no-eeprom; +}; + +&pcie { + status = "okay"; +}; + +&usb { + status = "okay"; +}; + +&usb_phy { + status = "okay"; +}; diff --git a/target/linux/ath79/image/mikrotik.mk b/target/linux/ath79/image/mikrotik.mk index 74f8603b5a..96a94793a9 100644 --- a/target/linux/ath79/image/mikrotik.mk +++ b/target/linux/ath79/image/mikrotik.mk @@ -9,6 +9,15 @@ define Device/mikrotik_routerboard-493g endef TARGET_DEVICES += mikrotik_routerboard-493g +define Device/mikrotik_routerboard-912uag-2hpnd + $(Device/mikrotik_nand) + SOC := ar9342 + DEVICE_MODEL := RouterBOARD 912UAG-2HPnD + DEVICE_PACKAGES += kmod-usb-ehci kmod-usb2 kmod-gpio-beeper + SUPPORTED_DEVICES += rb-912uag-2hpnd +endef +TARGET_DEVICES += mikrotik_routerboard-912uag-2hpnd + define Device/mikrotik_routerboard-921gs-5hpacd-15s $(Device/mikrotik_nand) SOC := qca9558 diff --git a/target/linux/ath79/mikrotik/base-files/etc/board.d/02_network b/target/linux/ath79/mikrotik/base-files/etc/board.d/02_network index 4ffe82588c..d4a32c1e1a 100644 --- a/target/linux/ath79/mikrotik/base-files/etc/board.d/02_network +++ b/target/linux/ath79/mikrotik/base-files/etc/board.d/02_network @@ -14,6 +14,7 @@ ath79_setup_interfaces() ucidef_add_switch "switch1" \ "0@eth1" "1:lan:4" "2:lan:1" "3:lan:2" "4:lan:3" ;; + mikrotik,routerboard-912uag-2hpnd|\ mikrotik,routerboard-921gs-5hpacd-15s|\ mikrotik,routerboard-lhg-2nd|\ mikrotik,routerboard-sxt-5nd-r2|\ @@ -36,6 +37,7 @@ ath79_setup_macs() local mac_base="$(cat /sys/firmware/mikrotik/hard_config/mac_base)" case "$board" in + mikrotik,routerboard-912uag-2hpnd|\ mikrotik,routerboard-921gs-5hpacd-15s|\ mikrotik,routerboard-lhg-2nd|\ mikrotik,routerboard-sxt-5nd-r2|\ diff --git a/target/linux/ath79/mikrotik/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom b/target/linux/ath79/mikrotik/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom index 7ef6fdbe0f..ae0c94d8ec 100644 --- a/target/linux/ath79/mikrotik/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom +++ b/target/linux/ath79/mikrotik/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom @@ -23,6 +23,7 @@ board=$(board_name) case "$FIRMWARE" in "ath9k-eeprom-ahb-18100000.wmac.bin") case $board in + mikrotik,routerboard-912uag-2hpnd|\ mikrotik,routerboard-lhg-2nd|\ mikrotik,routerboard-sxt-5nd-r2|\ mikrotik,routerboard-wapr-2nd) diff --git a/target/linux/ath79/mikrotik/base-files/lib/upgrade/platform.sh b/target/linux/ath79/mikrotik/base-files/lib/upgrade/platform.sh index 97d388168f..6962c6fdcc 100644 --- a/target/linux/ath79/mikrotik/base-files/lib/upgrade/platform.sh +++ b/target/linux/ath79/mikrotik/base-files/lib/upgrade/platform.sh @@ -32,6 +32,7 @@ platform_do_upgrade() { case "$board" in mikrotik,routerboard-493g|\ + mikrotik,routerboard-912uag-2hpnd|\ mikrotik,routerboard-921gs-5hpacd-15s|\ mikrotik,routerboard-922uags-5hpacd|\ mikrotik,routerboard-sxt-5nd-r2)