From patchwork Sat May 15 18:44:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hans-Peter Nilsson X-Patchwork-Id: 1478931 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=NEB0/S4B; dkim-atps=neutral Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FjDpH3nfDz9sWF for ; Sun, 16 May 2021 04:44:38 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A65403857815; Sat, 15 May 2021 18:44:33 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A65403857815 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1621104273; bh=15BOH+tRP/Js2Uzntoo7dkCi1z2HklySVWdhr/iAwqk=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=NEB0/S4B1B77TZYE7tvl6/HTwVAaRnc+e6wa3OsTAsdxMs4W4dO+P3WS8V/8XS0eK GeOoAiOH6xHLySMnM+Xh6HXbqfmept716EjeeXhGivV0Yt20/H7quryvWooZiVrr44 d/1tRlW7oVID2Fm+R+AG8Q1PLZ8z+nmuQ/UNqtEU= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtp1.axis.com (smtp1.axis.com [195.60.68.17]) by sourceware.org (Postfix) with ESMTPS id B3D9A385803D for ; Sat, 15 May 2021 18:44:30 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org B3D9A385803D To: Subject: doc/tm.texi.in (Condition Code): Tweak post-cc0 wording. MIME-Version: 1.0 Message-ID: <20210515184429.55BC2203BE@pchp3.se.axis.com> Date: Sat, 15 May 2021 20:44:29 +0200 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Hans-Peter Nilsson via Gcc-patches From: Hans-Peter Nilsson Reply-To: Hans-Peter Nilsson Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Ok to commit? When eyeballing the r12-440 / bd1cd0d0e0fe / "Remove CC0" commit, I noticed parts that could be improved. Regarding the first change: at first I thought that just removing the word "better" was the best choice, as the compared part (cc0) was apparently removed, but the paragraph after the one in the patch (still) does speak of "implicit setting" (i.e. cc0-style), but now as hypothetical reasoning. So, just add that to clarify what is not-better. The second change is just that there's no non-modern representation, so the "Modern" qualifier is just confusing. gcc: * doc/tm.texi.in (Condition Code): Tweak post-cc0 wording. * doc/tm.texi: Regenerate. --- gcc/doc/tm.texi | 4 ++-- gcc/doc/tm.texi.in | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in index d8e3de14af1a..9009eaecc4de 100644 --- a/gcc/doc/tm.texi.in +++ b/gcc/doc/tm.texi.in @@ -4269,7 +4269,7 @@ or @code{TARGET_MAX_ANCHOR_OFFSET} is set to a nonzero value. @cindex condition code status Condition codes in GCC are represented as registers, -which provides better schedulability for +which provides better schedulability than implicit clobbering for architectures that do have a condition code register, but on which most instructions do not affect it. The latter category includes most RISC machines. @@ -4300,7 +4300,7 @@ specified already in the compare instruction. In this case, you are not interested in most macros in this section. @menu -* MODE_CC Condition Codes:: Modern representation of condition codes. +* MODE_CC Condition Codes:: Representation of condition codes. @end menu @node MODE_CC Condition Codes