From patchwork Fri May 14 16:26:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Andre Vieira (lists)" X-Patchwork-Id: 1478587 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=L4c4yVKs; dkim-atps=neutral Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FhYnv39JPz9sVt for ; Sat, 15 May 2021 02:26:58 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5A465394FC0B; Fri, 14 May 2021 16:26:40 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5A465394FC0B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1621009600; bh=IcF5nVr+1M7QR0J6V921mss6gRXLCQFOhU+0ut1U07I=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=L4c4yVKsh1hDHu2+tUFezhflmhMkq2PBrdgly5pQUzHhvIaJFnmbcFHF17jt5WG3E G7/ises/5buIX0g4cwUF0nU2v7mZ+UYkDTV+yEN5jtZo90ewp23mHwaP5n+2OivNgg +w2oZiHyZ9ax3Q50IDwwimmun2sqOdqUW+ZofmYo= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 76688393F85D for ; Fri, 14 May 2021 16:26:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 76688393F85D Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EB36B1713; Fri, 14 May 2021 09:26:35 -0700 (PDT) Received: from [10.57.69.199] (unknown [10.57.69.199]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 402143F73B; Fri, 14 May 2021 09:26:35 -0700 (PDT) To: "gcc-patches@gcc.gnu.org" Subject: [PATCH][AArch64]: Use UNSPEC_LD1_SVE for all LD1 loads Message-ID: Date: Fri, 14 May 2021 17:26:33 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.9.1 MIME-Version: 1.0 Content-Language: en-US X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, BODY_8BITS, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_LOTSOFHASH, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "Andre Vieira \(lists\) via Gcc-patches" From: "Andre Vieira (lists)" Reply-To: "Andre Vieira \(lists\)" Cc: Richard Sandiford Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Hi, I noticed we were missing out on LD1 + UXT combinations in some cases and found it was because of inconsistent use of the unspec enum UNSPEC_LD1_SVE. The combine pattern for LD1[S][BHWD] uses UNSPEC_LD1_SVE whereas one of the LD1 expanders was using UNSPEC_PRED_X. I wasn't sure whether to change the UNSPEC_LD1_SVE into UNSPEC_PRED_X as the enum doesn't seem to be used for anything in particular, though I decided against it for now as it is easier to rename UNSPEC_LD1_SVE to UNSPEC_PRED_X if there is no use for it than it is to rename only specific instances of UNSPEC_PRED_X. If there is a firm belief the UNSPEC_LD1_SVE will not be used for anything I am also happy to refactor it out. Bootstrapped and regression tested aarch64-none-linux-gnu. Is this OK for trunk? Kind regards, Andre Vieira gcc/ChangeLog: 2021-05-14  Andre Vieira          * config/aarch64/aarch64-sve.md: Use UNSPEC_LD1_SVE instead of UNSPEC_PRED_X. gcc/testsuite/ChangeLog: 2021-05-14  Andre Vieira          * gcc.target/aarch64/sve/logical_unpacked_and_2.c: Remove superfluous uxtb.         * gcc.target/aarch64/sve/logical_unpacked_and_3.c: Likewise.         * gcc.target/aarch64/sve/logical_unpacked_and_4.c: Likewise.         * gcc.target/aarch64/sve/logical_unpacked_and_6.c: Likewise.         * gcc.target/aarch64/sve/logical_unpacked_and_7.c: Likewise.         * gcc.target/aarch64/sve/logical_unpacked_eor_2.c: Likewise.         * gcc.target/aarch64/sve/logical_unpacked_eor_3.c: Likewise.         * gcc.target/aarch64/sve/logical_unpacked_eor_4.c: Likewise.         * gcc.target/aarch64/sve/logical_unpacked_eor_6.c: Likewise.         * gcc.target/aarch64/sve/logical_unpacked_eor_7.c: Likewise.         * gcc.target/aarch64/sve/logical_unpacked_orr_2.c: Likewise.         * gcc.target/aarch64/sve/logical_unpacked_orr_4.c: Likewise.         * gcc.target/aarch64/sve/logical_unpacked_orr_6.c: Likewise.         * gcc.target/aarch64/sve/logical_unpacked_orr_7.c: Likewise.         * gcc.target/aarch64/sve/ld1_extend.c: New test. diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index 7db2938bb84e04d066a7b07574e5cf344a3a8fb6..5fd74fcf3e0a984b5b40b8128ad9354fb899ce5f 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -747,7 +747,7 @@ (define_insn_and_split "@aarch64_pred_mov" (unspec:SVE_ALL [(match_operand: 1 "register_operand" "Upl, Upl, Upl") (match_operand:SVE_ALL 2 "nonimmediate_operand" "w, m, w")] - UNSPEC_PRED_X))] + UNSPEC_LD1_SVE))] "TARGET_SVE && (register_operand (operands[0], mode) || register_operand (operands[2], mode))" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/ld1_extend.c b/gcc/testsuite/gcc.target/aarch64/sve/ld1_extend.c new file mode 100644 index 0000000000000000000000000000000000000000..7f78cb4b3e4445c4da93b00ae78d6ef6fec1b2de --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/ld1_extend.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 --param vect-partial-vector-usage=1" } */ + +void foo (signed char * __restrict__ a, signed char * __restrict__ b, short * __restrict__ c, int n) +{ + for (int i = 0; i < n; ++i) + c[i] = a[i] + b[i]; +} + +/* { dg-final { scan-assembler-times {\tld1sb\t} 4 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_2.c b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_2.c index 08b274512e1c6ce8f5845084a664b2fa0456dafe..cb6029e90ffc815e75092624f611c4631cbd9fd6 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_2.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_2.c @@ -11,7 +11,6 @@ f (uint64_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2) /* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */ -/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.h,} 1 } } */ /* { dg-final { scan-assembler-times {\tand\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_3.c b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_3.c index c823470ca925ee66929475f74fa8d94bc4735594..02fc5460e5ce89c8a3fef611aac561145ddd0f39 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_3.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_3.c @@ -11,7 +11,6 @@ f (uint64_t *restrict dst, uint32_t *restrict src1, uint8_t *restrict src2) /* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */ -/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.s,} 1 } } */ /* { dg-final { scan-assembler-times {\tand\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_4.c b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_4.c index 52c92911d9b548662d43b23816e4d450a9e67846..8a441300ba59da6f96365bc6ad5482911ed605f8 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_4.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_4.c @@ -11,7 +11,6 @@ f (uint64_t *restrict dst, uint32_t *restrict src1, uint16_t *restrict src2) /* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */ -/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.s,} 1 } } */ /* { dg-final { scan-assembler-times {\tand\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_6.c b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_6.c index 1552ed85302373bb16ad8265f5c84cea71ccbc66..2f657736f37162c1c422b318e6f23242c68fea48 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_6.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_6.c @@ -11,7 +11,6 @@ f (uint64_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2) /* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */ -/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.h,} 1 } } */ /* { dg-final { scan-assembler-times {\tand\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */ /* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_7.c b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_7.c index 484d9daf38f0779109484eab5a2a03a626c16fe8..d67bdb7233e906581517463386fabe293a8d7170 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_7.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_and_7.c @@ -10,7 +10,6 @@ f (uint64_t *restrict dst, uint32_t *restrict src1, uint8_t *restrict src2){ /* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */ -/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.s,} 1 } } */ /* { dg-final { scan-assembler-times {\tand\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */ /* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_2.c b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_2.c index 23ddeb9f9b11f80783e1b173696a15d1d73762a3..594e4117477ffc78665eac617bb7c3452217cacd 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_2.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_2.c @@ -11,7 +11,6 @@ f (uint64_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2) /* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */ -/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.h,} 1 } } */ /* { dg-final { scan-assembler-times {\teor\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_3.c b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_3.c index 4dd1e085646c6d0e6d3d4e02534c94ea592ea7be..1f684feade878fda293e55fca24541d1fa4133ef 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_3.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_3.c @@ -11,7 +11,6 @@ f (uint64_t *restrict dst, uint32_t *restrict src1, uint8_t *restrict src2) /* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */ -/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.s,} 1 } } */ /* { dg-final { scan-assembler-times {\teor\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_4.c b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_4.c index a31a2d425faa11c6faa5306d4c0a7e5a5fa086d8..b051eb28c51a02a5240a81a33cbcbd3d163098b3 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_4.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_4.c @@ -11,7 +11,6 @@ f (uint64_t *restrict dst, uint32_t *restrict src1, uint16_t *restrict src2) /* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */ -/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.s,} 1 } } */ /* { dg-final { scan-assembler-times {\teor\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_6.c b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_6.c index 416567b21f703d6e0ff3792d2089b923ecde0441..cd42405690b39c651ce76416ea3b371f5611cfe6 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_6.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_6.c @@ -11,7 +11,6 @@ f (uint64_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2) /* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */ -/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.h,} 1 } } */ /* { dg-final { scan-assembler-times {\teor\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */ /* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_7.c b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_7.c index 3f7c3ddbba8a986e01fbdbe51b307bdc3990da37..2154ae8f2485fb81cc77286ae8f1293050378173 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_7.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_eor_7.c @@ -10,7 +10,6 @@ f (uint64_t *restrict dst, uint32_t *restrict src1, uint8_t *restrict src2){ /* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */ -/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.s,} 1 } } */ /* { dg-final { scan-assembler-times {\teor\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */ /* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_orr_2.c b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_orr_2.c index 593de65a02cd2a16acb48a6dd05163a4e66b7b27..890b7e64f965678c2fe2e5d0a395520d9189b6dc 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_orr_2.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_orr_2.c @@ -11,7 +11,6 @@ f (uint64_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2) /* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */ -/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.h,} 1 } } */ /* { dg-final { scan-assembler-times {\torr\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_orr_4.c b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_orr_4.c index 561a104a23f00759af457e03e8e175589282aeb5..2b419a65d60abd7b7ef330ea538c02fe2ade8f9a 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_orr_4.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_orr_4.c @@ -11,7 +11,6 @@ f (uint64_t *restrict dst, uint32_t *restrict src1, uint16_t *restrict src2) /* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */ -/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.s,} 1 } } */ /* { dg-final { scan-assembler-times {\torr\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_orr_6.c b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_orr_6.c index 3ce1c3fb1e636c7f8ebcf2a7fbaafe20f3b7cfa0..214a3c7efbb9a776477907e2516d5dd112c77d7d 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_orr_6.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_orr_6.c @@ -11,7 +11,6 @@ f (uint64_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2) /* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */ -/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.h,} 1 } } */ /* { dg-final { scan-assembler-times {\torr\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */ /* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_orr_7.c b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_orr_7.c index e6a429167ea38dbbbc7e653cd6d47ffbe0bc768d..66e24058ae2e657bcb804d23b58d7c722e3e2dd5 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_orr_7.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/logical_unpacked_orr_7.c @@ -10,7 +10,6 @@ f (uint64_t *restrict dst, uint32_t *restrict src1, uint8_t *restrict src2){ /* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */ -/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.s,} 1 } } */ /* { dg-final { scan-assembler-times {\torr\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */ /* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */ /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */