From patchwork Mon May 10 14:17:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1476464 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=B0KW3bly; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Ff37J2MH7z9rx6 for ; Tue, 11 May 2021 00:18:20 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id CE8F082EC1; Mon, 10 May 2021 16:18:05 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="B0KW3bly"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id CB9A682ECE; Mon, 10 May 2021 16:18:02 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id B5DD482B9A for ; Mon, 10 May 2021 16:17:58 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-ej1-x62f.google.com with SMTP id t4so24850870ejo.0 for ; Mon, 10 May 2021 07:17:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7IptY92r7t0o6gG0bbUyilUjHe33ch96psYWyGzFnvw=; b=B0KW3blyd0OpHoNAuGVm0FSJjdcaR6CzACqLbX/UfEMtfYm6NzQ8EC8m8VDlO37FQ8 oaJ26+PVYtPxC0GoEzvpPS2r/E/uFWMNnldDb0OdCexvFV0TgbUkBsQtg7y9haPwQvVP dG0A3Zt502gjOzf/RqobrImaq5cVW1qMBboz2i9DnM7AwFYjcotBCSFi2B569UTrqRBE yTqCqwwU0F4YmMCNmeglJ/TunwjsptRfxdZrFRzDNjDtI5RblrQyC6LXzHgWRTkcRwg4 FjoCfGjZeztSp6DK2LaK/wVxvGSnfVTpeWW96j2GLEgwNae39ZcRkLmWpiCwuy6UEBv+ hbTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=7IptY92r7t0o6gG0bbUyilUjHe33ch96psYWyGzFnvw=; b=Vndb9OFcRC/bXbxSgL29BS2febN/71PBkiTVA+qQWqe6zl/HYjKp+9e6oyI+pd5wHY VvTjLavLyKhD2xxaY/IteKtV/XJQ8kru2RYYTsDRnM+Jejwlw0mQm3kFML/Vaf+Y2nEt O7GPjrC+AJb5efVJSSLhT9QWbBEKzN4YMVnIbesAAikD/pgtYzmJmQLK2slkFthtsIqg +Ejif26H6udNW1JO7yyL/xQVpBmzLpRpwCKfpPrMNh2rvBSwouMqpIWoeQHhDHVpIo/z 5B/efj2LehoSDN6lbnOEhdjeMhXoxSVPwIZrmplK0yVrdTK2L01OmCXpjMEZ/PwffrmO aoOg== X-Gm-Message-State: AOAM533WGUHvExxNHUsjytuN/G5v50p1xJl1eRXC0H60dMxBcGZ5UybO q661mrQqtVVwfMwN0dK6zPOuEdaxGPzOMa9y X-Google-Smtp-Source: ABdhPJz1BCbu/7ii+9JpeJ6y7AZzWebf5pRAiZS6jzU2Zg4sHAwf862kNH8D6yxDKapkUzeCI869qQ== X-Received: by 2002:a17:906:2cce:: with SMTP id r14mr11785996ejr.38.1620656277594; Mon, 10 May 2021 07:17:57 -0700 (PDT) Received: from localhost ([2a02:768:2307:40d6::45a]) by smtp.gmail.com with ESMTPSA id s2sm11578952edu.89.2021.05.10.07.17.56 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 May 2021 07:17:56 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Subject: [PATCH 01/10] arm64: zynqmp: Add missing silabs, skip-recall for si570 ref clk nodes Date: Mon, 10 May 2021 16:17:40 +0200 Message-Id: <93499200b0a3e51f957c685b3bcd7ab63fb115fe.1620656248.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean All si570 which are used for ps reference clock generation should contain silabs,skip-recall property not to cause break on ps clock. On Versal boards this will cause hang on Versal cpu when it is booted at the same time with SC. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 1 + arch/arm/dts/zynqmp-m-a2197-01-revA.dts | 3 ++- arch/arm/dts/zynqmp-m-a2197-02-revA.dts | 3 ++- arch/arm/dts/zynqmp-m-a2197-03-revA.dts | 3 ++- arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 1 + 5 files changed, 8 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index aae3c626f562..135c83f502e8 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -475,6 +475,7 @@ factory-fout = <33333333>; clock-frequency = <33333333>; clock-output-names = "ref_clk"; + silabs,skip-recall; }; /* and connector J212D */ }; diff --git a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts index 19e1ebdb1d6a..213149a3dc83 100644 --- a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts @@ -343,9 +343,10 @@ compatible = "silabs,si570"; reg = <0x5d>; /* FIXME addr */ temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different */ + factory-fout = <33333333>; clock-frequency = <33333333>; clock-output-names = "REF_CLK"; /* FIXME */ + silabs,skip-recall; }; /* Connection via Samtec U20D */ /* Use for storing information about X-PRC card */ diff --git a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts index 46ec427648fa..c458110e5a89 100644 --- a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts @@ -349,9 +349,10 @@ compatible = "silabs,si570"; reg = <0x5d>; /* FIXME addr */ temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different */ + factory-fout = <33333333>; clock-frequency = <33333333>; clock-output-names = "REF_CLK"; /* FIXME */ + silabs,skip-recall; }; /* Connection via Samtec U20D */ /* Use for storing information about X-PRC card */ diff --git a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts index 6eb58e6701ad..cee7ca1fa995 100644 --- a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts @@ -339,9 +339,10 @@ compatible = "silabs,si570"; reg = <0x5d>; /* FIXME addr */ temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different */ + factory-fout = <33333333>; clock-frequency = <33333333>; clock-output-names = "REF_CLK"; /* FIXME */ + silabs,skip-recall; }; /* Connection via Samtec U20D */ /* Use for storing information about X-PRC card */ diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts index 4f7824ae4007..8e1e6b7f903b 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts @@ -390,6 +390,7 @@ factory-fout = <33333333>; clock-frequency = <33333333>; clock-output-names = "ref_clk"; + silabs,skip-recall; }; /* Connection via Samtec J212D */ /* Use for storing information about X-PRC card */ From patchwork Mon May 10 14:17:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1476465 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=fjDOwHTK; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Ff37Y46d0z9rx6 for ; Tue, 11 May 2021 00:18:32 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C3AC582ECC; Mon, 10 May 2021 16:18:07 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="fjDOwHTK"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 9237D824AD; Mon, 10 May 2021 16:18:03 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 237FF824AD for ; Mon, 10 May 2021 16:18:00 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-ed1-x533.google.com with SMTP id c22so18891557edn.7 for ; Mon, 10 May 2021 07:18:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=u3v1L4qpTubrm79P2wPTj+y3XbLBqmSO/d6TvJVUo7g=; b=fjDOwHTKZoq7FUBKp89hzc9kEmv5s8qOwv9oFJzg5JRWdzFXWFfCNJu2/QU4O5IlzO qgpVxbQrXNDKghm6GSjuqBZ8vMma09x46otcj6WYskvs8cXRzR+B5KGls88O0I6jXumE Dpm8fvXXd9oqDMLbk20PyPezXYc7IrAbjFwQPG7QkmzpfVSsA4h9IPAUNoPRHm/OsawP PSrghh1mJR0gcIdAE7DCm8arx9qYRCUBPelQylOxFzGc5X1cQHMK7gL6Toitf4G7tmoP X5+46VW9QH7w+VDn9OyQ4kTBUHy1VPCzfGj5qp9lTn+8n3ssqmAjqWfbeqw/7+Pho79F 3NPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=u3v1L4qpTubrm79P2wPTj+y3XbLBqmSO/d6TvJVUo7g=; b=i9DZPDOo96Fc/1GK3T6HKVh9TSR13Bbs7JMLWhJVdKXFzneWancPV37YNJw4tVM3MC X5/N8/9dtZZ2YWQnEsABsPNOApsO5JyHeBM8HPTKHLTEVxUfjctwagsqGsFtogfM/8oq LAEcAS66y/D36Aw2otHttRd5n199PmjTQB/FtcersnriWA4YHo+exfoUnGqOAz5lu15z LtDmA2UQvKTBRMvW0CzqboN5WvTytj8vGojqgochHdE8fERSWr7oP0yb178N5kX5tO4j IEeZ8X2iG3rcKf0wbf9F+EbP6sz3C6UXXTcEB//Tw+XS3sQSO2PizMUIJh+fw8bIe3gK PXrA== X-Gm-Message-State: AOAM533XFMysUIWCVy3WdTU13jZZme9Re6qLAtGwhTXK5u58ei54MR6Z 7wJHF6IdfbUH2lVut8nbaNjraULXCeR0hro3 X-Google-Smtp-Source: ABdhPJx8H0p0uXdBI1BoVCnH9GWQOIHg4DdNmZZhbLzTjpN65r0f43iUuQjRz6X5anGGqAGRC8eDRQ== X-Received: by 2002:a50:9fa8:: with SMTP id c37mr29965907edf.48.1620656279600; Mon, 10 May 2021 07:17:59 -0700 (PDT) Received: from localhost ([2a02:768:2307:40d6::45a]) by smtp.gmail.com with ESMTPSA id k26sm9247118eje.67.2021.05.10.07.17.58 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 May 2021 07:17:59 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: Saeed Nowshadi Subject: [PATCH 02/10] arm64: zynqmp: Add 'silabs, skip-recall' to DDR DIMM si570 clk node Date: Mon, 10 May 2021 16:17:41 +0200 Message-Id: <306b9a16b1f29b85ad22079529205c6ba5628707.1620656248.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean From: Saeed Nowshadi The 'silabs,skip-recall' property prevents interruption in operation of the clock while the driver is being probed. Without this property, the DDR DIMM clk can cause a failure during Versal's boot. Signed-off-by: Saeed Nowshadi Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index 135c83f502e8..e5d75e552346 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx Versal a2197 RevA System Controller * - * (C) Copyright 2019 - 2020, Xilinx, Inc. + * (C) Copyright 2019 - 2021, Xilinx, Inc. * * Michal Simek */ @@ -505,6 +505,7 @@ factory-fout = <200000000>; clock-frequency = <200000000>; clock-output-names = "si570_ddrdimm1_clk"; + silabs,skip-recall; }; }; i2c@4 { /* LPDDR4_SI570_CLK2 */ From patchwork Mon May 10 14:17:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1476467 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=UCwlUBSm; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Ff37p2JXmz9sWl for ; Tue, 11 May 2021 00:18:45 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 8168D82ED2; Mon, 10 May 2021 16:18:13 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="UCwlUBSm"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id A63EF82EC9; Mon, 10 May 2021 16:18:06 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4E0A382ECC for ; Mon, 10 May 2021 16:18:02 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-ej1-x62f.google.com with SMTP id n2so24769398ejy.7 for ; Mon, 10 May 2021 07:18:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=S+bzlApC9kJ09pjFvpspMZ8sPr6iDvV4/1higprGDn4=; b=UCwlUBSmdC0tu35ohPBJA49tHg/tkjJgpIaTqzT1VWCGH+4ZoQTDMrtdHe66V+8/dL z5smTnzhdjTlTJcDfO6Ohe6W+5ulKCO81jKVmd9hpHhe4dniE/dh61rsnSq9/pMx7bP7 TjcDMGbeaHO1GMy04uvTvEy/ZGXx40uNdRiRO3IMmDXD6toYzpOq6NOiu6TpOMLyuRcI N2LbtnGIeuNzt8RQoxJPbUfLGI0v1bTdnQj7N3GDEoZSXnvT/aKPOknTrjashYCsaLwV EUeCbyXXsVnt5ND9XZAYeniloPZ0BOn7NYai138f64qQHHpBCCJ1muzirLdgFyBjnhuQ ivSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=S+bzlApC9kJ09pjFvpspMZ8sPr6iDvV4/1higprGDn4=; b=pqwtDSSV2VCHNgoprfpoXt5jc5MQnotIvqouIx3z6SFO1HZqho/ADS8X2zAVj5j9ws yHZVMwLlzBBd/v0M3p+qwE+yvTsR0i4BEngzK9L/QgAjFC7BA7QuIkgkLdcTShoSVWz4 BrTNQckxTMoJNgxF+QP+AqvlZ2wTm6CsuCfbCamJ8H9BQlCH+vVdsh2aAMr9B8mMnJKi Xy0K/TDw0i/bW8Ap59WkpSbbdghr8nIGFrK9Z4nUNOp15Q0UyAXXBspdfbrVddHgN0wF Qf6neDKs7PEPo6yu1f5lmBDhLivSkXLtmyS6+RzVn125ys8hS/NGTsTzGooljAPpmrkG NiuQ== X-Gm-Message-State: AOAM532X8WHLz/TQZ/3pDWx3ht/1J+0wHnij7ZloH4gP3Rq5IAGbeZvv 8V25ugWIT1VHZ4AUPLWXOHQTbVm+IlQQMCvG X-Google-Smtp-Source: ABdhPJxmhJPRpQ7EvKNQ49PaHXuDyThnAcym8odbeBhcWtMn0zrIxpJ/fJDneUDr+4voT2VURpfcHg== X-Received: by 2002:a17:906:a18e:: with SMTP id s14mr24181004ejy.311.1620656281440; Mon, 10 May 2021 07:18:01 -0700 (PDT) Received: from localhost ([2a02:768:2307:40d6::45a]) by smtp.gmail.com with ESMTPSA id b12sm11520967eds.23.2021.05.10.07.18.00 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 May 2021 07:18:00 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: Saeed Nowshadi Subject: [PATCH 03/10] arm64: zynqmp: Add label to all GPIO lines for VCK190 SC Date: Mon, 10 May 2021 16:17:42 +0200 Message-Id: <09df6b27a999e2a2e4aadceb4c99108679626322.1620656248.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean From: Saeed Nowshadi Add label to GPIO lines so the user-level applications can find any line without knowing its physical path on System Controller on VCK190/VMK180. These labels are describing EMIO gpio connection which depends on PL which we normally don't describe but that's only way to go for now. Lately this should be done out of this source code. Signed-off-by: Saeed Nowshadi Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index e5d75e552346..ffa3dbb5f71f 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -163,20 +163,20 @@ "", "", "", "", "", /* 70 - 74 */ "", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */ - "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "", "", /* 80 - 84 */ - "", "", "", "", "", /* 85 - 89 */ - "", "", "", "", "", /* 90 - 94 */ - "", "", "", "", "", /* 95 - 99 */ + "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "DC_PRSNT", "", /* 80 - 84 */ + "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "", /* 85 - 89 */ + "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */ + "SYSCTLR_GPIO5", "", "", "", "", /* 95 - 99 */ "", "", "", "", "", /* 100 - 104 */ "", "", "", "", "", /* 105 - 109 */ "", "", "", "", "", /* 110 - 114 */ "", "", "", "", "", /* 115 - 119 */ "", "", "", "", "", /* 120 - 124 */ "", "", "", "", "", /* 125 - 129 */ - "", "", "", "", "", /* 130 - 134 */ + "PMBUS1_INA226_ALERT", "PMBUS2_INA226_ALERT", "", "", "", /* 130 - 134 */ "", "", "", "", "", /* 135 - 139 */ - "", "", "", "", "", /* 140 - 144 */ - "", "", "", "", "", /* 145 - 149 */ + "PMBUS_ALERT", "", "SYSCTLR_ETH_RESET_B", "SYSCTLR_VCC0V85_TG", "MAX6643_OT_B", /* 140 - 144 */ + "MAX6643_FANFINAL_B", "MAX6643_FULLSPD", "", "", "", /* 145 - 149 */ "", "", "", "", "", /* 150 - 154 */ "", "", "", "", "", /* 155 - 159 */ "", "", "", "", "", /* 160 - 164 */ From patchwork Mon May 10 14:17:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1476468 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=V+4Wp3W+; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Ff3855RlYz9rx6 for ; Tue, 11 May 2021 00:18:59 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6D15082EDA; Mon, 10 May 2021 16:18:16 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="V+4Wp3W+"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id EA19382EDA; Mon, 10 May 2021 16:18:06 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id E05D881FF5 for ; Mon, 10 May 2021 16:18:03 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-ej1-x62c.google.com with SMTP id u21so24713864ejo.13 for ; Mon, 10 May 2021 07:18:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ymUTU+0d8+GMoMhni+4wmiaH82OBlO9svbwiH2T51rk=; b=V+4Wp3W+ROXKQlhiPdvtwDqBOds3ohdLWLBrPJIEXoerp203tFQJ+djSNqOOS+LQPE l6BjJYjhRxWHS2ovQTvj/sL3tXUOrD2t6rkwTJC60XAjEVkwWf6NUoVPVauqdJmAN2ME AfYo0bQt+I2+tyKjz8vSwiEsCb8qIAJ/6Op22a7n5L56LOkVrNQHaEh1o8o3XYOJnx/R YLAdShiKqSZ8ktv/N3x2d8eJccCnjYymbIQDHytjyzGDEPKPFdl6ukEbqA8XVrY3AKCV W/Mj022WuatqzeYML1UMnh3/WcuD0cWt3pNEbYf34Y/dQK3NSrYYLWyyjOonPMHunZ5a hn8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=ymUTU+0d8+GMoMhni+4wmiaH82OBlO9svbwiH2T51rk=; b=N/mBw09ecClSCsgTj9kJPrS0jeTZEty6/q5s4uZc8wdO+o0Hr4IhGiyKeAMTdr9YGP R2qy90wgA+zH7RjIVyfqY+j8xi9PNAsxwUkFGz7m9KTSYY0+Hh0QLJMVYtmy6iRiIqsa ZScGAj3Z8F5PLNF7NTxcKdUIeKz+lG8BBWy2+0zwRm3JxJ+KWxPSNl/XnAvupqg+merg +4BaLaqfH2/y70E9DJEzC0mGxYbc3/OQqGWP/2Sceo9ng51+NnQzwyblavmB91xlo3dC OfldewymUCFaJ5dnovJP5aStqFB0Eb2f8e+dkBI/lhMQwJCf3KZ3keVz87pL9S9LR+Qe 1Bkg== X-Gm-Message-State: AOAM533eASAhxUfYGNM14IjAbRvR/r5WHfRcMpgkW+Ef7MITY494+PdT ifhkNAnnfmjU7GYXTmhfWBqay1U3ivyGTwC1 X-Google-Smtp-Source: ABdhPJz1rv0o8v0TlRUaKInpTJ0U5pVgVSUAiup/9OwkWAdQ3En2Ez18FYC2FMOB1TICc+ZRucZj6A== X-Received: by 2002:a17:906:4809:: with SMTP id w9mr23040809ejq.401.1620656283261; Mon, 10 May 2021 07:18:03 -0700 (PDT) Received: from localhost ([2a02:768:2307:40d6::45a]) by smtp.gmail.com with ESMTPSA id l11sm11232566eds.75.2021.05.10.07.18.02 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 May 2021 07:18:02 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: Raviteja Narayanam Subject: [PATCH 04/10] arm64: zynqmp: Add 'i2c-mux-idle-disconnect' property Date: Mon, 10 May 2021 16:17:43 +0200 Message-Id: <9f80d19fa840ecac080461a1449d7aec28b92eae.1620656248.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean From: Raviteja Narayanam I2C muxes that have the slave devices with same address are falling into the below problem. VCK190 system controller (SC) - zynqmp-e-a2197-00-revA.dts I2C1 (0xff030000) -> Mux1 (@0x74) -> Channel 3 -> 0x50 I2C1 (0xff030000) -> Mux2 (@0x75) -> Channel 0 -> 0x50 1. SC accesses I2C1 - Mux1 (0x74) - Channel 3 and then 2. SC accesses I2C1 - Mux2 (0x75) - Channel 0. Now it results in 2 slave devices with same address (0x50) on the I2C bus, making the communication un-reliable. When ' i2c-mux-idle-disconnect' is in DT, after '1', the Mux channel output is disconnected, making none of the channels available to the I2C1. So, there is no question of having the same addressed slave (0x50) present on the bus when we are doing '2'. Same pattern is seen in below two boards also. ZCU208 - zynqmp-zcu208-revA.dts ZCU216 - zynqmp-zcu216-revA.dts Signed-off-by: Raviteja Narayanam Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 2 ++ arch/arm/dts/zynqmp-zcu208-revA.dts | 2 ++ arch/arm/dts/zynqmp-zcu216-revA.dts | 2 ++ 3 files changed, 6 insertions(+) diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index ffa3dbb5f71f..8ec2e866535b 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -457,6 +457,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x74>; + i2c-mux-idle-disconnect; /* reset-gpios = <&gpio SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */ dc_i2c: i2c@0 { /* DC_I2C */ #address-cells = <1>; @@ -561,6 +562,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x75>; + i2c-mux-idle-disconnect; i2c@0 { /* SFP0_IIC */ #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index 0e114cdacb1a..c24301090dde 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -388,6 +388,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x74>; + i2c-mux-idle-disconnect; /* FIXME reset-gpios = <&tca6416_u15 SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ i2c_eeprom: i2c@0 { #address-cells = <1>; @@ -504,6 +505,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x75>; + i2c-mux-idle-disconnect; /* FIXME reset-gpios = <&tca6416_u15 SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ i2c@0 { #address-cells = <1>; diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts index 2302b07c4825..675baf4bed61 100644 --- a/arch/arm/dts/zynqmp-zcu216-revA.dts +++ b/arch/arm/dts/zynqmp-zcu216-revA.dts @@ -399,6 +399,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x74>; + i2c-mux-idle-disconnect; /* FIXME reset-gpios = <&tca6416_u15 SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ i2c_eeprom: i2c@0 { #address-cells = <1>; @@ -515,6 +516,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x75>; + i2c-mux-idle-disconnect; /* FIXME reset-gpios = <&tca6416_u15 SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ i2c@0 { #address-cells = <1>; From patchwork Mon May 10 14:17:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1476469 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=k+U2szJY; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Ff38P0HQ7z9sWl for ; Tue, 11 May 2021 00:19:16 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D93F382EE4; Mon, 10 May 2021 16:18:18 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="k+U2szJY"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id C6C5B82EDD; Mon, 10 May 2021 16:18:08 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [IPv6:2a00:1450:4864:20::629]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 77524824AD for ; Mon, 10 May 2021 16:18:05 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-ej1-x629.google.com with SMTP id r9so24790857ejj.3 for ; Mon, 10 May 2021 07:18:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=f4ESqCpcNQqlNbm2JU+yqUM/xBqkbWLpExlVDq8HbHg=; b=k+U2szJYUAy0eSu7Mw5z4dXchRola0e0q9IPh+t/QLIIkjI54C33cBrugW62lc2vpW 0VrMx1NtiBMwJe013Q+yX2drOlwztD8Zu+DNSwqUeHJN+j4TLHnKXdAJuy3XvcNn4kAY pe7hHGBa3SSU0+9bxZ2hM/tqrUYK29qgQKKzhzRolIInGkWFBtwuE4PIGnIy2+MIQG8b AeAJ2y8XUbp+gFv9GEbMfoBA104Ge8GYHFS9CZNJjLkD4d5KHDzCm8OcYeP7UdyXtIn3 o7li2FKNns1iDVJPby3wkvL2tMx01btJ6GK9F5IDeJMyccjdLNUHqiWNQh3gKXvjP7B9 DncQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=f4ESqCpcNQqlNbm2JU+yqUM/xBqkbWLpExlVDq8HbHg=; b=Vpxi9iV3kFz/164pBoaeNz/XO4gpoI/8cpN/GUYn5EwepjBJ/v4R9kWpdehrofAQGz BI4xCZ298PGZDKAgLM77mwt6lP2e9+4a3J1bYV3wdOudomUEW1ZFNNXmuw/oSLbid12j g6TMVdNUS3PfXKSyA/syx6xxebDca8NUJm6Q1FrszhO4gtl7oNqwDuRE6f8eoYx609Fl 9kUDU6tHboPc4JTu4G/QHkiZz778pETkK5Q2Y1nfxyTR2xcOwZS/rN4NWgkusoI1flIO eLMZvB05IdJBZ6rtujzicWdjQB7PGDpOegcrAQAkG7X8r7ErNeKUbxS4y1JE/AgGs6jO 1+gw== X-Gm-Message-State: AOAM533GWUF0jmYCzl/DBXMkGzg70cylnrJT5iDo6cv9bd8Juajv/4e8 oXgvVmY/RVuNM7+WBRMs1/MXgXSL+4PVnQNB X-Google-Smtp-Source: ABdhPJw/Nc7hO38OPegIvWC/eKdtJFqDnyUSba6jt4xvWqnw0OZYaGOL0J34WUtqNqwUOzHXaX9nXg== X-Received: by 2002:a17:907:3342:: with SMTP id yr2mr26331891ejb.325.1620656284828; Mon, 10 May 2021 07:18:04 -0700 (PDT) Received: from localhost ([2a02:768:2307:40d6::45a]) by smtp.gmail.com with ESMTPSA id l17sm9308748ejk.22.2021.05.10.07.18.04 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 May 2021 07:18:04 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Subject: [PATCH 05/10] arm64: zynqmp: Remove comment about clock chips Date: Mon, 10 May 2021 16:17:44 +0200 Message-Id: X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean These comments weren't push to mainline that's why remove them. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu208-revA.dts | 10 +++++----- arch/arm/dts/zynqmp-zcu216-revA.dts | 10 +++++----- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index c24301090dde..cd2f02f21de5 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -424,27 +424,27 @@ si5341_2: out@2 { /* refclk2 for PS-GT, used for USB3 */ reg = <2>; - always-on; /* assigned-clocks does not enable, so do it here */ + always-on; }; si5341_3: out@3 { /* refclk3 for PS-GT, used for SATA */ reg = <3>; - always-on; /* assigned-clocks does not enable, so do it here */ + always-on; }; si5341_5: out@5 { /* refclk5 PL CLK100 */ reg = <5>; - always-on; /* assigned-clocks does not enable, so do it here */ + always-on; }; si5341_6: out@6 { /* refclk6 PL CLK125 */ reg = <6>; - always-on; /* assigned-clocks does not enable, so do it here */ + always-on; }; si5341_9: out@9 { /* refclk9 used for PS_REF_CLK 33.3 MHz */ reg = <9>; - always-on; /* assigned-clocks does not enable, so do it here */ + always-on; }; }; }; diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts index 675baf4bed61..8aecb1529250 100644 --- a/arch/arm/dts/zynqmp-zcu216-revA.dts +++ b/arch/arm/dts/zynqmp-zcu216-revA.dts @@ -435,27 +435,27 @@ si5341_2: out@2 { /* refclk2 for PS-GT, used for USB3 */ reg = <2>; - always-on; /* assigned-clocks does not enable, so do it here */ + always-on; }; si5341_3: out@3 { /* refclk3 for PS-GT, used for SATA */ reg = <3>; - always-on; /* assigned-clocks does not enable, so do it here */ + always-on; }; si5341_5: out@5 { /* refclk5 PL CLK100 */ reg = <5>; - always-on; /* assigned-clocks does not enable, so do it here */ + always-on; }; si5341_6: out@6 { /* refclk6 PL CLK125 */ reg = <6>; - always-on; /* assigned-clocks does not enable, so do it here */ + always-on; }; si5341_9: out@9 { /* refclk9 used for PS_REF_CLK 33.3 MHz */ reg = <9>; - always-on; /* assigned-clocks does not enable, so do it here */ + always-on; }; }; }; From patchwork Mon May 10 14:17:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1476470 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=2ApVn8mB; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Ff38Y0bPfz9rx6 for ; Tue, 11 May 2021 00:19:24 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 115EB82EE9; Mon, 10 May 2021 16:18:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="2ApVn8mB"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 1E28D82EDD; Mon, 10 May 2021 16:18:10 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [IPv6:2a00:1450:4864:20::635]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id DD42182ED0 for ; Mon, 10 May 2021 16:18:06 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-ej1-x635.google.com with SMTP id f24so24771298ejc.6 for ; Mon, 10 May 2021 07:18:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vWSVVkgp7v/nsifJKXV3fZTMivjH+lfq4d+xWRr8xKM=; b=2ApVn8mBIVhGD7tn/HGmIiz+c5OTk4vlIq4FAeX/lFNAk+spSrySAsWN0kaH+8U9Z9 NetE65bh5YHrYiSMqqlu74CtlLCiOHZsn375vF5m1SfOUQF5cQdk2kpGvFW9TolvK0TC lnWAvXyqgSIn+nuxhsXan7XsU9vREaiJDzo2A/L7hpbIV5+wEUF71k2jyB4N0PfoD5Ty pJdFgLqRLQNsws3RJ+ZZbd/IW1lLnoJoHGXuck2mDn/AJFFhzLgOfNoZHd6TS35AvkW2 cEadoHP952kz9NZb/TU038i581onG+5emq8vTtHhPzoCh9q9oZ0QgocDyUc3PJXRwOq9 dkMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=vWSVVkgp7v/nsifJKXV3fZTMivjH+lfq4d+xWRr8xKM=; b=KJLUwGIjAJjjopnxhPVgZeICqscB7sm2PogQMQ5CeWbH8REC/GWERjJ7Slra2XrcRU DQ5XshmfQQbad201ZYgm1lOTi9X4b4XV1s0aA7xuUm/jXrMMGjlb1THa7ZMkIlR02gaO l+EUPHNNwMHi6d1OsPwJeM9gRxeLBKXfhGmJuRWo42kbZsHNJ6iNZL9IJ6JSIZiFQ0g9 sDZx1dKTCyGNtA1u8IbQ7wYtG1CXZn5uHs9fY++rD1kIvoQjXHfp+0nPQtXYwktmuuCR MZQisvcJFZAsQalShQVjdHxwtINoFMDwmNBkApBxzKiyeWz/FtdNxe2XmG6YtKUCDpUJ QFkg== X-Gm-Message-State: AOAM531Dhj1GfPcem+pwgMe/umcHd6kqJGcfHYE8bxXjEHwerOBY+gYt AZ5+hUUQjc66nIKnrifNyjllmQ3/bUH4MLvK X-Google-Smtp-Source: ABdhPJykNxR87mpVuCqC3kMyZekY6mwrXmmS29P/qFT/nxKDTuTw7BcBPZEnnRUT+eXb3C3kfkhtSQ== X-Received: by 2002:a17:906:e28c:: with SMTP id gg12mr26057133ejb.483.1620656286390; Mon, 10 May 2021 07:18:06 -0700 (PDT) Received: from localhost ([2a02:768:2307:40d6::45a]) by smtp.gmail.com with ESMTPSA id y19sm11567757edc.73.2021.05.10.07.18.05 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 May 2021 07:18:05 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Subject: [PATCH 06/10] arm64: zynqmp: Add missing mio-bank properties to sdhci Date: Mon, 10 May 2021 16:17:45 +0200 Message-Id: <88a0ff6ca98513f5d93a757943c5453df2fed82f.1620656248.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean Add missing xlnx,mio-bank property to sdhci node. Also add properties with 0 value to have it listed in case that files are copied to different projects where default case doesn't need to be handled in the same way. That's why explicitly list them too. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts index 8d8ebeaac3bf..0f1094804d91 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts @@ -93,6 +93,7 @@ &sdhci0 { status = "okay"; no-1-8-v; + xlnx,mio-bank = <0>; }; &ttc0 { From patchwork Mon May 10 14:17:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1476471 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=nCEuUS2N; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Ff38m6b8fz9sWl for ; Tue, 11 May 2021 00:19:36 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C6BAC82EF1; Mon, 10 May 2021 16:18:23 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="nCEuUS2N"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 47B6C82ECF; Mon, 10 May 2021 16:18:12 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id E277282ED2 for ; Mon, 10 May 2021 16:18:08 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-ed1-x52e.google.com with SMTP id v5so7838704edc.8 for ; Mon, 10 May 2021 07:18:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Wu7livGd3KMn9Tz4auYe9uVJGsOlzQZ29UJESJl7CCc=; b=nCEuUS2NKWjnEK254+4D8ZB6J5dhqeKuerKLAZ0vD2rsKtSPgDrNdRhNVPcdDPZcPA /ummcN4JRtjGl2V3pYoz3s0GSTF0mGIxKD5kJwCCsI1e4zsnGsZp8XthgwUrCgcXF01X jgc4/VaXzjjrXY+4ThJEMUjruzWin7/w+VDpav09YRNznnu4ZWgFkk9YOuSZN8bTYap4 QJmEIrXm6Um1YHstKMDFGiuWZRkvECdsH6Fj5s0E6xhLvG1piwWinPYl7p4Ij664BXUs Gc2JoCFexsEk/BajkLM+r1MQZDDvzqL9SAv/W+2mbo0XTdVcW1/dEkMcIr1U+lOOnXEI QPbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=Wu7livGd3KMn9Tz4auYe9uVJGsOlzQZ29UJESJl7CCc=; b=cRtSxgpZsKlfLWIwSAsgv0loLdT+EJxS2MLUwWmqCOR1pfL1Jfj64+BUI36F9syCb9 7bmbDbMLjeKwsS0X2bSHI5BAobV0Z4QqKFHrM3tpkrsplZPMid5DVVzNFT0en6rFhwms 68qBYBcvmdRdzDxKaVb2956pSGdyAJl7DJBINnF1yi4ywBOe9oL535x11Zg0MooWrg01 +MvpxltL0X2dmHXcajFc5/lF/f0rsnjXl2d4Jkzugg9yMH3slta0YFiA9V6qt+8X/sEH sSaHhPlW+3ZYpUQgGPD/sSg/79gcZHy940lSp4gGhqePZQ6bF3y+WYRITmV1IfAuWk6g sVTQ== X-Gm-Message-State: AOAM5300o2McR+/jGVP97OBFOBqlfTyVPu/QABhrD2ooxiegP8VHJYHN 3AxKyjONwIEjy+H7ZVedFp7UiGOUE8bjJsW8 X-Google-Smtp-Source: ABdhPJyb6nf8JpmjppHW/47hLsPzr7MyQXKpNE76R2X9K8G6iP44pWiZEb5DKFWl0dKFUzbKjQ/YYw== X-Received: by 2002:a05:6402:5106:: with SMTP id m6mr29888506edd.212.1620656288277; Mon, 10 May 2021 07:18:08 -0700 (PDT) Received: from localhost ([2a02:768:2307:40d6::45a]) by smtp.gmail.com with ESMTPSA id y22sm9225218eje.26.2021.05.10.07.18.07 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 May 2021 07:18:07 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: T Karthik Reddy Subject: [PATCH 07/10] arm64: zynqmp: Add zynqmp firmware specific DT nodes Date: Mon, 10 May 2021 16:17:46 +0200 Message-Id: <4c48e201ae351c724ad2f33fbe371cda6cc7f061.1620656248.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean From: T Karthik Reddy Probe zynqmp firmware driver by adding zynqmp firmware, power & ipi mailbox device tree nodes for mini emmc. Signed-off-by: T Karthik Reddy Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-mini-emmc0.dts | 40 ++++++++++++++++++++++++++++++ arch/arm/dts/zynqmp-mini-emmc1.dts | 40 ++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+) diff --git a/arch/arm/dts/zynqmp-mini-emmc0.dts b/arch/arm/dts/zynqmp-mini-emmc0.dts index 8467dd8e1cc7..8d9f9ca37259 100644 --- a/arch/arm/dts/zynqmp-mini-emmc0.dts +++ b/arch/arm/dts/zynqmp-mini-emmc0.dts @@ -41,6 +41,46 @@ clock-frequency = <200000000>; }; + firmware { + zynqmp_firmware: zynqmp-firmware { + compatible = "xlnx,zynqmp-firmware"; + #power-domain-cells = <1>; + method = "smc"; + u-boot,dm-pre-reloc; + + zynqmp_power: zynqmp-power { + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-power"; + mboxes = <&ipi_mailbox_pmu1 0>, + <&ipi_mailbox_pmu1 1>; + mbox-names = "tx", "rx"; + }; + }; + }; + + zynqmp_ipi: zynqmp_ipi { + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-ipi-mailbox"; + xlnx,ipi-id = <0>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ipi_mailbox_pmu1: mailbox@ff990400 { + u-boot,dm-pre-reloc; + reg = <0x0 0xff9905c0 0x0 0x20>, + <0x0 0xff9905e0 0x0 0x20>, + <0x0 0xff990e80 0x0 0x20>, + <0x0 0xff990ea0 0x0 0x20>; + reg-names = "local_request_region", + "local_response_region", + "remote_request_region", + "remote_response_region"; + #mbox-cells = <1>; + xlnx,ipi-id = <4>; + }; + }; + amba: amba { compatible = "simple-bus"; #address-cells = <2>; diff --git a/arch/arm/dts/zynqmp-mini-emmc1.dts b/arch/arm/dts/zynqmp-mini-emmc1.dts index 2afcc7751b9f..5722b762d679 100644 --- a/arch/arm/dts/zynqmp-mini-emmc1.dts +++ b/arch/arm/dts/zynqmp-mini-emmc1.dts @@ -41,6 +41,46 @@ clock-frequency = <200000000>; }; + firmware { + zynqmp_firmware: zynqmp-firmware { + compatible = "xlnx,zynqmp-firmware"; + #power-domain-cells = <1>; + method = "smc"; + u-boot,dm-pre-reloc; + + zynqmp_power: zynqmp-power { + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-power"; + mboxes = <&ipi_mailbox_pmu1 0>, + <&ipi_mailbox_pmu1 1>; + mbox-names = "tx", "rx"; + }; + }; + }; + + zynqmp_ipi: zynqmp_ipi { + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-ipi-mailbox"; + xlnx,ipi-id = <0>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ipi_mailbox_pmu1: mailbox@ff990400 { + u-boot,dm-pre-reloc; + reg = <0x0 0xff9905c0 0x0 0x20>, + <0x0 0xff9905e0 0x0 0x20>, + <0x0 0xff990e80 0x0 0x20>, + <0x0 0xff990ea0 0x0 0x20>; + reg-names = "local_request_region", + "local_response_region", + "remote_request_region", + "remote_response_region"; + #mbox-cells = <1>; + xlnx,ipi-id = <4>; + }; + }; + amba: amba { compatible = "simple-bus"; #address-cells = <2>; From patchwork Mon May 10 14:17:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1476473 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=hOO83Vht; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Ff39D1frgz9sWk for ; Tue, 11 May 2021 00:19:59 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2FC0882EF8; Mon, 10 May 2021 16:18:28 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="hOO83Vht"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 3DD0382EE6; Mon, 10 May 2021 16:18:20 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [IPv6:2a00:1450:4864:20::634]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0374382ECE for ; Mon, 10 May 2021 16:18:12 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-ej1-x634.google.com with SMTP id m12so24804062eja.2 for ; Mon, 10 May 2021 07:18:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0vRGVcq9pW/yx/pmx1AuD/7oka13DbbAu4OYGlRYDVE=; b=hOO83VhtXUbrL1QIqWyVD0RI1341CPunzm8epgc5e3hpK8u5U+Bkecn3kxZxTh51Rr sAG5NML20X1o8MWe7R+Vm3tqZUhAYXg++PTNWyEWfv6L4r1POusU+J8Mc0AeKi1um9Sh KlfFBd8L6cqRKS4VSjC0PyBwznR0jKApKn9hNEc+OazwYAff2GcBC00g5MB7ScSj1Bku VlyTTYuXyCRmlzGwrDQ+iIs+ElF9PY9ngdLMbPwguwN6Z3rveRQjQ5ncvv1wIHynw+ym JnLTaBWZdqkCdqRFWiExOxWNjga23TZcKrkrxCKBOW/qZyirjACRxG/qQSSj5UrF13Od WQew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=0vRGVcq9pW/yx/pmx1AuD/7oka13DbbAu4OYGlRYDVE=; b=ax2XVjixtpc5TPXW4BjSNUC1OUylaa+PxkXk6B0IEEIBGdZMZwtnfUkfW56JNFy4uF j7SQ7T+39/s+cT7QVD2J4Uj8lKDRNYpDHVfwpZr5/f1ZZwOdcRIhEWVK6SbpoHkX6BFJ YjzaG41KIxYM4iilY1BZC+a6tQS+QJnCBl5M5pp+8H7xNmYGCWcxuY3u4dmvJKskVekA +L9VlUgFgFiFoAHqR0olAoJy400EoqKC6Jmjz279yiPalLm7q6g8Sx+amwIbSj9E0y/K 6iKdqTlhCw5dARAW+yc5+5tqkUH0v+kgLtaVGIGZbo4nzPWNcuQaGrAaPeTpW/J+G4N0 p0ng== X-Gm-Message-State: AOAM533mYbKhkxTujyOvz87OH+5ewousi7g2uNPGlth31WJXvXXG2X5k efRzt2qffXWXkGbbFs6LDhsTaCt9TVk6aQND X-Google-Smtp-Source: ABdhPJwKkBCTi7GNHo6sbDXEJAnsq8BW1SYtfAE7VPGj2TGNpPF4/W6z1qrG2PcjbrUGQi75SAM/XA== X-Received: by 2002:a17:906:7487:: with SMTP id e7mr26770160ejl.106.1620656290428; Mon, 10 May 2021 07:18:10 -0700 (PDT) Received: from localhost ([2a02:768:2307:40d6::45a]) by smtp.gmail.com with ESMTPSA id p5sm2418992ejm.115.2021.05.10.07.18.09 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 May 2021 07:18:09 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Subject: [PATCH 08/10] arm64: zynqmp: Add pinctrl description Date: Mon, 10 May 2021 16:17:47 +0200 Message-Id: <176af8984d50e87c41af43e938e81ac165283a94.1620656248.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 229 +++++++++++++ arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 306 +++++++++++++++++ arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 329 +++++++++++++++++++ arch/arm/dts/zynqmp-zcu100-revC.dts | 238 +++++++++++++- arch/arm/dts/zynqmp-zcu102-revA.dts | 288 ++++++++++++++++ arch/arm/dts/zynqmp-zcu104-revA.dts | 216 ++++++++++++ arch/arm/dts/zynqmp-zcu104-revC.dts | 216 ++++++++++++ arch/arm/dts/zynqmp-zcu106-revA.dts | 288 ++++++++++++++++ arch/arm/dts/zynqmp-zcu111-revA.dts | 225 +++++++++++++ arch/arm/dts/zynqmp-zcu208-revA.dts | 68 ++++ arch/arm/dts/zynqmp-zcu216-revA.dts | 68 ++++ include/dt-bindings/pinctrl/pinctrl-zynqmp.h | 19 ++ 12 files changed, 2489 insertions(+), 1 deletion(-) create mode 100644 include/dt-bindings/pinctrl/pinctrl-zynqmp.h diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index b8c5efb6a914..d5862c1cabe9 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -11,6 +11,8 @@ #include "zynqmp.dtsi" #include "zynqmp-clk-ccf.dtsi" +#include +#include / { model = "ZynqMP zc1751-xm015-dc1 RevA"; @@ -75,6 +77,8 @@ status = "okay"; phy-handle = <&phy0>; phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem3_default>; phy0: ethernet-phy@0 { reg = <0>; }; @@ -82,6 +86,8 @@ &gpio { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_default>; }; &gpu { @@ -91,6 +97,11 @@ &i2c1 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 36 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 37 GPIO_ACTIVE_HIGH>; eeprom: eeprom@55 { compatible = "atmel,24c64"; /* 24AA64 */ @@ -98,6 +109,216 @@ }; }; +&pinctrl0 { + status = "okay"; + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_9_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_9_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio { + mux { + groups = "gpio0_36_grp", "gpio0_37_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_36_grp", "gpio0_37_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_uart0_default: uart0-default { + mux { + groups = "uart0_8_grp"; + function = "uart0"; + }; + + conf { + groups = "uart0_8_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO34"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO35"; + bias-disable; + }; + }; + + pinctrl_usb0_default: usb0-default { + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + + conf { + groups = "usb0_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO52", "MIO53", "MIO55"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", + "MIO60", "MIO61", "MIO62", "MIO63"; + bias-disable; + }; + }; + + pinctrl_gem3_default: gem3-default { + mux { + function = "ethernet3"; + groups = "ethernet3_0_grp"; + }; + + conf { + groups = "ethernet3_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", + "MIO75"; + bias-high-impedance; + low-power-disable; + }; + + conf-tx { + pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", + "MIO69"; + bias-disable; + low-power-enable; + }; + + mux-mdio { + function = "mdio3"; + groups = "mdio3_0_grp"; + }; + + conf-mdio { + groups = "mdio3_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + }; + + pinctrl_sdhci0_default: sdhci0-default { + mux { + groups = "sdio0_0_grp"; + function = "sdio0"; + }; + + conf { + groups = "sdio0_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + + mux-cd { + groups = "sdio0_cd_0_grp"; + function = "sdio0_cd"; + }; + + conf-cd { + groups = "sdio0_cd_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + + mux-wp { + groups = "sdio0_wp_0_grp"; + function = "sdio0_wp"; + }; + + conf-wp { + groups = "sdio0_wp_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_sdhci1_default: sdhci1-default { + mux { + groups = "sdio1_0_grp"; + function = "sdio1"; + }; + + conf { + groups = "sdio1_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + + mux-cd { + groups = "sdio1_cd_0_grp"; + function = "sdio1_cd"; + }; + + conf-cd { + groups = "sdio1_cd_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + + mux-wp { + groups = "sdio1_wp_0_grp"; + function = "sdio1_wp"; + }; + + conf-wp { + groups = "sdio1_wp_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_gpio_default: gpio-default { + mux { + function = "gpio0"; + groups = "gpio0_38_grp"; + }; + + conf { + groups = "gpio0_38_grp"; + bias-disable; + slew-rate = ; + power-source = ; + }; + }; +}; + &qspi { status = "okay"; flash@0 { @@ -147,6 +368,8 @@ /* eMMC */ &sdhci0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci0_default>; bus-width = <8>; xlnx,mio-bank = <0>; }; @@ -158,16 +381,22 @@ * This property should be removed for supporting UHS mode */ no-1-8-v; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci1_default>; xlnx,mio-bank = <1>; }; &uart0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0_default>; }; /* ULPI SMSC USB3320 */ &usb0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; }; &dwc3_0 { diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index 3204456e6451..d6e924803354 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -11,6 +11,8 @@ #include "zynqmp.dtsi" #include "zynqmp-clk-ccf.dtsi" +#include +#include / { model = "ZynqMP zc1751-xm016-dc2 RevA"; @@ -43,10 +45,14 @@ &can0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can0_default>; }; &can1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_default>; }; &fpd_dma_chan1 { @@ -85,6 +91,8 @@ status = "okay"; phy-handle = <&phy0>; phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem2_default>; phy0: ethernet-phy@5 { reg = <5>; ti,rx-internal-delay = <0x8>; @@ -101,6 +109,11 @@ &i2c0 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio 6 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 7 GPIO_ACTIVE_HIGH>; tca6416_u26: gpio@20 { compatible = "ti,tca6416"; @@ -118,6 +131,8 @@ &nand0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand0_default>; arasan,has-mdma; nand@0 { @@ -190,6 +205,285 @@ }; }; +&pinctrl0 { + status = "okay"; + pinctrl_can0_default: can0-default { + mux { + function = "can0"; + groups = "can0_9_grp"; + }; + + conf { + groups = "can0_9_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO38"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO39"; + bias-disable; + }; + }; + + pinctrl_can1_default: can1-default { + mux { + function = "can1"; + groups = "can1_8_grp"; + }; + + conf { + groups = "can1_8_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO33"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO32"; + bias-disable; + }; + }; + + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_1_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_1_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c0_gpio: i2c0-gpio { + mux { + groups = "gpio0_6_grp", "gpio0_7_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_6_grp", "gpio0_7_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_uart0_default: uart0-default { + mux { + groups = "uart0_10_grp"; + function = "uart0"; + }; + + conf { + groups = "uart0_10_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO42"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO43"; + bias-disable; + }; + }; + + pinctrl_uart1_default: uart1-default { + mux { + groups = "uart1_10_grp"; + function = "uart1"; + }; + + conf { + groups = "uart1_10_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO41"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO40"; + bias-disable; + }; + }; + + pinctrl_usb1_default: usb1-default { + mux { + groups = "usb1_0_grp"; + function = "usb1"; + }; + + conf { + groups = "usb1_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO64", "MIO65", "MIO67"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", + "MIO72", "MIO73", "MIO74", "MIO75"; + bias-disable; + }; + }; + + pinctrl_gem2_default: gem2-default { + mux { + function = "ethernet2"; + groups = "ethernet2_0_grp"; + }; + + conf { + groups = "ethernet2_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", + "MIO63"; + bias-high-impedance; + low-power-disable; + }; + + conf-tx { + pins = "MIO52", "MIO53", "MIO54", "MIO55", "MIO56", + "MIO57"; + bias-disable; + low-power-enable; + }; + + mux-mdio { + function = "mdio2"; + groups = "mdio2_0_grp"; + }; + + conf-mdio { + groups = "mdio2_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + }; + + pinctrl_nand0_default: nand0-default { + mux { + groups = "nand0_0_grp"; + function = "nand0"; + }; + + conf { + groups = "nand0_0_grp"; + bias-pull-up; + }; + + mux-ce { + groups = "nand0_ce_0_grp"; + function = "nand0_ce"; + }; + + conf-ce { + groups = "nand0_ce_0_grp"; + bias-pull-up; + }; + + mux-rb { + groups = "nand0_rb_0_grp"; + function = "nand0_rb"; + }; + + conf-rb { + groups = "nand0_rb_0_grp"; + bias-pull-up; + }; + + mux-dqs { + groups = "nand0_dqs_0_grp"; + function = "nand0_dqs"; + }; + + conf-dqs { + groups = "nand0_dqs_0_grp"; + bias-pull-up; + }; + }; + + pinctrl_spi0_default: spi0-default { + mux { + groups = "spi0_0_grp"; + function = "spi0"; + }; + + conf { + groups = "spi0_0_grp"; + bias-disable; + slew-rate = ; + power-source = ; + }; + + mux-cs { + groups = "spi0_ss_0_grp", "spi0_ss_1_grp", + "spi0_ss_2_grp"; + function = "spi0_ss"; + }; + + conf-cs { + groups = "spi0_ss_0_grp", "spi0_ss_1_grp", + "spi0_ss_2_grp"; + bias-disable; + }; + }; + + pinctrl_spi1_default: spi1-default { + mux { + groups = "spi1_3_grp"; + function = "spi1"; + }; + + conf { + groups = "spi1_3_grp"; + bias-disable; + slew-rate = ; + power-source = ; + }; + + mux-cs { + groups = "spi1_ss_9_grp", "spi1_ss_10_grp", + "spi1_ss_11_grp"; + function = "spi1_ss"; + }; + + conf-cs { + groups = "spi1_ss_9_grp", "spi1_ss_10_grp", + "spi1_ss_11_grp"; + bias-disable; + }; + }; +}; + &rtc { status = "okay"; }; @@ -197,6 +491,9 @@ &spi0 { status = "okay"; num-cs = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi0_default>; + spi0_flash0: flash@0 { #address-cells = <1>; #size-cells = <1>; @@ -214,6 +511,9 @@ &spi1 { status = "okay"; num-cs = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1_default>; + spi1_flash0: flash@0 { #address-cells = <1>; #size-cells = <1>; @@ -231,6 +531,8 @@ /* ULPI SMSC USB3320 */ &usb1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1_default>; }; &dwc3_1 { @@ -240,8 +542,12 @@ &uart0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0_default>; }; &uart1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts index 0f1094804d91..46b27a000949 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts @@ -12,6 +12,9 @@ #include "zynqmp.dtsi" #include "zynqmp-clk-ccf.dtsi" +#include +#include + / { model = "ZynqMP zc1751-xm019-dc5 RevA"; compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; @@ -73,6 +76,8 @@ status = "okay"; phy-handle = <&phy0>; phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem1_default>; phy0: ethernet-phy@0 { reg = <0>; }; @@ -84,42 +89,366 @@ &i2c0 { status = "okay"; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio 74 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 75 GPIO_ACTIVE_HIGH>; }; &i2c1 { status = "okay"; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 76 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 77 GPIO_ACTIVE_HIGH>; + +}; + +&pinctrl0 { + status = "okay"; + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_18_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_18_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c0_gpio: i2c0-gpio { + mux { + groups = "gpio0_74_grp", "gpio0_75_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_74_grp", "gpio0_75_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_19_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_19_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio { + mux { + groups = "gpio0_76_grp", "gpio0_77_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_76_grp", "gpio0_77_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_uart0_default: uart0-default { + mux { + groups = "uart0_17_grp"; + function = "uart0"; + }; + + conf { + groups = "uart0_17_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO70"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO71"; + bias-disable; + }; + }; + + pinctrl_uart1_default: uart1-default { + mux { + groups = "uart1_18_grp"; + function = "uart1"; + }; + + conf { + groups = "uart1_18_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO73"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO72"; + bias-disable; + }; + }; + + pinctrl_gem1_default: gem1-default { + mux { + function = "ethernet1"; + groups = "ethernet1_0_grp"; + }; + + conf { + groups = "ethernet1_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO44", "MIO45", "MIO46", "MIO47", "MIO48", + "MIO49"; + bias-high-impedance; + low-power-disable; + }; + + conf-tx { + pins = "MIO38", "MIO39", "MIO40", "MIO41", "MIO42", + "MIO43"; + bias-disable; + low-power-enable; + }; + + mux-mdio { + function = "mdio1"; + groups = "mdio1_0_grp"; + }; + + conf-mdio { + groups = "mdio1_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + }; + + pinctrl_sdhci0_default: sdhci0-default { + mux { + groups = "sdio0_0_grp"; + function = "sdio0"; + }; + + conf { + groups = "sdio0_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + + mux-cd { + groups = "sdio0_cd_0_grp"; + function = "sdio0_cd"; + }; + + conf-cd { + groups = "sdio0_cd_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + + mux-wp { + groups = "sdio0_wp_0_grp"; + function = "sdio0_wp"; + }; + + conf-wp { + groups = "sdio0_wp_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_watchdog0_default: watchdog0-default { + mux-clk { + groups = "swdt0_clk_1_grp"; + function = "swdt0_clk"; + }; + + conf-clk { + groups = "swdt0_clk_1_grp"; + bias-pull-up; + }; + + mux-rst { + groups = "swdt0_rst_1_grp"; + function = "swdt0_rst"; + }; + + conf-rst { + groups = "swdt0_rst_1_grp"; + bias-disable; + slew-rate = ; + }; + }; + + pinctrl_ttc0_default: ttc0-default { + mux-clk { + groups = "ttc0_clk_0_grp"; + function = "ttc0_clk"; + }; + + conf-clk { + groups = "ttc0_clk_0_grp"; + bias-pull-up; + }; + + mux-wav { + groups = "ttc0_wav_0_grp"; + function = "ttc0_wav"; + }; + + conf-wav { + groups = "ttc0_wav_0_grp"; + bias-disable; + slew-rate = ; + }; + }; + + pinctrl_ttc1_default: ttc1-default { + mux-clk { + groups = "ttc1_clk_0_grp"; + function = "ttc1_clk"; + }; + + conf-clk { + groups = "ttc1_clk_0_grp"; + bias-pull-up; + }; + + mux-wav { + groups = "ttc1_wav_0_grp"; + function = "ttc1_wav"; + }; + + conf-wav { + groups = "ttc1_wav_0_grp"; + bias-disable; + slew-rate = ; + }; + }; + + pinctrl_ttc2_default: ttc2-default { + mux-clk { + groups = "ttc2_clk_0_grp"; + function = "ttc2_clk"; + }; + + conf-clk { + groups = "ttc2_clk_0_grp"; + bias-pull-up; + }; + + mux-wav { + groups = "ttc2_wav_0_grp"; + function = "ttc2_wav"; + }; + + conf-wav { + groups = "ttc2_wav_0_grp"; + bias-disable; + slew-rate = ; + }; + }; + + pinctrl_ttc3_default: ttc3-default { + mux-clk { + groups = "ttc3_clk_0_grp"; + function = "ttc3_clk"; + }; + + conf-clk { + groups = "ttc3_clk_0_grp"; + bias-pull-up; + }; + + mux-wav { + groups = "ttc3_wav_0_grp"; + function = "ttc3_wav"; + }; + + conf-wav { + groups = "ttc3_wav_0_grp"; + bias-disable; + slew-rate = ; + }; + }; }; &sdhci0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci0_default>; no-1-8-v; xlnx,mio-bank = <0>; }; &ttc0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ttc0_default>; }; &ttc1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ttc1_default>; }; &ttc2 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ttc2_default>; }; &ttc3 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ttc3_default>; }; &uart0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0_default>; }; &uart1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; }; &watchdog0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_watchdog0_default>; }; diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index bbcc69c79673..9603043db109 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -15,6 +15,7 @@ #include #include #include +#include #include / { @@ -185,6 +186,11 @@ &i2c1 { status = "okay"; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 4 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>; clock-frequency = <100000>; i2c-mux@75 { /* u11 */ compatible = "nxp,pca9548"; @@ -262,6 +268,221 @@ }; }; +&pinctrl0 { + status = "okay"; + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_1_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_1_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio { + mux { + groups = "gpio0_4_grp", "gpio0_5_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_4_grp", "gpio0_5_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_sdhci0_default: sdhci0-default { + mux { + groups = "sdio0_3_grp"; + function = "sdio0"; + }; + + conf { + groups = "sdio0_3_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + + mux-cd { + groups = "sdio0_cd_0_grp"; + function = "sdio0_cd"; + }; + + conf-cd { + groups = "sdio0_cd_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_sdhci1_default: sdhci1-default { + mux { + groups = "sdio1_2_grp"; + function = "sdio1"; + }; + + conf { + groups = "sdio1_2_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + }; + + pinctrl_spi0_default: spi0-default { + mux { + groups = "spi0_3_grp"; + function = "spi0"; + }; + + conf { + groups = "spi0_3_grp"; + bias-disable; + slew-rate = ; + power-source = ; + }; + + mux-cs { + groups = "spi0_ss_9_grp"; + function = "spi0_ss"; + }; + + conf-cs { + groups = "spi0_ss_9_grp"; + bias-disable; + }; + + }; + + pinctrl_spi1_default: spi1-default { + mux { + groups = "spi1_0_grp"; + function = "spi1"; + }; + + conf { + groups = "spi1_0_grp"; + bias-disable; + slew-rate = ; + power-source = ; + }; + + mux-cs { + groups = "spi1_ss_0_grp"; + function = "spi1_ss"; + }; + + conf-cs { + groups = "spi1_ss_0_grp"; + bias-disable; + }; + + }; + + pinctrl_uart0_default: uart0-default { + mux { + groups = "uart0_0_grp"; + function = "uart0"; + }; + + conf { + groups = "uart0_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO3"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO2"; + bias-disable; + }; + }; + + pinctrl_uart1_default: uart1-default { + mux { + groups = "uart1_0_grp"; + function = "uart1"; + }; + + conf { + groups = "uart1_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO1"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO0"; + bias-disable; + }; + }; + + pinctrl_usb0_default: usb0-default { + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + + conf { + groups = "usb0_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO52", "MIO53", "MIO55"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", + "MIO60", "MIO61", "MIO62", "MIO63"; + bias-disable; + }; + }; + + pinctrl_usb1_default: usb1-default { + mux { + groups = "usb1_0_grp"; + function = "usb1"; + }; + + conf { + groups = "usb1_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO64", "MIO65", "MIO67"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", + "MIO72", "MIO73", "MIO74", "MIO75"; + bias-disable; + }; + }; +}; + &psgtr { status = "okay"; /* usb3, dps */ @@ -278,12 +499,16 @@ status = "okay"; no-1-8-v; disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci0_default>; xlnx,mio-bank = <0>; }; &sdhci1 { status = "okay"; bus-width = <0x4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci1_default>; xlnx,mio-bank = <0>; non-removable; disable-wp; @@ -304,16 +529,22 @@ status = "okay"; label = "LS-SPI0"; num-cs = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi0_default>; }; &spi1 { /* High Speed connector */ status = "okay"; label = "HS-SPI1"; num-cs = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1_default>; }; &uart0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0_default>; bluetooth { compatible = "ti,wl1831-st"; enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; @@ -322,12 +553,15 @@ &uart1 { status = "okay"; - + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; }; /* ULPI SMSC USB3320 */ &usb0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; }; &dwc3_0 { @@ -339,6 +573,8 @@ /* ULPI SMSC USB3320 */ &usb1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1_default>; }; &dwc3_1 { diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 9323b8d64d56..27c3dcc87f96 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -13,6 +13,7 @@ #include "zynqmp-clk-ccf.dtsi" #include #include +#include #include / { @@ -154,6 +155,8 @@ &can1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_default>; }; &dcc { @@ -196,6 +199,8 @@ status = "okay"; phy-handle = <&phy0>; phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem3_default>; phy0: ethernet-phy@21 { reg = <21>; ti,rx-internal-delay = <0x8>; @@ -208,6 +213,8 @@ &gpio { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_default>; }; &gpu { @@ -217,6 +224,11 @@ &i2c0 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; tca6416_u97: gpio@20 { compatible = "ti,tca6416"; @@ -476,6 +488,11 @@ &i2c1 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; /* PL i2c via PCA9306 - u45 */ i2c-mux@74 { /* u34 */ @@ -658,6 +675,269 @@ }; }; +&pinctrl0 { + status = "okay"; + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_3_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_3_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c0_gpio: i2c0-gpio { + mux { + groups = "gpio0_14_grp", "gpio0_15_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_14_grp", "gpio0_15_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_4_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_4_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio { + mux { + groups = "gpio0_16_grp", "gpio0_17_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_16_grp", "gpio0_17_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_uart0_default: uart0-default { + mux { + groups = "uart0_4_grp"; + function = "uart0"; + }; + + conf { + groups = "uart0_4_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO18"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO19"; + bias-disable; + }; + }; + + pinctrl_uart1_default: uart1-default { + mux { + groups = "uart1_5_grp"; + function = "uart1"; + }; + + conf { + groups = "uart1_5_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO21"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO20"; + bias-disable; + }; + }; + + pinctrl_usb0_default: usb0-default { + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + + conf { + groups = "usb0_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO52", "MIO53", "MIO55"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", + "MIO60", "MIO61", "MIO62", "MIO63"; + bias-disable; + }; + }; + + pinctrl_gem3_default: gem3-default { + mux { + function = "ethernet3"; + groups = "ethernet3_0_grp"; + }; + + conf { + groups = "ethernet3_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", + "MIO75"; + bias-high-impedance; + low-power-disable; + }; + + conf-tx { + pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", + "MIO69"; + bias-disable; + low-power-enable; + }; + + mux-mdio { + function = "mdio3"; + groups = "mdio3_0_grp"; + }; + + conf-mdio { + groups = "mdio3_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + }; + + pinctrl_can1_default: can1-default { + mux { + function = "can1"; + groups = "can1_6_grp"; + }; + + conf { + groups = "can1_6_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO25"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO24"; + bias-disable; + }; + }; + + pinctrl_sdhci1_default: sdhci1-default { + mux { + groups = "sdio1_0_grp"; + function = "sdio1"; + }; + + conf { + groups = "sdio1_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + + mux-cd { + groups = "sdio1_cd_0_grp"; + function = "sdio1_cd"; + }; + + conf-cd { + groups = "sdio1_cd_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + + mux-wp { + groups = "sdio1_wp_0_grp"; + function = "sdio1_wp"; + }; + + conf-wp { + groups = "sdio1_wp_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_gpio_default: gpio-default { + mux-sw { + function = "gpio0"; + groups = "gpio0_22_grp", "gpio0_23_grp"; + }; + + conf-sw { + groups = "gpio0_22_grp", "gpio0_23_grp"; + slew-rate = ; + power-source = ; + }; + + mux-msp { + function = "gpio0"; + groups = "gpio0_13_grp", "gpio0_38_grp"; + }; + + conf-msp { + groups = "gpio0_13_grp", "gpio0_38_grp"; + slew-rate = ; + power-source = ; + }; + + conf-pull-up { + pins = "MIO22", "MIO23"; + bias-pull-up; + }; + + conf-pull-none { + pins = "MIO13", "MIO38"; + bias-disable; + }; + }; +}; + &pcie { status = "okay"; }; @@ -726,20 +1006,28 @@ * removed for supporting UHS mode */ no-1-8-v; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci1_default>; xlnx,mio-bank = <1>; }; &uart0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0_default>; }; &uart1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; }; /* ULPI SMSC USB3320 */ &usb0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; }; &dwc3_0 { diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts index a95bd4922a62..bad73d9093c0 100644 --- a/arch/arm/dts/zynqmp-zcu104-revA.dts +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts @@ -12,6 +12,7 @@ #include "zynqmp.dtsi" #include "zynqmp-clk-ccf.dtsi" #include +#include #include / { @@ -62,6 +63,8 @@ &can1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_default>; }; &dcc { @@ -104,6 +107,8 @@ status = "okay"; phy-handle = <&phy0>; phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem3_default>; phy0: ethernet-phy@c { reg = <0xc>; ti,rx-internal-delay = <0x8>; @@ -124,6 +129,11 @@ &i2c1 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; /* Another connection to this bus via PL i2c via PCA9306 - u45 */ i2c-mux@74 { /* u34 */ @@ -215,6 +225,204 @@ }; }; +&pinctrl0 { + status = "okay"; + + pinctrl_can1_default: can1-default { + mux { + function = "can1"; + groups = "can1_6_grp"; + }; + + conf { + groups = "can1_6_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO25"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO24"; + bias-disable; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_4_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_4_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio { + mux { + groups = "gpio0_16_grp", "gpio0_17_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_16_grp", "gpio0_17_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + }; + + pinctrl_gem3_default: gem3-default { + mux { + function = "ethernet3"; + groups = "ethernet3_0_grp"; + }; + + conf { + groups = "ethernet3_0_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", + "MIO75"; + bias-high-impedance; + low-power-disable; + }; + + conf-tx { + pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", + "MIO69"; + bias-disable; + low-power-enable; + }; + + mux-mdio { + function = "mdio3"; + groups = "mdio3_0_grp"; + }; + + conf-mdio { + groups = "mdio3_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + }; + + pinctrl_sdhci1_default: sdhci1-default { + mux { + groups = "sdio1_0_grp"; + function = "sdio1"; + }; + + conf { + groups = "sdio1_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + drive-strength = <12>; + }; + + mux-cd { + groups = "sdio1_cd_0_grp"; + function = "sdio1_cd"; + }; + + conf-cd { + groups = "sdio1_cd_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_uart0_default: uart0-default { + mux { + groups = "uart0_4_grp"; + function = "uart0"; + }; + + conf { + groups = "uart0_4_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO18"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO19"; + bias-disable; + }; + }; + + pinctrl_uart1_default: uart1-default { + mux { + groups = "uart1_5_grp"; + function = "uart1"; + }; + + conf { + groups = "uart1_5_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO21"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO20"; + bias-disable; + }; + }; + + pinctrl_usb0_default: usb0-default { + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + + conf { + groups = "usb0_0_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO52", "MIO53", "MIO55"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", + "MIO60", "MIO61", "MIO62", "MIO63"; + bias-disable; + }; + }; +}; + &qspi { status = "okay"; flash@0 { @@ -274,21 +482,29 @@ &sdhci1 { status = "okay"; no-1-8-v; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci1_default>; xlnx,mio-bank = <1>; disable-wp; }; &uart0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0_default>; }; &uart1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; }; /* ULPI SMSC USB3320 */ &usb0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; }; &dwc3_0 { diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index 8f30a2883e27..1b4cfb142a39 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -12,6 +12,7 @@ #include "zynqmp.dtsi" #include "zynqmp-clk-ccf.dtsi" #include +#include #include / { @@ -68,6 +69,8 @@ &can1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_default>; }; &dcc { @@ -110,6 +113,8 @@ status = "okay"; phy-handle = <&phy0>; phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem3_default>; phy0: ethernet-phy@c { reg = <0xc>; ti,rx-internal-delay = <0x8>; @@ -130,6 +135,11 @@ &i2c1 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; tca6416_u97: gpio@20 { compatible = "ti,tca6416"; @@ -228,6 +238,204 @@ }; }; +&pinctrl0 { + status = "okay"; + + pinctrl_can1_default: can1-default { + mux { + function = "can1"; + groups = "can1_6_grp"; + }; + + conf { + groups = "can1_6_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO25"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO24"; + bias-disable; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_4_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_4_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio { + mux { + groups = "gpio0_16_grp", "gpio0_17_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_16_grp", "gpio0_17_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + }; + + pinctrl_gem3_default: gem3-default { + mux { + function = "ethernet3"; + groups = "ethernet3_0_grp"; + }; + + conf { + groups = "ethernet3_0_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", + "MIO75"; + bias-high-impedance; + low-power-disable; + }; + + conf-tx { + pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", + "MIO69"; + bias-disable; + low-power-enable; + }; + + mux-mdio { + function = "mdio3"; + groups = "mdio3_0_grp"; + }; + + conf-mdio { + groups = "mdio3_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + }; + + pinctrl_sdhci1_default: sdhci1-default { + mux { + groups = "sdio1_0_grp"; + function = "sdio1"; + }; + + conf { + groups = "sdio1_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + drive-strength = <12>; + }; + + mux-cd { + groups = "sdio1_cd_0_grp"; + function = "sdio1_cd"; + }; + + conf-cd { + groups = "sdio1_cd_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_uart0_default: uart0-default { + mux { + groups = "uart0_4_grp"; + function = "uart0"; + }; + + conf { + groups = "uart0_4_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO18"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO19"; + bias-disable; + }; + }; + + pinctrl_uart1_default: uart1-default { + mux { + groups = "uart1_5_grp"; + function = "uart1"; + }; + + conf { + groups = "uart1_5_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO21"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO20"; + bias-disable; + }; + }; + + pinctrl_usb0_default: usb0-default { + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + + conf { + groups = "usb0_0_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO52", "MIO53", "MIO55"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", + "MIO60", "MIO61", "MIO62", "MIO63"; + bias-disable; + }; + }; +}; + &qspi { status = "okay"; flash@0 { @@ -287,21 +495,29 @@ &sdhci1 { status = "okay"; no-1-8-v; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci1_default>; xlnx,mio-bank = <1>; disable-wp; }; &uart0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0_default>; }; &uart1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; }; /* ULPI SMSC USB3320 */ &usb0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; }; &dwc3_0 { diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index 971f76f1cabe..9a6b00ff8c10 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -13,6 +13,7 @@ #include "zynqmp-clk-ccf.dtsi" #include #include +#include #include / { @@ -154,6 +155,8 @@ &can1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_default>; }; &dcc { @@ -208,6 +211,8 @@ status = "okay"; phy-handle = <&phy0>; phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem3_default>; phy0: ethernet-phy@c { reg = <0xc>; ti,rx-internal-delay = <0x8>; @@ -219,6 +224,8 @@ &gpio { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_default>; }; &gpu { @@ -228,6 +235,11 @@ &i2c0 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; tca6416_u97: gpio@20 { compatible = "ti,tca6416"; @@ -486,6 +498,11 @@ &i2c1 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; /* PL i2c via PCA9306 - u45 */ i2c-mux@74 { /* u34 */ @@ -678,6 +695,269 @@ }; }; +&pinctrl0 { + status = "okay"; + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_3_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_3_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c0_gpio: i2c0-gpio { + mux { + groups = "gpio0_14_grp", "gpio0_15_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_14_grp", "gpio0_15_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_4_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_4_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio { + mux { + groups = "gpio0_16_grp", "gpio0_17_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_16_grp", "gpio0_17_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_uart0_default: uart0-default { + mux { + groups = "uart0_4_grp"; + function = "uart0"; + }; + + conf { + groups = "uart0_4_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO18"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO19"; + bias-disable; + }; + }; + + pinctrl_uart1_default: uart1-default { + mux { + groups = "uart1_5_grp"; + function = "uart1"; + }; + + conf { + groups = "uart1_5_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO21"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO20"; + bias-disable; + }; + }; + + pinctrl_usb0_default: usb0-default { + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + + conf { + groups = "usb0_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO52", "MIO53", "MIO55"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", + "MIO60", "MIO61", "MIO62", "MIO63"; + bias-disable; + }; + }; + + pinctrl_gem3_default: gem3-default { + mux { + function = "ethernet3"; + groups = "ethernet3_0_grp"; + }; + + conf { + groups = "ethernet3_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", + "MIO75"; + bias-high-impedance; + low-power-disable; + }; + + conf-tx { + pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", + "MIO69"; + bias-disable; + low-power-enable; + }; + + mux-mdio { + function = "mdio3"; + groups = "mdio3_0_grp"; + }; + + conf-mdio { + groups = "mdio3_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + }; + + pinctrl_can1_default: can1-default { + mux { + function = "can1"; + groups = "can1_6_grp"; + }; + + conf { + groups = "can1_6_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO25"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO24"; + bias-disable; + }; + }; + + pinctrl_sdhci1_default: sdhci1-default { + mux { + groups = "sdio1_0_grp"; + function = "sdio1"; + }; + + conf { + groups = "sdio1_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + + mux-cd { + groups = "sdio1_cd_0_grp"; + function = "sdio1_cd"; + }; + + conf-cd { + groups = "sdio1_cd_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + + mux-wp { + groups = "sdio1_wp_0_grp"; + function = "sdio1_wp"; + }; + + conf-wp { + groups = "sdio1_wp_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_gpio_default: gpio-default { + mux { + function = "gpio0"; + groups = "gpio0_22_grp", "gpio0_23_grp"; + }; + + conf { + groups = "gpio0_22_grp", "gpio0_23_grp"; + slew-rate = ; + power-source = ; + }; + + mux-msp { + function = "gpio0"; + groups = "gpio0_13_grp", "gpio0_38_grp"; + }; + + conf-msp { + groups = "gpio0_13_grp", "gpio0_38_grp"; + slew-rate = ; + power-source = ; + }; + + conf-pull-up { + pins = "MIO22"; + bias-pull-up; + }; + + conf-pull-none { + pins = "MIO13", "MIO23", "MIO38"; + bias-disable; + }; + }; +}; + &psgtr { status = "okay"; /* nc, sata, usb3, dp */ @@ -741,20 +1021,28 @@ * This property should be removed for supporting UHS mode */ no-1-8-v; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci1_default>; xlnx,mio-bank = <1>; }; &uart0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0_default>; }; &uart1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; }; /* ULPI SMSC USB3320 */ &usb0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; }; &dwc3_0 { diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index 9e47008542ae..ec2bf537dff7 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -13,6 +13,7 @@ #include "zynqmp-clk-ccf.dtsi" #include #include +#include #include / { @@ -170,6 +171,8 @@ status = "okay"; phy-handle = <&phy0>; phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem3_default>; phy0: ethernet-phy@c { reg = <0xc>; ti,rx-internal-delay = <0x8>; @@ -181,6 +184,8 @@ &gpio { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_default>; }; &gpu { @@ -190,6 +195,11 @@ &i2c0 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; tca6416_u22: gpio@20 { compatible = "ti,tca6416"; @@ -365,6 +375,11 @@ &i2c1 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; i2c-mux@74 { /* u26 */ compatible = "nxp,pca9548"; @@ -554,6 +569,210 @@ }; }; +&pinctrl0 { + status = "okay"; + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_3_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_3_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c0_gpio: i2c0-gpio { + mux { + groups = "gpio0_14_grp", "gpio0_15_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_14_grp", "gpio0_15_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_4_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_4_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio { + mux { + groups = "gpio0_16_grp", "gpio0_17_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_16_grp", "gpio0_17_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_uart0_default: uart0-default { + mux { + groups = "uart0_4_grp"; + function = "uart0"; + }; + + conf { + groups = "uart0_4_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO18"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO19"; + bias-disable; + }; + }; + + pinctrl_usb0_default: usb0-default { + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + + conf { + groups = "usb0_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO52", "MIO53", "MIO55"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", + "MIO60", "MIO61", "MIO62", "MIO63"; + bias-disable; + }; + }; + + pinctrl_gem3_default: gem3-default { + mux { + function = "ethernet3"; + groups = "ethernet3_0_grp"; + }; + + conf { + groups = "ethernet3_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", + "MIO75"; + bias-high-impedance; + low-power-disable; + }; + + conf-tx { + pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", + "MIO69"; + bias-disable; + low-power-enable; + }; + + mux-mdio { + function = "mdio3"; + groups = "mdio3_0_grp"; + }; + + conf-mdio { + groups = "mdio3_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + }; + + pinctrl_sdhci1_default: sdhci1-default { + mux { + groups = "sdio1_0_grp"; + function = "sdio1"; + }; + + conf { + groups = "sdio1_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + + mux-cd { + groups = "sdio1_cd_0_grp"; + function = "sdio1_cd"; + }; + + conf-cd { + groups = "sdio1_cd_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_gpio_default: gpio-default { + mux { + function = "gpio0"; + groups = "gpio0_22_grp", "gpio0_23_grp"; + }; + + conf { + groups = "gpio0_22_grp", "gpio0_23_grp"; + slew-rate = ; + power-source = ; + }; + + mux-msp { + function = "gpio0"; + groups = "gpio0_13_grp", "gpio0_38_grp"; + }; + + conf-msp { + groups = "gpio0_13_grp", "gpio0_38_grp"; + slew-rate = ; + power-source = ; + }; + + conf-pull-up { + pins = "MIO22"; + bias-pull-up; + }; + + conf-pull-none { + pins = "MIO13", "MIO23", "MIO38"; + bias-disable; + }; + }; +}; + &psgtr { status = "okay"; /* nc, sata, usb3, dp */ @@ -613,6 +832,8 @@ /* SD1 with level shifter */ &sdhci1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci1_default>; disable-wp; /* * This property should be removed for supporting UHS mode @@ -623,11 +844,15 @@ &uart0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0_default>; }; /* ULPI SMSC USB3320 */ &usb0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; dr_mode = "host"; }; diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index cd2f02f21de5..0dc9880b923a 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -13,6 +13,7 @@ #include "zynqmp-clk-ccf.dtsi" #include #include +#include #include / { @@ -221,6 +222,11 @@ &i2c0 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; tca6416_u15: gpio@20 { /* u15 */ compatible = "ti,tca6416"; @@ -382,6 +388,11 @@ &i2c1 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; i2c-mux@74 { compatible = "nxp,pca9548"; /* u20 */ @@ -567,6 +578,63 @@ /* MSP430 */ }; +&pinctrl0 { + status = "okay"; + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_3_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_3_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c0_gpio: i2c0-gpio { + mux { + groups = "gpio0_14_grp", "gpio0_15_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_14_grp", "gpio0_15_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_4_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_4_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio { + mux { + groups = "gpio0_16_grp", "gpio0_17_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_16_grp", "gpio0_17_grp"; + slew-rate = ; + power-source = ; + }; + }; +}; + &qspi { status = "okay"; is-dual = <1>; diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts index 8aecb1529250..e0258ea0dda3 100644 --- a/arch/arm/dts/zynqmp-zcu216-revA.dts +++ b/arch/arm/dts/zynqmp-zcu216-revA.dts @@ -13,6 +13,7 @@ #include "zynqmp-clk-ccf.dtsi" #include #include +#include #include / { @@ -232,6 +233,11 @@ &i2c0 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; tca6416_u15: gpio@20 { /* u15 */ compatible = "ti,tca6416"; @@ -393,6 +399,11 @@ &i2c1 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; i2c-mux@74 { compatible = "nxp,pca9548"; /* u20 */ @@ -578,6 +589,63 @@ /* MSP430 */ }; +&pinctrl0 { + status = "okay"; + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_3_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_3_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c0_gpio: i2c0-gpio { + mux { + groups = "gpio0_14_grp", "gpio0_15_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_14_grp", "gpio0_15_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_4_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_4_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio { + mux { + groups = "gpio0_16_grp", "gpio0_17_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_16_grp", "gpio0_17_grp"; + slew-rate = ; + power-source = ; + }; + }; +}; + &qspi { status = "okay"; is-dual = <1>; diff --git a/include/dt-bindings/pinctrl/pinctrl-zynqmp.h b/include/dt-bindings/pinctrl/pinctrl-zynqmp.h new file mode 100644 index 000000000000..cdb215734bdf --- /dev/null +++ b/include/dt-bindings/pinctrl/pinctrl-zynqmp.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * MIO pin configuration defines for Xilinx ZynqMP + * + * Copyright (C) 2020 Xilinx, Inc. + */ + +#ifndef _DT_BINDINGS_PINCTRL_ZYNQMP_H +#define _DT_BINDINGS_PINCTRL_ZYNQMP_H + +/* Bit value for different voltage levels */ +#define IO_STANDARD_LVCMOS33 0 +#define IO_STANDARD_LVCMOS18 1 + +/* Bit values for Slew Rates */ +#define SLEW_RATE_FAST 0 +#define SLEW_RATE_SLOW 1 + +#endif /* _DT_BINDINGS_PINCTRL_ZYNQMP_H */ From patchwork Mon May 10 14:17:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1476472 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=Qr7lcY6a; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Ff39051fCz9rx6 for ; Tue, 11 May 2021 00:19:48 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B4F5382EE6; Mon, 10 May 2021 16:18:25 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="Qr7lcY6a"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 2940F82EDD; Mon, 10 May 2021 16:18:16 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id EF4B682EB4 for ; Mon, 10 May 2021 16:18:12 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-ed1-x52a.google.com with SMTP id v5so7838985edc.8 for ; Mon, 10 May 2021 07:18:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/tlPUy5qahobL4WwAzhQEBSE3J/NEDLoCkjiW2l35RI=; b=Qr7lcY6a411lSzQk0nf/Cuvzv865sOrrRemFtmE/83DQr22u0YerdsnrDVHUMfHNBY eC/LbpXVCnhr4BDZhLY28gmepOVptJ4MNz7sePA5wORoPvxigQ7Fl7anWVoS8Z1z+dyI Fs1JzKuILlGFf9RrIDtcat3OxhUr9OTVNtHas0NegYA+gPRnwMgvuC6k3OZ1QC+4OSdn IP8Imr8Og+9b1tORXyfiiGBLM5HEPaFNAEkDvz8Sn0qdiE0bu+pTYHfgG7OyYt5nOXSW 3ooGUKWDr6YS8s3fP0YnjNPte06nVqpcRhi9OlBXR7GmwcL/pNNtSWwKqG+MB0kpuqwL /+oQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=/tlPUy5qahobL4WwAzhQEBSE3J/NEDLoCkjiW2l35RI=; b=LLNjn0yBqhC2N0FCyapOxrtBIAodF//TBSo9f9CRqYoXQ2xN4TSHHqZL4U2sAktvEw C/Uy5aD5OFNZtFLsGx9j87J9SQKiMRfsEgP6SfpvgPjianNzMcDKvZefVu2P6S3DhntG 4VRKmHz53pIfTfQNZfcAkm3sHHUvPcaaoa5e5nnFQkmuj/7Wgw+5DQwE68qFCh9EecTo vHr3yqI77esseg4lXI/P+ehdcwZc7L3OKPpt8j9EkV6ftv/xbr292pdicThvwvYLmBAW a1mxfYM3dzTqnzBOmplRLZRKinTSbFjWlQ5tpQIVDGuTQ+vSzUFg6k6NarJ0Bou5kaNS SzZQ== X-Gm-Message-State: AOAM532pcnElk03BStQrDOL5dU0NgBl35xEswHOiWTI8VJj9ZoZwEPPl v6B7Dg32A9G7/B6v7xnhZtuWzjseBX48eX1Y X-Google-Smtp-Source: ABdhPJyqzszIBZhTEjn6JwLGas/HuKGYQf9YdCAqXlLZyDcYhazsNkHbSwAaUF0/77Dd7j8f7POpBg== X-Received: by 2002:a05:6402:3cc:: with SMTP id t12mr29839856edw.64.1620656292302; Mon, 10 May 2021 07:18:12 -0700 (PDT) Received: from localhost ([2a02:768:2307:40d6::45a]) by smtp.gmail.com with ESMTPSA id g24sm1756324eds.41.2021.05.10.07.18.11 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 May 2021 07:18:11 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Subject: [PATCH 09/10] arm64: zynqmp: Add psgtr DT descriptions Date: Mon, 10 May 2021 16:17:48 +0200 Message-Id: <71766096cfa6849b6368c76aeda46819db61ec6d.1620656248.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean Mainline kernel has psgtr driver that's why it is good to add description to DT files. Some boards are just missing description for USB3 and sata. zc1751-dc1 and p-a2197 are also missing clock descriptions for input clocks. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 22 +++++++++++++++++ arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 31 ++++++++++++++++++++++++ arch/arm/dts/zynqmp-zcu100-revC.dts | 4 +++ arch/arm/dts/zynqmp-zcu102-revA.dts | 2 ++ arch/arm/dts/zynqmp-zcu104-revA.dts | 2 ++ arch/arm/dts/zynqmp-zcu104-revC.dts | 2 ++ arch/arm/dts/zynqmp-zcu106-revA.dts | 2 ++ arch/arm/dts/zynqmp-zcu111-revA.dts | 9 ++++++- arch/arm/dts/zynqmp-zcu208-revA.dts | 3 +++ arch/arm/dts/zynqmp-zcu216-revA.dts | 3 +++ 10 files changed, 79 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts index 8e1e6b7f903b..1f5201ac8883 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts @@ -11,6 +11,7 @@ #include "zynqmp.dtsi" #include "zynqmp-clk-ccf.dtsi" #include +#include / { model = "Versal System Controller on a2197 Processor Char board RevA"; /* Tenzing */ @@ -43,6 +44,18 @@ device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; + + si5332_1: si5332_1 { /* clk0_sgmii - u142 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <33333333>; /* FIXME */ + }; + + si5332_2: si5332_2 { /* clk1_usb - u142 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + }; }; &sdhci0 { /* emmc MIO 13-23 - with some settings 16GB */ @@ -70,6 +83,13 @@ xlnx,mio-bank = <1>; }; +&psgtr { + status = "okay"; + /* sgmii, usb3 */ + clocks = <&si5332_1>, <&si5332_2>; + clock-names = "ref0", "ref1"; +}; + &gem0 { status = "okay"; phy-handle = <&phy0>; @@ -537,6 +557,8 @@ snps,dis_u2_susphy_quirk; snps,dis_u3_susphy_quirk; maximum-speed = "super-speed"; + phy-names = "usb3-phy"; + phys = <&psgtr 1 PHY_TYPE_USB3 0 1>; }; &usb1 { diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index d5862c1cabe9..039a8da1a960 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -11,6 +11,7 @@ #include "zynqmp.dtsi" #include "zynqmp-clk-ccf.dtsi" +#include #include #include @@ -39,6 +40,31 @@ device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; }; + + clock_si5338_0: clk27 { /* u55 SI5338-GM */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + }; + + clock_si5338_2: clk26 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + + clock_si5338_3: clk150 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <150000000>; + }; +}; + +&psgtr { + status = "okay"; + /* dp, usb3, sata */ + clocks = <&clock_si5338_0>, <&clock_si5338_2>, <&clock_si5338_3>; + clock-names = "ref1", "ref2", "ref3"; }; &fpd_dma_chan1 { @@ -363,6 +389,8 @@ ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>; ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + phy-names = "sata-phy"; + phys = <&psgtr 3 PHY_TYPE_SATA 1 3>; }; /* eMMC */ @@ -402,6 +430,9 @@ &dwc3_0 { status = "okay"; dr_mode = "host"; + snps,usb3_lpm_capable; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; }; &zynqmp_dpdma { diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index 9603043db109..b83696cccd2b 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -567,6 +567,8 @@ &dwc3_0 { status = "okay"; dr_mode = "peripheral"; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 0>; maximum-speed = "super-speed"; }; @@ -580,6 +582,8 @@ &dwc3_1 { status = "okay"; dr_mode = "host"; + phy-names = "usb3-phy"; + phys = <&psgtr 3 PHY_TYPE_USB3 1 0>; maximum-speed = "super-speed"; }; diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 27c3dcc87f96..ec61b7089da2 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -1034,6 +1034,8 @@ status = "okay"; dr_mode = "host"; snps,usb3_lpm_capable; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; maximum-speed = "super-speed"; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts index bad73d9093c0..c25ac9af48e8 100644 --- a/arch/arm/dts/zynqmp-zcu104-revA.dts +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts @@ -511,6 +511,8 @@ status = "okay"; dr_mode = "host"; snps,usb3_lpm_capable; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; maximum-speed = "super-speed"; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index 1b4cfb142a39..ce9d8fb3b815 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -524,6 +524,8 @@ status = "okay"; dr_mode = "host"; snps,usb3_lpm_capable; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; maximum-speed = "super-speed"; }; diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index 9a6b00ff8c10..ae20e581c0f4 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -1049,6 +1049,8 @@ status = "okay"; dr_mode = "host"; snps,usb3_lpm_capable; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; }; &watchdog0 { diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index ec2bf537dff7..d564f74344c9 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -826,7 +826,7 @@ ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; phy-names = "sata-phy"; - phys = <&psgtr 3 PHY_TYPE_SATA 1 1>; + phys = <&psgtr 3 PHY_TYPE_SATA 1 3>; }; /* SD1 with level shifter */ @@ -853,7 +853,14 @@ status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb0_default>; +}; + +&dwc3_0 { + status = "okay"; dr_mode = "host"; + snps,usb3_lpm_capable; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; }; &zynqmp_dpdma { diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index 0dc9880b923a..880281d4e79b 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -671,6 +671,7 @@ ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + phy-names = "sata-phy"; phys = <&psgtr 3 PHY_TYPE_SATA 1 3>; }; @@ -698,4 +699,6 @@ status = "okay"; dr_mode = "host"; snps,usb3_lpm_capable; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; }; diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts index e0258ea0dda3..f899226ae198 100644 --- a/arch/arm/dts/zynqmp-zcu216-revA.dts +++ b/arch/arm/dts/zynqmp-zcu216-revA.dts @@ -675,6 +675,7 @@ ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + phy-names = "sata-phy"; phys = <&psgtr 3 PHY_TYPE_SATA 1 3>; }; @@ -702,4 +703,6 @@ status = "okay"; dr_mode = "host"; snps,usb3_lpm_capable; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; }; From patchwork Mon May 10 14:17:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1476474 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=zleNLUaD; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Ff39T4FHMz9sWl for ; Tue, 11 May 2021 00:20:13 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 5CA4D82F01; Mon, 10 May 2021 16:18:30 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="zleNLUaD"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 013D582EF1; Mon, 10 May 2021 16:18:22 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE autolearn=unavailable autolearn_force=no version=3.4.2 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [IPv6:2a00:1450:4864:20::635]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id BD40782EDB for ; Mon, 10 May 2021 16:18:15 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-ej1-x635.google.com with SMTP id f24so24771978ejc.6 for ; Mon, 10 May 2021 07:18:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ihA20yq+xl7d1Xz1havXaS4B9Spf+25ZXUccUQcitFY=; b=zleNLUaDRDfLBTY18jd0M+mmnb7Itit33wF8ARhF6WId+XLNtUZuNXRyckAFaELiiJ cha+1bhjr/9wdC9t5f/ECGreOQcCMlasSNHhO2u+2xGCtqOOVx5Jw6/eCDAhLvVJzdTK 97ubM3VwsrY8f2xsGWJ4z2AodhuhGwSbikaJOW12eBC0zUjCL04eWk1PIB+SD+PTLWBv SO9QKLVaclpqJR2ARwi5Lji6F3Z4AbfydVenrB5EU8OLZWyi8WlYCwPwB5dhm4qIXphM aOvRXGzeMcJk/dhaRzWuNJLrgZXZK+5gWB6jdro+NmZWKXdt23t9gI6cf4kTWxvMtyOT J2Fg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=ihA20yq+xl7d1Xz1havXaS4B9Spf+25ZXUccUQcitFY=; b=jUtglHgmCA94LuPa008bucpiR2I/A33kJP+MVtUqcXqlVYn6SrhBFZF60yaXn64ub9 biZ9gvcVVVZMDuJlmG5x8QaQnM/6uOkxGNvHjftec1wxmqIpiei30FjaF6vFawrtZ9U/ 64RUD3R2g8zmSrfg8eURuFuzQllKeyW5nVc+GS18S3vs4HtdbYY/G5Nl6JImJ0hu48yk joK79lz8ILidjFFulhPMTElliwJU3cUfV+rHxGbC0g9ZxwfA/XS9HeMgkWV/Zzy/ov5G WqG6E5CtebINf/lkChx8iNXJlvGO1f8x7jc66I49qFdKISUOTGa+RUbcn3uotkQrw1oe ZzyQ== X-Gm-Message-State: AOAM532Eldvzy+6qJ/LUOQ5w1GR7qBSbjJUxzd5TYbLgor1MHh38LUJR vRtCGdFBNvjZ7h2qygGahxDw0RnKQMGAlji3 X-Google-Smtp-Source: ABdhPJz8hH7YQijrRnfRPobfFV+ftLpJptBihF6iF2jEZp+zPCjLDIKHzj38J9abJHM9rcmI3peRrQ== X-Received: by 2002:a17:907:766d:: with SMTP id kk13mr26180455ejc.417.1620656294446; Mon, 10 May 2021 07:18:14 -0700 (PDT) Received: from localhost ([2a02:768:2307:40d6::45a]) by smtp.gmail.com with ESMTPSA id e11sm11303474edq.76.2021.05.10.07.18.13 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 May 2021 07:18:13 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: Andre Przywara , Heiko Schocher , Heiko Stuebner , Ioana Ciornei , Jagan Teki , Kever Yang , Patrick Delaunay , Peter Robinson , Priyanka Jain , Tim Harvey Subject: [PATCH 10/10] arm64: zynqmp: Add description for SOM/Kria boards Date: Mon, 10 May 2021 16:17:49 +0200 Message-Id: X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean The patch contains several DT files for SOM platform. Carrier card is sck-kv (KV260) revA/B. SMK-K26 is description for starter kit which doesn't have EMMC populated. And SM-K26 is full som with EMMC. Files are divided in this way to make sure that SOM can be plugged to different carrier card and all peripherals on SOM (or defined by a spec) can be used by U-Boot. Full DT for SOM+CC can be merged together as overlays. Signed-off-by: Michal Simek --- arch/arm/dts/Makefile | 4 + arch/arm/dts/zynqmp-sck-kv-g-revA.dts | 373 +++++++++++++++++++ arch/arm/dts/zynqmp-sck-kv-g-revB.dts | 353 ++++++++++++++++++ arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi | 21 ++ arch/arm/dts/zynqmp-sm-k26-revA.dts | 316 ++++++++++++++++ arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi | 21 ++ arch/arm/dts/zynqmp-smk-k26-revA.dts | 21 ++ configs/xilinx_zynqmp_virt_defconfig | 2 +- 8 files changed, 1110 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/zynqmp-sck-kv-g-revA.dts create mode 100644 arch/arm/dts/zynqmp-sck-kv-g-revB.dts create mode 100644 arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi create mode 100644 arch/arm/dts/zynqmp-sm-k26-revA.dts create mode 100644 arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi create mode 100644 arch/arm/dts/zynqmp-smk-k26-revA.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a5cae010c263..ed40b1f85a6d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -305,6 +305,10 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-mini-emmc1.dtb \ zynqmp-mini-nand.dtb \ zynqmp-mini-qspi.dtb \ + zynqmp-sm-k26-revA.dtb \ + zynqmp-smk-k26-revA.dtb \ + zynqmp-sck-kv-g-revA.dtbo \ + zynqmp-sck-kv-g-revB.dtbo \ zynqmp-topic-miamimp-xilinx-xdp-v1r1.dtb \ zynqmp-zcu100-revC.dtb \ zynqmp-zcu102-revA.dtb \ diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts new file mode 100644 index 000000000000..cad2d0572185 --- /dev/null +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts @@ -0,0 +1,373 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for KV260 revA Carrier Card + * + * (C) Copyright 2020, Xilinx, Inc. + * + * SD level shifter: + * "A" – A01 board un-modified (NXP) + * "Y" – A01 board modified with legacy interposer (Nexperia) + * "Z" – A01 board modified with Diode interposer + * + * Michal Simek + */ + + #include + #include + #include + #include + +/dts-v1/; +/plugin/; + +/{ + compatible = "xlnx,zynqmp-sk-kv260-revA", + "xlnx,zynqmp-sk-kv260-revY", + "xlnx,zynqmp-sk-kv260-revZ", + "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp"; + + fragment1 { + target = <&i2c1>; /* I2C_SCK C23/C24 - MIO from SOM */ + + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; + + u14: ina260@40 { /* u14 */ + compatible = "ti,ina260"; + #io-channel-cells = <1>; + label = "ina260-u14"; + reg = <0x40>; + }; + /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */ + }; + }; + + fragment1a { + target = <&amba>; + __overlay__ { + ina260-u14 { + compatible = "iio-hwmon"; + io-channels = <&u14 0>, <&u14 1>, <&u14 2>; + }; + + si5332_0: si5332_0 { /* u17 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + si5332_1: si5332_1 { /* u17 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + si5332_2: si5332_2 { /* u17 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; + + si5332_3: si5332_3 { /* u17 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; + + si5332_4: si5332_4 { /* u17 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + + si5332_5: si5332_5 { /* u17 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + }; + }; + }; + +/* DP/USB 3.0 and SATA */ + fragment2 { + target = <&psgtr>; + __overlay__ { + status = "okay"; + /* pcie, usb3, sata */ + clocks = <&si5332_5>, <&si5332_4>, <&si5332_0>; + clock-names = "ref0", "ref1", "ref2"; + }; + }; + + fragment3 { + target = <&sata>; + __overlay__ { + status = "okay"; + /* SATA OOB timing settings */ + ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; + ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; + ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; + ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; + ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; + ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; + ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + phy-names = "sata-phy"; + phys = <&psgtr 3 PHY_TYPE_SATA 1 2>; + }; + }; + + fragment4 { + target = <&zynqmp_dpsub>; + __overlay__ { + status = "disabled"; + phy-names = "dp-phy0", "dp-phy1"; + phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>; + }; + }; + + fragment9 { + target = <&zynqmp_dpdma>; + __overlay__ { + status = "okay"; + }; + }; + + fragment10 { + target = <&usb0>; + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; + usbhub: usb5744 { /* u43 */ + compatible = "microchip,usb5744"; + reset-gpios = <&gpio 44 GPIO_ACTIVE_HIGH>; + }; + }; + }; + + fragment11 { + target = <&dwc3_0>; + __overlay__ { + status = "okay"; + dr_mode = "host"; + snps,usb3_lpm_capable; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 1>; + maximum-speed = "super-speed"; + }; + }; + + fragment12 { + target = <&sdhci1>; /* on CC with tuned parameters */ + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci1_default>; + /* + * SD 3.0 requires level shifter and this property + * should be removed if the board has level shifter and + * need to work in UHS mode + */ + no-1-8-v; + disable-wp; + xlnx,mio-bank = <1>; + }; + }; + + fragment13 { + target = <&gem3>; /* required by spec */ + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem3_default>; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>; + reset-delay-us = <2>; + + phy0: ethernet-phy@1 { + #phy-cells = <1>; + reg = <1>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,dp83867-rxctrl-strap-quirk; + }; + }; + }; + }; + + fragment14 { + target = <&pinctrl0>; /* required by spec */ + __overlay__ { + status = "okay"; + + pinctrl_uart1_default: uart1-default { + conf { + groups = "uart1_9_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO37"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO36"; + bias-disable; + }; + + mux { + groups = "uart1_9_grp"; + function = "uart1"; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + conf { + groups = "i2c1_6_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + + mux { + groups = "i2c1_6_grp"; + function = "i2c1"; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio { + conf { + groups = "gpio0_24_grp", "gpio0_25_grp"; + slew-rate = ; + power-source = ; + }; + + mux { + groups = "gpio0_24_grp", "gpio0_25_grp"; + function = "gpio0"; + }; + }; + + pinctrl_gem3_default: gem3-default { + conf { + groups = "ethernet3_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO70", "MIO72", "MIO74"; + bias-high-impedance; + low-power-disable; + }; + + conf-bootstrap { + pins = "MIO71", "MIO73", "MIO75"; + bias-disable; + low-power-disable; + }; + + conf-tx { + pins = "MIO64", "MIO65", "MIO66", + "MIO67", "MIO68", "MIO69"; + bias-disable; + low-power-enable; + }; + + conf-mdio { + groups = "mdio3_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + + mux-mdio { + function = "mdio3"; + groups = "mdio3_0_grp"; + }; + + mux { + function = "ethernet3"; + groups = "ethernet3_0_grp"; + }; + }; + + pinctrl_usb0_default: usb0-default { + conf { + groups = "usb0_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO52", "MIO53", "MIO55"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", + "MIO60", "MIO61", "MIO62", "MIO63"; + bias-disable; + }; + + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + }; + + pinctrl_sdhci1_default: sdhci1-default { + conf { + groups = "sdio1_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + + conf-cd { + groups = "sdio1_cd_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + + mux-cd { + groups = "sdio1_cd_0_grp"; + function = "sdio1_cd"; + }; + + mux { + groups = "sdio1_0_grp"; + function = "sdio1"; + }; + }; + }; + }; + fragment15 { + target = <&uart1>; + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; + }; + }; +}; diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts new file mode 100644 index 000000000000..6e46f5717b23 --- /dev/null +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts @@ -0,0 +1,353 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for KV260 revA Carrier Card + * + * (C) Copyright 2020, Xilinx, Inc. + * + * Michal Simek + */ + + #include + #include + #include + #include + +/dts-v1/; +/plugin/; + +/{ + compatible = "xlnx,zynqmp-sk-kv260-rev1", + "xlnx,zynqmp-sk-kv260-revB", "xlnx,zynqmp-sk-kv260-revA", + "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp"; + + fragment1 { + target = <&i2c1>; /* I2C_SCK C23/C24 - MIO from SOM */ + + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; + + u14: ina260@40 { /* u14 */ + compatible = "ti,ina260"; + #io-channel-cells = <1>; + label = "ina260-u14"; + reg = <0x40>; + }; + usbhub: usb5744@2d { /* u43 */ + compatible = "microchip,usb5744"; + reg = <0x2d>; + reset-gpios = <&gpio 44 GPIO_ACTIVE_HIGH>; + }; + /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */ + }; + }; + + fragment1a { + target = <&amba>; + __overlay__ { + ina260-u14 { + compatible = "iio-hwmon"; + io-channels = <&u14 0>, <&u14 1>, <&u14 2>; + }; + + si5332_0: si5332_0 { /* u17 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + si5332_1: si5332_1 { /* u17 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + si5332_2: si5332_2 { /* u17 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; + + si5332_3: si5332_3 { /* u17 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; + + si5332_4: si5332_4 { /* u17 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + + si5332_5: si5332_5 { /* u17 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + }; + }; + }; + +/* DP/USB 3.0 */ + fragment2 { + target = <&psgtr>; + __overlay__ { + status = "okay"; + /* pcie, usb3, sata */ + clocks = <&si5332_5>, <&si5332_4>, <&si5332_0>; + clock-names = "ref0", "ref1", "ref2"; + }; + }; + + fragment4 { + target = <&zynqmp_dpsub>; + __overlay__ { + status = "disabled"; + phy-names = "dp-phy0", "dp-phy1"; + phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>; + }; + }; + + fragment9 { + target = <&zynqmp_dpdma>; + __overlay__ { + status = "okay"; + }; + }; + + fragment10 { + target = <&usb0>; + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; + }; + }; + + fragment11 { + target = <&dwc3_0>; + __overlay__ { + status = "okay"; + dr_mode = "host"; + snps,usb3_lpm_capable; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 1>; + maximum-speed = "super-speed"; + }; + }; + + fragment12 { + target = <&sdhci1>; /* on CC with tuned parameters */ + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci1_default>; + /* + * SD 3.0 requires level shifter and this property + * should be removed if the board has level shifter and + * need to work in UHS mode + */ + no-1-8-v; + disable-wp; + xlnx,mio-bank = <1>; + clk-phase-sd-hs = <126>, <60>; + clk-phase-uhs-sdr25 = <120>, <60>; + clk-phase-uhs-ddr50 = <126>, <48>; + }; + }; + + fragment13 { + target = <&gem3>; /* required by spec */ + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem3_default>; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>; + reset-delay-us = <2>; + + phy0: ethernet-phy@1 { + #phy-cells = <1>; + reg = <1>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,dp83867-rxctrl-strap-quirk; + }; + }; + }; + }; + + fragment14 { + target = <&pinctrl0>; /* required by spec */ + __overlay__ { + status = "okay"; + + pinctrl_uart1_default: uart1-default { + conf { + groups = "uart1_9_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO37"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO36"; + bias-disable; + }; + + mux { + groups = "uart1_9_grp"; + function = "uart1"; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + conf { + groups = "i2c1_6_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + + mux { + groups = "i2c1_6_grp"; + function = "i2c1"; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio { + conf { + groups = "gpio0_24_grp", "gpio0_25_grp"; + slew-rate = ; + power-source = ; + }; + + mux { + groups = "gpio0_24_grp", "gpio0_25_grp"; + function = "gpio0"; + }; + }; + + pinctrl_gem3_default: gem3-default { + conf { + groups = "ethernet3_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO70", "MIO72", "MIO74"; + bias-high-impedance; + low-power-disable; + }; + + conf-bootstrap { + pins = "MIO71", "MIO73", "MIO75"; + bias-disable; + low-power-disable; + }; + + conf-tx { + pins = "MIO64", "MIO65", "MIO66", + "MIO67", "MIO68", "MIO69"; + bias-disable; + low-power-enable; + }; + + conf-mdio { + groups = "mdio3_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + + mux-mdio { + function = "mdio3"; + groups = "mdio3_0_grp"; + }; + + mux { + function = "ethernet3"; + groups = "ethernet3_0_grp"; + }; + }; + + pinctrl_usb0_default: usb0-default { + conf { + groups = "usb0_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO52", "MIO53", "MIO55"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", + "MIO60", "MIO61", "MIO62", "MIO63"; + bias-disable; + }; + + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + }; + + pinctrl_sdhci1_default: sdhci1-default { + conf { + groups = "sdio1_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + + conf-cd { + groups = "sdio1_cd_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + + mux-cd { + groups = "sdio1_cd_0_grp"; + function = "sdio1_cd"; + }; + + mux { + groups = "sdio1_0_grp"; + function = "sdio1"; + }; + }; + }; + }; + fragment15 { + target = <&uart1>; + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; + }; + }; +}; diff --git a/arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi b/arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi new file mode 100644 index 000000000000..3f01233cc5a2 --- /dev/null +++ b/arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP K26/KV260 SD wiring + * + * (C) Copyright 2020, Xilinx, Inc. + * + * Michal Simek + */ + +/* SD0 only supports 3.3V, no level shifter */ +&sdhci1 { /* on CC - MIO 39 - 51 */ + status = "okay"; + no-1-8-v; + disable-wp; + broken-cd; + xlnx,mio-bank = <1>; + /* Do not run SD in HS mode from bootloader */ + sdhci-caps-mask = <0 0x200000>; + sdhci-caps = <0 0>; + max-frequency = <19000000>; +}; diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts new file mode 100644 index 000000000000..e4cf382a4975 --- /dev/null +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -0,0 +1,316 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP SM-K26 rev1/B/A + * + * (C) Copyright 2020, Xilinx, Inc. + * + * Michal Simek + */ + +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include +#include +#include + +/ { + model = "ZynqMP SM-K26 Rev1/B/A"; + compatible = "xlnx,zynqmp-sm-k26-rev1", "xlnx,zynqmp-sm-k26-revB", + "xlnx,zynqmp-sm-k26-revA", "xlnx,zynqmp-sm-k26", + "xlnx,zynqmp"; + + aliases { + gpio0 = &gpio; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &dcc; + spi0 = &qspi; + spi1 = &spi0; + spi2 = &spi1; + usb0 = &usb0; + usb1 = &usb1; + nvmem0 = &eeprom; + nvmem1 = &eeprom_cc; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial1:115200n8"; + }; + + memory@0 { + device_type = "memory"; /* 4GB */ + reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + fwuen { + label = "fwuen"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + ds35 { + label = "heartbeat"; + gpios = <&gpio 7 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + ds36 { + label = "vbus_det"; + gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + }; + + ams { + compatible = "iio-hwmon"; + io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>, + <&xilinx_ams 3>, <&xilinx_ams 4>, <&xilinx_ams 5>, + <&xilinx_ams 6>, <&xilinx_ams 7>, <&xilinx_ams 8>, + <&xilinx_ams 9>, <&xilinx_ams 10>, <&xilinx_ams 11>, + <&xilinx_ams 12>, <&xilinx_ams 13>, <&xilinx_ams 14>, + <&xilinx_ams 15>, <&xilinx_ams 16>, <&xilinx_ams 17>, + <&xilinx_ams 18>, <&xilinx_ams 19>, <&xilinx_ams 20>, + <&xilinx_ams 21>, <&xilinx_ams 22>, <&xilinx_ams 23>, + <&xilinx_ams 24>, <&xilinx_ams 25>, <&xilinx_ams 26>, + <&xilinx_ams 27>, <&xilinx_ams 28>, <&xilinx_ams 29>; + }; +}; + +&uart1 { /* MIO36/MIO37 */ + status = "okay"; +}; + +&qspi { /* MIO 0-5 - U143 */ + status = "okay"; + flash@0 { /* MT25QU512A */ + compatible = "mt25qu512a", "jedec,spi-nor"; /* 64MB */ + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <40000000>; /* 40MHz */ + partition@0 { + label = "Image Selector"; + reg = <0x0 0x80000>; /* 512KB */ + read-only; + lock; + }; + partition@80000 { + label = "Image Selector Golden"; + reg = <0x80000 0x80000>; /* 512KB */ + read-only; + lock; + }; + partition@100000 { + label = "Persistent Register"; + reg = <0x100000 0x20000>; /* 128KB */ + }; + partition@120000 { + label = "Persistent Register Backup"; + reg = <0x120000 0x20000>; /* 128KB */ + }; + partition@140000 { + label = "Open_1"; + reg = <0x140000 0xC0000>; /* 768KB */ + }; + partition@200000 { + label = "Image A (FSBL, PMU, ATF, U-Boot)"; + reg = <0x200000 0xD00000>; /* 13MB */ + }; + partition@f00000 { + label = "ImgSel Image A Catch"; + reg = <0xF00000 0x80000>; /* 512KB */ + read-only; + lock; + }; + partition@f80000 { + label = "Image B (FSBL, PMU, ATF, U-Boot)"; + reg = <0xF80000 0xD00000>; /* 13MB */ + }; + partition@1c80000 { + label = "ImgSel Image B Catch"; + reg = <0x1C80000 0x80000>; /* 512KB */ + read-only; + lock; + }; + partition@1d00000 { + label = "Open_2"; + reg = <0x1D00000 0x100000>; /* 1MB */ + }; + partition@1e00000 { + label = "Recovery Image"; + reg = <0x1E00000 0x200000>; /* 2MB */ + read-only; + lock; + }; + partition@2000000 { + label = "Recovery Image Backup"; + reg = <0x2000000 0x200000>; /* 2MB */ + read-only; + lock; + }; + partition@2200000 { + label = "U-Boot storage variables"; + reg = <0x2200000 0x20000>; /* 128KB */ + }; + partition@2220000 { + label = "U-Boot storage variables backup"; + reg = <0x2220000 0x20000>; /* 128KB */ + }; + partition@2240000 { + label = "SHA256"; + reg = <0x2240000 0x10000>; /* 256B but 64KB sector */ + read-only; + lock; + }; + partition@2250000 { + label = "User"; + reg = <0x2250000 0x1db0000>; /* 29.5 MB */ + }; + }; +}; + +&sdhci0 { /* MIO13-23 - 16GB emmc MTFC16GAPALBH-IT - U133A*/ + status = "okay"; + non-removable; + disable-wp; + bus-width = <8>; + xlnx,mio-bank = <0>; +}; + +&spi1 { /* MIO6, 9-11 */ + status = "okay"; + label = "TPM"; + num-cs = <1>; + tpm@0 { /* slm9670 - U144 */ + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; + reg = <0>; + spi-max-frequency = <18500000>; + }; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; + + eeprom: eeprom@50 { /* u46 - also at address 0x58 */ + compatible = "st,24c64", "atmel,24c64"; /* st m24c64 */ + reg = <0x50>; + /* WP pin EE_WP_EN connected to slg7x644092@68 */ + }; + + eeprom_cc: eeprom@51 { /* required by spec - also at address 0x59 */ + compatible = "st,24c64", "atmel,24c64"; /* st m24c64 */ + reg = <0x51>; + }; + + /* da9062@30 - u170 - also at address 0x31 */ + /* da9131@33 - u167 */ + da9131: pmic@33 { + compatible = "dlg,da9131"; + reg = <0x33>; + regulators { + da9131_buck1: buck1 { + regulator-name = "da9131_buck1"; + regulator-boot-on; + regulator-always-on; + }; + da9131_buck2: buck2 { + regulator-name = "da9131_buck2"; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + /* da9130@32 - u166 */ + da9130: pmic@32 { + compatible = "dlg,da9130"; + reg = <0x32>; + regulators { + da9130_buck1: buck1 { + regulator-name = "da9130_buck1"; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + /* slg7x644091@70 - u168 NOT accessible due to address conflict with stdp4320 */ + /* + * stdp4320 - u27 FW has below two issues to be fixed in next board revision. + * Device acknowledging to addresses 0x5C, 0x5D, 0x70, 0x72, 0x76. + * Address conflict with slg7x644091@70 making both the devices NOT accessible. + * With the FW fix, stdp4320 should respond to address 0x73 only. + */ + /* slg7x644092@68 - u169 */ + /* Also connected via JA1C as C23/C24 */ +}; + +&gpio { + status = "okay"; + gpio-line-names = "QSPI_CLK", "QSPI_DQ1", "QSPI_DQ2", "QSPI_DQ3", "QSPI_DQ0", /* 0 - 4 */ + "QSPI_CS_B", "SPI_CLK", "LED1", "LED2", "SPI_CS_B", /* 5 - 9 */ + "SPI_MISO", "SPI_MOSI", "FWUEN", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ + "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ + "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST", "I2C1_SCL", /* 20 - 24 */ + "I2C1_SDA", "", "", "", "", /* 25 - 29 */ + "", "", "", "", "", /* 30 - 34 */ + "", "", "", "", "", /* 35 - 39 */ + "", "", "", "", "", /* 40 - 44 */ + "", "", "", "", "", /* 45 - 49 */ + "", "", "", "", "", /* 50 - 54 */ + "", "", "", "", "", /* 55 - 59 */ + "", "", "", "", "", /* 60 - 64 */ + "", "", "", "", "", /* 65 - 69 */ + "", "", "", "", "", /* 70 - 74 */ + "", "", "", /* 75 - 77, MIO end and EMIO start */ + "", "", /* 78 - 79 */ + "", "", "", "", "", /* 80 - 84 */ + "", "", "", "", "", /* 85 - 89 */ + "", "", "", "", "", /* 90 - 94 */ + "", "", "", "", "", /* 95 - 99 */ + "", "", "", "", "", /* 100 - 104 */ + "", "", "", "", "", /* 105 - 109 */ + "", "", "", "", "", /* 110 - 114 */ + "", "", "", "", "", /* 115 - 119 */ + "", "", "", "", "", /* 120 - 124 */ + "", "", "", "", "", /* 125 - 129 */ + "", "", "", "", "", /* 130 - 134 */ + "", "", "", "", "", /* 135 - 139 */ + "", "", "", "", "", /* 140 - 144 */ + "", "", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 174 */ +}; + +&xilinx_ams { + status = "okay"; +}; + +&ams_ps { + status = "okay"; +}; + +&ams_pl { + status = "okay"; +}; diff --git a/arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi b/arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi new file mode 100644 index 000000000000..8e9106792ff9 --- /dev/null +++ b/arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP Z2-VSOM + * + * (C) Copyright 2020, Xilinx, Inc. + * + * Michal Simek + */ + +/* SD0 only supports 3.3V, no level shifter */ +&sdhci1 { /* FIXME - on CC - MIO 39 - 51 */ + status = "okay"; + no-1-8-v; + disable-wp; + broken-cd; + xlnx,mio-bank = <1>; + /* Do not run SD in HS mode from bootloader */ + sdhci-caps-mask = <0 0x200000>; + sdhci-caps = <0 0>; + max-frequency = <19000000>; +}; diff --git a/arch/arm/dts/zynqmp-smk-k26-revA.dts b/arch/arm/dts/zynqmp-smk-k26-revA.dts new file mode 100644 index 000000000000..300edc880093 --- /dev/null +++ b/arch/arm/dts/zynqmp-smk-k26-revA.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP SMK-K26 rev1/B/A + * + * (C) Copyright 2020, Xilinx, Inc. + * + * Michal Simek + */ + +#include "zynqmp-sm-k26-revA.dts" + +/ { + model = "ZynqMP SMK-K26 Rev1/B/A"; + compatible = "xlnx,zynqmp-smk-k26-rev1", "xlnx,zynqmp-smk-k26-revB", + "xlnx,zynqmp-smk-k26-revA", "xlnx,zynqmp-smk-k26", + "xlnx,zynqmp"; +}; + +&sdhci0 { + status = "disabled"; +}; diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 9414b267060f..934042172a84 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -68,7 +68,7 @@ CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y CONFIG_CMD_UBI=y CONFIG_PARTITION_TYPE_GUID=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_LIST="avnet-ultra96-rev1 zynqmp-a2197-revA zynqmp-e-a2197-00-revA zynqmp-g-a2197-00-revA zynqmp-m-a2197-01-revA zynqmp-m-a2197-02-revA zynqmp-m-a2197-03-revA zynqmp-p-a2197-00-revA zynqmp-zc1232-revA zynqmp-zc1254-revA zynqmp-zc1751-xm015-dc1 zynqmp-zc1751-xm016-dc2 zynqmp-zc1751-xm017-dc3 zynqmp-zc1751-xm018-dc4 zynqmp-zc1751-xm019-dc5 zynqmp-zcu100-revC zynqmp-zcu102-rev1.1 zynqmp-zcu102-rev1.0 zynqmp-zcu102-revA zynqmp-zcu102-revB zynqmp-zcu104-revA zynqmp-zcu104-revC zynqmp-zcu106-revA zynqmp-zcu111-revA zynqmp-zcu1275-revA zynqmp-zcu1275-revB zynqmp-zcu1285-revA zynqmp-zcu208-revA zynqmp-zcu216-revA zynqmp-topic-miamimp-xilinx-xdp-v1r1" +CONFIG_OF_LIST="avnet-ultra96-rev1 zynqmp-a2197-revA zynqmp-e-a2197-00-revA zynqmp-g-a2197-00-revA zynqmp-m-a2197-01-revA zynqmp-m-a2197-02-revA zynqmp-m-a2197-03-revA zynqmp-p-a2197-00-revA zynqmp-zc1232-revA zynqmp-zc1254-revA zynqmp-zc1751-xm015-dc1 zynqmp-zc1751-xm016-dc2 zynqmp-zc1751-xm017-dc3 zynqmp-zc1751-xm018-dc4 zynqmp-zc1751-xm019-dc5 zynqmp-zcu100-revC zynqmp-zcu102-rev1.1 zynqmp-zcu102-rev1.0 zynqmp-zcu102-revA zynqmp-zcu102-revB zynqmp-zcu104-revA zynqmp-zcu104-revC zynqmp-zcu106-revA zynqmp-zcu111-revA zynqmp-zcu1275-revA zynqmp-zcu1275-revB zynqmp-zcu1285-revA zynqmp-zcu208-revA zynqmp-zcu216-revA zynqmp-topic-miamimp-xilinx-xdp-v1r1 zynqmp-sm-k26-revA zynqmp-smk-k26-revA" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent interrupts iommus power-domains" CONFIG_ENV_IS_NOWHERE=y CONFIG_ENV_IS_IN_FAT=y