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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid01.nvidia.com; CAT:NONE; SFS:(4636009)(396003)(376002)(346002)(136003)(39860400002)(36840700001)(46966006)(82740400003)(7636003)(107886003)(356005)(83380400001)(336012)(2616005)(7696005)(47076005)(26005)(478600001)(186003)(54906003)(8936002)(36860700001)(8676002)(426003)(15650500001)(6916009)(70206006)(36756003)(82310400003)(316002)(86362001)(6666004)(2906002)(4326008)(70586007)(5660300002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2021 16:43:52.7569 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3119f16a-1cf2-4ff9-56b9-08d90fe4f790 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.32]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT035.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1484 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Liming Sun , Liming Sun Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Liming Sun This commit adds control message support and MAC configuration based on the control message. Change-Id: I2d2930751ed1da24b255ae015eec0d5446089cf3 --- drivers/platform/mellanox/mlxbf-tmfifo-regs.h | 4 +- drivers/platform/mellanox/mlxbf-tmfifo.c | 180 ++++++++++++++++++++++---- 2 files changed, 156 insertions(+), 28 deletions(-) diff --git a/drivers/platform/mellanox/mlxbf-tmfifo-regs.h b/drivers/platform/mellanox/mlxbf-tmfifo-regs.h index e4f0d2e..e680230 100644 --- a/drivers/platform/mellanox/mlxbf-tmfifo-regs.h +++ b/drivers/platform/mellanox/mlxbf-tmfifo-regs.h @@ -1,6 +1,6 @@ -/* SPDX-License-Identifier: GPL-2.0 */ +/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only */ /* - * Copyright (c) 2019, Mellanox Technologies. All rights reserved. + * Copyright (c) 2020 NVIDIA Corporation. All rights reserved. */ #ifndef __MLXBF_TMFIFO_REGS_H__ diff --git a/drivers/platform/mellanox/mlxbf-tmfifo.c b/drivers/platform/mellanox/mlxbf-tmfifo.c index 5739a966..b69ab33 100644 --- a/drivers/platform/mellanox/mlxbf-tmfifo.c +++ b/drivers/platform/mellanox/mlxbf-tmfifo.c @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only /* - * Mellanox BlueField SoC TmFifo driver + * NVIDIA BlueField SoC TmFifo driver * - * Copyright (C) 2019 Mellanox Technologies + * Copyright (c) 2020 NVIDIA Corporation. All rights reserved. */ #include @@ -150,7 +150,9 @@ struct mlxbf_tmfifo_irq_info { * @timer: background timer * @vring: Tx/Rx ring * @spin_lock: Tx/Rx spin lock + * @ctrl_mac: MAC address received in control message * @is_ready: ready flag + * @send_ctrl: flag to send control message when ready */ struct mlxbf_tmfifo { struct mlxbf_tmfifo_vdev *vdev[MLXBF_TMFIFO_VDEV_MAX]; @@ -165,7 +167,16 @@ struct mlxbf_tmfifo { struct timer_list timer; struct mlxbf_tmfifo_vring *vring[2]; spinlock_t spin_lock[2]; /* spin lock */ - bool is_ready; + u8 ctrl_mac[ETH_ALEN]; + u32 is_ready : 1; + u32 send_ctrl : 1; +}; + +/* Internal message types defined in reverse order starting from 0xFF. */ +enum { + MLXBF_TMFIFO_MSG_CTRL_REQ = 0xFD, + MLXBF_TMFIFO_MSG_MAC_1 = 0xFE, + MLXBF_TMFIFO_MSG_MAC_2 = 0xFF }; /** @@ -175,11 +186,17 @@ struct mlxbf_tmfifo { * will be read by the other side as data stream in the same byte order. * The length needs to be encoded into network order so both sides * could understand it. + * @mac: first or second half of the MAC address depending on the type. + * @checksum: checksum of the message header (only control message for now). */ struct mlxbf_tmfifo_msg_hdr { u8 type; __be16 len; - u8 unused[5]; + union { + u8 mac[3]; + u8 unused[4]; + } __packed; + u8 checksum; } __packed __aligned(sizeof(u64)); /* @@ -491,6 +508,127 @@ static int mlxbf_tmfifo_get_tx_avail(struct mlxbf_tmfifo *fifo, int vdev_id) return fifo->tx_fifo_size - tx_reserve - count; } +/* Read the configured network MAC address from efi variable. */ +static void mlxbf_tmfifo_get_cfg_mac(u8 *mac) +{ + efi_guid_t guid = EFI_GLOBAL_VARIABLE_GUID; + unsigned long size = ETH_ALEN; + u8 buf[ETH_ALEN]; + efi_status_t rc; + + rc = efi.get_variable(mlxbf_tmfifo_efi_name, &guid, NULL, &size, buf); + if (rc == EFI_SUCCESS && size == ETH_ALEN) + ether_addr_copy(mac, buf); + else + ether_addr_copy(mac, mlxbf_tmfifo_net_default_mac); +} + +/* Set the configured network MAC address into efi variable. */ +static efi_status_t mlxbf_tmfifo_set_cfg_mac(u8 *mac) +{ + efi_guid_t guid = EFI_GLOBAL_VARIABLE_GUID; + efi_status_t status = EFI_SUCCESS; + u8 old_mac[ETH_ALEN] = {0}; + + mlxbf_tmfifo_get_cfg_mac(old_mac); + + if (memcmp(old_mac, mac, ETH_ALEN)) { + status = efi.set_variable(mlxbf_tmfifo_efi_name, &guid, + EFI_VARIABLE_NON_VOLATILE | + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS, + ETH_ALEN, mac); + } + + return status; +} + +/* Just adds up all the bytes of the header. */ +static u8 mlxbf_tmfifo_ctrl_checksum(struct mlxbf_tmfifo_msg_hdr *hdr) +{ + u8 checksum = 0; + int i; + + for (i = 0; i < sizeof(*hdr); i++) + checksum += ((u8 *)hdr)[i]; + + return checksum; +} + +static void mlxbf_tmfifo_ctrl_update_checksum(struct mlxbf_tmfifo_msg_hdr *hdr) +{ + u8 checksum; + + hdr->checksum = 0; + checksum = mlxbf_tmfifo_ctrl_checksum(hdr); + hdr->checksum = ~checksum + 1; +} + +static bool mlxbf_tmfifo_ctrl_verify_checksum(struct mlxbf_tmfifo_msg_hdr *hdr) +{ + u8 checksum = mlxbf_tmfifo_ctrl_checksum(hdr); + + return checksum ? false : true; +} + +static void mlxbf_tmfifo_ctrl_rx(struct mlxbf_tmfifo *fifo, + struct mlxbf_tmfifo_msg_hdr *hdr) +{ + if (!mlxbf_tmfifo_ctrl_verify_checksum(hdr)) + return; + + switch (hdr->type) { + case MLXBF_TMFIFO_MSG_CTRL_REQ: + /* + * Set a flag to send the MAC address later. It can't be sent + * here since another packet might be still in the middle of + * transmission. + */ + fifo->send_ctrl = 1; + test_and_set_bit(MLXBF_TM_TX_LWM_IRQ, &fifo->pend_events); + schedule_work(&fifo->work); + break; + case MLXBF_TMFIFO_MSG_MAC_1: + /* Get the first half of the MAC address. */ + memcpy(fifo->ctrl_mac, hdr->mac, sizeof(hdr->mac)); + break; + case MLXBF_TMFIFO_MSG_MAC_2: + /* Get the second half of the MAC address and update. */ + memcpy(fifo->ctrl_mac + sizeof(hdr->mac), hdr->mac, + sizeof(hdr->mac)); + mlxbf_tmfifo_set_cfg_mac(fifo->ctrl_mac); + break; + default: + break; + } +} + +static void mlxbf_tmfifo_ctrl_tx(struct mlxbf_tmfifo *fifo, int *num_avail) +{ + struct mlxbf_tmfifo_msg_hdr hdr; + u8 mac[ETH_ALEN] = { 0 }; + + /* Send the MAC address with two control messages. */ + if (fifo->send_ctrl && *num_avail >= 2) { + mlxbf_tmfifo_get_cfg_mac(mac); + + hdr.type = MLXBF_TMFIFO_MSG_MAC_1; + hdr.len = 0; + memcpy(hdr.mac, mac, sizeof(hdr.mac)); + mlxbf_tmfifo_ctrl_update_checksum(&hdr); + writeq(*(u64 *)&hdr, fifo->tx_base + MLXBF_TMFIFO_TX_DATA); + (*num_avail)--; + + hdr.type = MLXBF_TMFIFO_MSG_MAC_2; + memcpy(hdr.mac, mac + sizeof(hdr.mac), sizeof(hdr.mac)); + mlxbf_tmfifo_ctrl_update_checksum(&hdr); + writeq(*(u64 *)&hdr, fifo->tx_base + MLXBF_TMFIFO_TX_DATA); + (*num_avail)--; + + fifo->send_ctrl = 0; + } +} + /* Console Tx (move data from the output buffer into the TmFifo). */ static void mlxbf_tmfifo_console_tx(struct mlxbf_tmfifo *fifo, int avail) { @@ -616,9 +754,11 @@ static void mlxbf_tmfifo_rxtx_header(struct mlxbf_tmfifo_vring *vring, /* Drain one word from the FIFO. */ *(u64 *)&hdr = readq(fifo->rx_base + MLXBF_TMFIFO_RX_DATA); - /* Skip the length 0 packets (keepalive). */ - if (hdr.len == 0) + /* Handle the length 0 packets (control msg). */ + if (hdr.len == 0) { + mlxbf_tmfifo_ctrl_rx(fifo, &hdr); return; + } /* Check packet type. */ if (hdr.type == VIRTIO_ID_NET) { @@ -777,6 +917,9 @@ static void mlxbf_tmfifo_rxtx(struct mlxbf_tmfifo_vring *vring, bool is_rx) /* Console output always comes from the Tx buffer. */ if (!is_rx && devid == VIRTIO_ID_CONSOLE) { + /* Check if there is any control data to send. */ + mlxbf_tmfifo_ctrl_tx(fifo, &avail); + mlxbf_tmfifo_console_tx(fifo, avail); break; } @@ -1122,21 +1265,6 @@ static int mlxbf_tmfifo_delete_vdev(struct mlxbf_tmfifo *fifo, int vdev_id) return 0; } -/* Read the configured network MAC address from efi variable. */ -static void mlxbf_tmfifo_get_cfg_mac(u8 *mac) -{ - efi_guid_t guid = EFI_GLOBAL_VARIABLE_GUID; - unsigned long size = ETH_ALEN; - u8 buf[ETH_ALEN]; - efi_status_t rc; - - rc = efi.get_variable(mlxbf_tmfifo_efi_name, &guid, NULL, &size, buf); - if (rc == EFI_SUCCESS && size == ETH_ALEN) - ether_addr_copy(mac, buf); - else - ether_addr_copy(mac, mlxbf_tmfifo_net_default_mac); -} - /* Set TmFifo thresolds which is used to trigger interrupts. */ static void mlxbf_tmfifo_set_threshold(struct mlxbf_tmfifo *fifo) { @@ -1169,7 +1297,7 @@ static void mlxbf_tmfifo_cleanup(struct mlxbf_tmfifo *fifo) { int i; - fifo->is_ready = false; + fifo->is_ready = 0; del_timer_sync(&fifo->timer); mlxbf_tmfifo_disable_irqs(fifo); cancel_work_sync(&fifo->work); @@ -1242,7 +1370,7 @@ static int mlxbf_tmfifo_probe(struct platform_device *pdev) mod_timer(&fifo->timer, jiffies + MLXBF_TMFIFO_TIMER_INTERVAL); - fifo->is_ready = true; + fifo->is_ready = 1; return 0; fail: @@ -1277,6 +1405,6 @@ static int mlxbf_tmfifo_remove(struct platform_device *pdev) module_platform_driver(mlxbf_tmfifo_driver); -MODULE_DESCRIPTION("Mellanox BlueField SoC TmFifo Driver"); -MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("BlueField SoC TmFifo Driver"); +MODULE_LICENSE("Dual BSD/GPL"); MODULE_AUTHOR("Mellanox Technologies");