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Lu" X-Patchwork-Id: 1471706 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=o48Y0DEB; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FWFnb4ZwJz9sW8 for ; Thu, 29 Apr 2021 22:54:27 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7B2DF3AAA0FC; Thu, 29 Apr 2021 12:54:21 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7B2DF3AAA0FC DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1619700861; bh=yHpFepVynqBTpp7TlyWcuvGMhCaZcOUB0RtqLYgANkU=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=o48Y0DEBleaoiYFPEiabZ/6xtGhK09Xp14dMWjI28xSwT8SajPlWMe+UnSWRieKlC R2C3VLN9Lb3yTuAysQkaNPAZ58zkDSxmiV0UUvWTUu0c/+zjVIZYo8uptSbtp/5ae7 whyR6DkJrFWfpJIOVJDF5Npq/QtfWR7cifd99njE= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [IPv6:2607:f8b0:4864:20::42a]) by sourceware.org (Postfix) with ESMTPS id 06CF33958C02 for ; Thu, 29 Apr 2021 12:54:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 06CF33958C02 Received: by mail-pf1-x42a.google.com with SMTP id j6so6638093pfh.5 for ; Thu, 29 Apr 2021 05:54:18 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yHpFepVynqBTpp7TlyWcuvGMhCaZcOUB0RtqLYgANkU=; b=LL0hmeXWvAQ391gqX7x5W7HNAtzOAm2/6zG4BwY9RGNOGstPT38TYnaKUqpZzzlsaT Nwcg6yvbLLwGyvWAP6GKqDdmUQhn+DkunnLS+nKyQW+beKwo+Va5cjZJfzPfDXi+siUI yaFfNP+hgxZfatrJ8kQFQXzhDvmsSuYFfmwhHREEL8OlhkT4OBDrwqJi1nLybsXN/Xxw bh5sBlSNeeQcc4MiH0Iy1gcb1AlTER4+Fzvlkilmt7427zU6o4h4e9TYASaz8fH2WLM7 tfx/c9fsPfSLT5TJCPd9o1Is0wGovYCo7OMcB/vLji1V7eee8BJiNuXZB30tl0Sns+YM 39Pg== X-Gm-Message-State: AOAM530lLzyGi4K7SZujd6AjpA4W0OUM+MNKOoFs5l5p7txD0mBcSHkm 7V5VB44mq6V3mK+C/ZlIqMjkVDuh6Ezgtw== X-Google-Smtp-Source: ABdhPJzMGF+vW+5DXEUVX+zVpC77OJpzEPwP3m+2bR6brfyHJCatCVXPh2Q25DNO1ARDBo0jxVNSCw== X-Received: by 2002:a63:5159:: with SMTP id r25mr9012453pgl.359.1619700857829; Thu, 29 Apr 2021 05:54:17 -0700 (PDT) Received: from gnu-cfl-2.localdomain ([172.58.35.177]) by smtp.gmail.com with ESMTPSA id v18sm2660632pff.90.2021.04.29.05.54.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Apr 2021 05:54:17 -0700 (PDT) Received: from gnu-cfl-2.. (localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id 7EEC7C030A; Thu, 29 Apr 2021 05:54:15 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH 01/12] Update alignment_for_piecewise_move Date: Thu, 29 Apr 2021 05:54:04 -0700 Message-Id: <20210429125415.1634118-2-hjl.tools@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210429125415.1634118-1-hjl.tools@gmail.com> References: <20210429125415.1634118-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3035.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Gcc-patches" From: "H.J. Lu" Reply-To: "H.J. Lu" Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" alignment_for_piecewise_move is called only with MOVE_MAX_PIECES or STORE_MAX_PIECES, which are the number of bytes at a time that we can move or store efficiently. We should call mode_for_size without limit to MAX_FIXED_MODE_SIZE, which is an integer expression for the size in bits of the largest integer machine mode that should actually be used, may be smaller than MOVE_MAX_PIECES or STORE_MAX_PIECES, which may use vector. * expr.c (alignment_for_piecewise_move): Call mode_for_size without limit to MAX_FIXED_MODE_SIZE. --- gcc/expr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/expr.c b/gcc/expr.c index e0167b77410..b4c110f8c17 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -746,7 +746,7 @@ static unsigned int alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align) { scalar_int_mode tmode - = int_mode_for_size (max_pieces * BITS_PER_UNIT, 1).require (); + = int_mode_for_size (max_pieces * BITS_PER_UNIT, 0).require (); if (align >= GET_MODE_ALIGNMENT (tmode)) align = GET_MODE_ALIGNMENT (tmode); From patchwork Thu Apr 29 12:54:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 1471708 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=VHfc9OTj; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FWFnh42KWz9sV5 for ; Thu, 29 Apr 2021 22:54:32 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1AB453AAA0F3; Thu, 29 Apr 2021 12:54:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1AB453AAA0F3 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1619700863; bh=AabzYqtc2XXAWg4Fl7oEv2aM0ZE8wzOo9wu5LDDzLiw=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=VHfc9OTjqciEzSbOOMX9X/MvmB9j9YXjADIr8unjm8aL6NadSJLi/npSh5VLFQgU3 ALwdi0c9rRNlcfLx/HK+3ejxjgYarmAb3IVQev4TO20bCaDVZjRL8rDdZcro25jumD 4r829+F7oFskQxyavb9FSwWLJGceKrwm5Ca6Hu6s= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pg1-x52d.google.com (mail-pg1-x52d.google.com [IPv6:2607:f8b0:4864:20::52d]) by sourceware.org (Postfix) with ESMTPS id 8C9FC3958C3D for ; Thu, 29 Apr 2021 12:54:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 8C9FC3958C3D Received: by mail-pg1-x52d.google.com with SMTP id p2so31620092pgh.4 for ; Thu, 29 Apr 2021 05:54:19 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AabzYqtc2XXAWg4Fl7oEv2aM0ZE8wzOo9wu5LDDzLiw=; b=GJW568XxvXtXfQU8USzZIe7+xTRsMMbp3KZDWt0EttDy+XptbA8OgQCTx5Y6cqbO2s yyjLI3D72y+GfpIBw2EY5yoXLyVx7/nU6xyZHuUseRR3kcRcKW+ck83FDuEZnwa5UyUC 6q5NwQ3CAoT4zlIxVdJ6xPBkS/9hMwi3/HcQpxCsGhvzZdUrWRSLQA6iVFB8qv3SzL6S +rTRjsmqWZTLz9VwCdgl8E058LYbCe8QPrr4eN34uhgiU3D9Qi4IajQsq/g7hPkNy6VU dIr6RP5E9SrcaAnGHsRW5ylkhHvZYIFokVVgKhRq1RauIlQm+mEqGMSneSLnfLVpYbK0 hDNA== X-Gm-Message-State: AOAM533aSDE/iIu6Ub2ezSbLmNmBt56Nd1OrJ87zF1nju0HhXQtUla23 OwLG9ev4CzYmZVjg9RIq3itMemAyMR5yuw== X-Google-Smtp-Source: ABdhPJxymRgXSutkWubOvhr3JUGUS8fnfF5VEyVBqO/M6OsnJ/SHSYBbjEFC2jyMzu5xCCB+lkNVDg== X-Received: by 2002:aa7:9108:0:b029:251:7caf:cec with SMTP id 8-20020aa791080000b02902517caf0cecmr32490470pfh.13.1619700858286; Thu, 29 Apr 2021 05:54:18 -0700 (PDT) Received: from gnu-cfl-2.localdomain ([172.58.35.177]) by smtp.gmail.com with ESMTPSA id 33sm2670596pgq.21.2021.04.29.05.54.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Apr 2021 05:54:17 -0700 (PDT) Received: from gnu-cfl-2.. (localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id 8AC1CC0445; Thu, 29 Apr 2021 05:54:15 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH 02/12] Allow generating pseudo register with specific alignment Date: Thu, 29 Apr 2021 05:54:05 -0700 Message-Id: <20210429125415.1634118-3-hjl.tools@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210429125415.1634118-1-hjl.tools@gmail.com> References: <20210429125415.1634118-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3035.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Gcc-patches" From: "H.J. Lu" Reply-To: "H.J. Lu" Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" gen_reg_rtx tracks stack alignment needed for pseudo registers so that associated hard registers can be properly spilled onto stack. But there are cases where associated hard registers will never be spilled onto stack. gen_reg_rtx is changed to take an argument for register alignment so that stack realignment can be avoided when not needed. * emit-rtl.c (gen_reg_rtx): Add an argument for register alignment and use it if it isn't zero. * explow.c (force_reg): Add an argument for register alignment and pass it to gen_reg_rtx. * explow.h (force_reg): Add an argument for register alignment and default it to 0. * expr.h (convert_to_mode): Likewise. (convert_modes): Likewise. * expr.c (convert_to_mode): Add an argument for register alignment and pass it to convert_modes. (convert_modes): Add an argument for register alignment and pass it to gen_reg_rtx. --- gcc/emit-rtl.c | 5 +++-- gcc/explow.c | 6 +++--- gcc/explow.h | 2 +- gcc/expr.c | 10 ++++++---- gcc/expr.h | 6 ++++-- gcc/rtl.h | 2 +- 6 files changed, 18 insertions(+), 13 deletions(-) diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c index 07e908624a0..4accf851d23 100644 --- a/gcc/emit-rtl.c +++ b/gcc/emit-rtl.c @@ -1160,10 +1160,11 @@ subreg_memory_offset (const_rtx x) This pseudo is assigned the next sequential register number. */ rtx -gen_reg_rtx (machine_mode mode) +gen_reg_rtx (machine_mode mode, unsigned int align) { rtx val; - unsigned int align = GET_MODE_ALIGNMENT (mode); + if (align == 0) + align = GET_MODE_ALIGNMENT (mode); gcc_assert (can_create_pseudo_p ()); diff --git a/gcc/explow.c b/gcc/explow.c index b6da277f689..c8673ce512d 100644 --- a/gcc/explow.c +++ b/gcc/explow.c @@ -663,7 +663,7 @@ copy_to_mode_reg (machine_mode mode, rtx x) since we mark it as a "constant" register. */ rtx -force_reg (machine_mode mode, rtx x) +force_reg (machine_mode mode, rtx x, unsigned int reg_align) { rtx temp, set; rtx_insn *insn; @@ -673,7 +673,7 @@ force_reg (machine_mode mode, rtx x) if (general_operand (x, mode)) { - temp = gen_reg_rtx (mode); + temp = gen_reg_rtx (mode, reg_align); insn = emit_move_insn (temp, x); } else @@ -683,7 +683,7 @@ force_reg (machine_mode mode, rtx x) insn = get_last_insn (); else { - rtx temp2 = gen_reg_rtx (mode); + rtx temp2 = gen_reg_rtx (mode, reg_align); insn = emit_move_insn (temp2, temp); temp = temp2; } diff --git a/gcc/explow.h b/gcc/explow.h index 698f2a2a21c..621cdd7d356 100644 --- a/gcc/explow.h +++ b/gcc/explow.h @@ -40,7 +40,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode); /* Copy a value to a register if it isn't already a register. Args are mode (in case value is a constant) and the value. */ -extern rtx force_reg (machine_mode, rtx); +extern rtx force_reg (machine_mode, rtx, unsigned int reg_align = 0); /* Return given rtx, copied into a new temp reg if it was in memory. */ extern rtx force_not_mem (rtx); diff --git a/gcc/expr.c b/gcc/expr.c index b4c110f8c17..42db4ddbe0a 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -658,9 +658,10 @@ convert_mode_scalar (rtx to, rtx from, int unsignedp) or by copying to a new temporary with conversion. */ rtx -convert_to_mode (machine_mode mode, rtx x, int unsignedp) +convert_to_mode (machine_mode mode, rtx x, int unsignedp, + unsigned int reg_align) { - return convert_modes (mode, VOIDmode, x, unsignedp); + return convert_modes (mode, VOIDmode, x, unsignedp, reg_align); } /* Return an rtx for a value that would result @@ -674,7 +675,8 @@ convert_to_mode (machine_mode mode, rtx x, int unsignedp) You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */ rtx -convert_modes (machine_mode mode, machine_mode oldmode, rtx x, int unsignedp) +convert_modes (machine_mode mode, machine_mode oldmode, rtx x, + int unsignedp, unsigned int reg_align) { rtx temp; scalar_int_mode int_mode; @@ -734,7 +736,7 @@ convert_modes (machine_mode mode, machine_mode oldmode, rtx x, int unsignedp) return simplify_gen_subreg (mode, x, oldmode, 0); } - temp = gen_reg_rtx (mode); + temp = gen_reg_rtx (mode, reg_align); convert_move (temp, x, unsignedp); return temp; } diff --git a/gcc/expr.h b/gcc/expr.h index 9a2736f69fa..2b06da1a889 100644 --- a/gcc/expr.h +++ b/gcc/expr.h @@ -66,10 +66,12 @@ extern void init_expr (void); extern void convert_move (rtx, rtx, int); /* Convert an rtx to specified machine mode and return the result. */ -extern rtx convert_to_mode (machine_mode, rtx, int); +extern rtx convert_to_mode (machine_mode, rtx, int, + unsigned int reg_align = 0); /* Convert an rtx to MODE from OLDMODE and return the result. */ -extern rtx convert_modes (machine_mode, machine_mode, rtx, int); +extern rtx convert_modes (machine_mode, machine_mode, rtx, int, + unsigned int reg_align = 0); /* Expand a call to memcpy or memmove or memcmp, and return the result. */ extern rtx emit_block_op_via_libcall (enum built_in_function, rtx, rtx, rtx, diff --git a/gcc/rtl.h b/gcc/rtl.h index 398d745aff5..c72f7fd59b9 100644 --- a/gcc/rtl.h +++ b/gcc/rtl.h @@ -3125,7 +3125,7 @@ subreg_promoted_mode (rtx x) /* In emit-rtl.c */ extern rtvec gen_rtvec_v (int, rtx *); extern rtvec gen_rtvec_v (int, rtx_insn **); -extern rtx gen_reg_rtx (machine_mode); +extern rtx gen_reg_rtx (machine_mode, unsigned int align = 0); extern rtx gen_rtx_REG_offset (rtx, machine_mode, unsigned int, poly_int64); extern rtx gen_reg_rtx_offset (rtx, machine_mode, int); extern rtx gen_reg_rtx_and_attrs (rtx); From patchwork Thu Apr 29 12:54:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 1471714 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=yyJ3x+Jq; dkim-atps=neutral Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FWFpC6k9hz9sV5 for ; Thu, 29 Apr 2021 22:54:58 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 4C3F53AAAC24; Thu, 29 Apr 2021 12:54:29 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 4C3F53AAAC24 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1619700869; bh=HfL789WkuEHGHMZagMzY2IHlKDB9+8DBFgqQ6jyy+3U=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=yyJ3x+JqVIp2w8zduXaYKwwkge1btiFlpd1GOYanaBkdXtclUEQhPnzdS3agOj/qX GLvk+nyoEUQQca0mHJDvQN5HwI3dIFoO7Q32zh1QH98/a23e3X6rkqUZbUjaTQe2wF O51cIISTWDwLI5Rz88dxOz3mBnQV7u/K6SfwsOE8= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) by sourceware.org (Postfix) with ESMTPS id 109613AAA0F9 for ; Thu, 29 Apr 2021 12:54:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 109613AAA0F9 Received: by mail-pj1-x102d.google.com with SMTP id gj14so2678975pjb.5 for ; Thu, 29 Apr 2021 05:54:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HfL789WkuEHGHMZagMzY2IHlKDB9+8DBFgqQ6jyy+3U=; b=R7qxG4MuX1pIFmx1TDZXmLcgkiQymUCoU0Wm/ISa/OJINWMyB8pIFwmnkSiPheZEIQ 8idvLWOAw7/u1IXd0pHBuv8sfbvasJkCPkwFm9oM0/qZhFHkO9lpqzVDbTGaocjTLaCw xv1IrIOrReiNKD5huVPYzKxEbfyZZ468qg48zCcWuQiB2HlF/2QZG483iySitjhZfOjG OWIBbTCkMH7+cwLP8a91Txz+nL8AcoNmSXmiTAyVKTSHO7BLVh3VXSoEl6aK7yOd0iEX 0nIPmlloO1nnqwt+IqW+0e1/Znl7xHtRsFNzy3Q52APz8guXkGFtwy4jB1L6anUE5dAS raKQ== X-Gm-Message-State: AOAM5331RYG9tn1Kbuu+PCj8XKIQX137l0F5SD0lRXhTdGCKNm2vD72D 1VuKwMoocyVjNg1UQWSDK3lQgo7jjrX6gQ== X-Google-Smtp-Source: ABdhPJwuxpyIWnA36+cz4pY4Lhqtmpi2Nb5abyVWVtuVu9JnL7GE4mpdNQkZOqqAfbBZE4Qppa7VpQ== X-Received: by 2002:a17:902:a514:b029:ed:18b0:1d10 with SMTP id s20-20020a170902a514b02900ed18b01d10mr24785423plq.7.1619700859268; Thu, 29 Apr 2021 05:54:19 -0700 (PDT) Received: from gnu-cfl-2.localdomain ([172.58.35.177]) by smtp.gmail.com with ESMTPSA id p22sm7583741pjg.39.2021.04.29.05.54.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Apr 2021 05:54:17 -0700 (PDT) Received: from gnu-cfl-2.. (localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id 96482C0483; Thu, 29 Apr 2021 05:54:15 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH 03/12] Add TARGET_READ_MEMSET_VALUE/TARGET_GEN_MEMSET_VALUE Date: Thu, 29 Apr 2021 05:54:06 -0700 Message-Id: <20210429125415.1634118-4-hjl.tools@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210429125415.1634118-1-hjl.tools@gmail.com> References: <20210429125415.1634118-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3034.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, LOTS_OF_MONEY, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Gcc-patches" From: "H.J. Lu" Reply-To: "H.J. Lu" Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Add TARGET_READ_MEMSET_VALUE and TARGET_GEN_MEMSET_VALUE to support target instructions to duplicate QImode value to TImode/OImode/XImode value for memmset. gcc/ PR middle-end/90773 * builtins.c (builtin_memset_read_str): Call targetm.read_memset_value. (builtin_memset_gen_str): Call targetm.gen_memset_value. * target.def (read_memset_value): New hook. (gen_memset_value): Likewise. * targhooks.c: Inclue "builtins.h". (default_read_memset_value): New function. (default_gen_memset_value): Likewise. * targhooks.h ()default_read_memset_value: New prototype. (default_gen_memset_value): Likewise. * config/i386/i386-expand.c (ix86_expand_vector_init_duplicate): Make it global. * config/i386/i386-protos.h (ix86_expand_vector_init_duplicate): New. * config/i386/i386.c (ix86_gen_memset_value_from_prev): New function. (ix86_gen_memset_value): Likewise. (ix86_read_memset_value): Likewise. (TARGET_GEN_MEMSET_VALUE): New. (TARGET_READ_MEMSET_VALUE): Likewise. * doc/tm.texi.in: Add TARGET_READ_MEMSET_VALUE and TARGET_GEN_MEMSET_VALUE hooks. * doc/tm.texi: Regenerated. gcc/testsuite/ PR middle-end/90773 * gcc.target/i386/pr90773-15.c: New test. * gcc.target/i386/pr90773-16.c: Likewise. * gcc.target/i386/pr90773-17.c: Likewise. * gcc.target/i386/pr90773-18.c: Likewise. * gcc.target/i386/pr90773-19.c: Likewise. --- gcc/builtins.c | 45 +--- gcc/config/i386/i386-expand.c | 2 +- gcc/config/i386/i386-protos.h | 2 + gcc/config/i386/i386.c | 236 +++++++++++++++++++++ gcc/doc/tm.texi | 16 ++ gcc/doc/tm.texi.in | 4 + gcc/expr.c | 1 - gcc/target.def | 20 ++ gcc/targhooks.c | 54 +++++ gcc/targhooks.h | 4 + gcc/testsuite/gcc.target/i386/pr90773-15.c | 14 ++ gcc/testsuite/gcc.target/i386/pr90773-16.c | 14 ++ gcc/testsuite/gcc.target/i386/pr90773-17.c | 14 ++ gcc/testsuite/gcc.target/i386/pr90773-18.c | 15 ++ gcc/testsuite/gcc.target/i386/pr90773-19.c | 14 ++ 15 files changed, 412 insertions(+), 43 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr90773-15.c create mode 100644 gcc/testsuite/gcc.target/i386/pr90773-16.c create mode 100644 gcc/testsuite/gcc.target/i386/pr90773-17.c create mode 100644 gcc/testsuite/gcc.target/i386/pr90773-18.c create mode 100644 gcc/testsuite/gcc.target/i386/pr90773-19.c diff --git a/gcc/builtins.c b/gcc/builtins.c index 2d6bf4a65b4..c5610795eec 100644 --- a/gcc/builtins.c +++ b/gcc/builtins.c @@ -6586,24 +6586,11 @@ expand_builtin_strncpy (tree exp, rtx target) previous iteration. */ rtx -builtin_memset_read_str (void *data, void *prevp, +builtin_memset_read_str (void *data, void *prev, HOST_WIDE_INT offset ATTRIBUTE_UNUSED, scalar_int_mode mode) { - by_pieces_prev *prev = (by_pieces_prev *) prevp; - if (prev != nullptr && prev->data != nullptr) - { - /* Use the previous data in the same mode. */ - if (prev->mode == mode) - return prev->data; - } - - const char *c = (const char *) data; - char *p = XALLOCAVEC (char, GET_MODE_SIZE (mode)); - - memset (p, *c, GET_MODE_SIZE (mode)); - - return c_readstr (p, mode); + return targetm.read_memset_value ((const char *) data, prev, mode); } /* Callback routine for store_by_pieces. Return the RTL of a register @@ -6613,35 +6600,11 @@ builtin_memset_read_str (void *data, void *prevp, nullptr, it has the RTL info from the previous iteration. */ static rtx -builtin_memset_gen_str (void *data, void *prevp, +builtin_memset_gen_str (void *data, void *prev, HOST_WIDE_INT offset ATTRIBUTE_UNUSED, scalar_int_mode mode) { - rtx target, coeff; - size_t size; - char *p; - - by_pieces_prev *prev = (by_pieces_prev *) prevp; - if (prev != nullptr && prev->data != nullptr) - { - /* Use the previous data in the same mode. */ - if (prev->mode == mode) - return prev->data; - - return simplify_gen_subreg (mode, prev->data, prev->mode, 0); - } - - size = GET_MODE_SIZE (mode); - if (size == 1) - return (rtx) data; - - p = XALLOCAVEC (char, size); - memset (p, 1, size); - coeff = c_readstr (p, mode); - - target = convert_to_mode (mode, (rtx) data, 1); - target = expand_mult (mode, target, coeff, NULL_RTX, 1); - return force_reg (mode, target); + return targetm.gen_memset_value ((rtx) data, prev, mode); } /* Expand expression EXP, which is a call to the memset builtin. Return diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c index 516440eb5c1..1942b46efbf 100644 --- a/gcc/config/i386/i386-expand.c +++ b/gcc/config/i386/i386-expand.c @@ -13586,7 +13586,7 @@ static bool expand_vec_perm_1 (struct expand_vec_perm_d *d); /* A subroutine of ix86_expand_vector_init. Store into TARGET a vector with all elements equal to VAR. Return true if successful. */ -static bool +bool ix86_expand_vector_init_duplicate (bool mmx_ok, machine_mode mode, rtx target, rtx val) { diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h index 7782cf1163f..eae28acbc8d 100644 --- a/gcc/config/i386/i386-protos.h +++ b/gcc/config/i386/i386-protos.h @@ -257,6 +257,8 @@ extern void ix86_expand_mul_widen_hilo (rtx, rtx, rtx, bool, bool); extern void ix86_expand_sse2_mulv4si3 (rtx, rtx, rtx); extern void ix86_expand_sse2_mulvxdi3 (rtx, rtx, rtx); extern void ix86_expand_sse2_abs (rtx, rtx); +extern bool ix86_expand_vector_init_duplicate (bool, machine_mode, rtx, + rtx); /* In i386-c.c */ extern void ix86_target_macros (void); diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 68f33f96f5a..e6ee3ef630a 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -23008,6 +23008,236 @@ ix86_optab_supported_p (int op, machine_mode mode1, machine_mode, } } +/* Return the RTL for memset in MODE from PREV. */ + +static rtx +ix86_gen_memset_value_from_prev (by_pieces_prev *prevp, + scalar_int_mode mode) +{ + rtx prev = prevp->data; + + /* Use the previous data in the same mode. */ + if (prevp->mode == mode) + return prev; + + machine_mode prev_mode = prevp->mode; + size_t size = GET_MODE_SIZE (prev_mode); + + /* NB: Skip if the previous value is 1 byte or less. CONST_WIDE_INT + is in VOIDmode whose size is 0. */ + if (size <= 1) + return nullptr; + + rtx reg, reg_ti; + switch (size) + { + default: + gcc_unreachable (); + + case 2: + case 4: + return simplify_gen_subreg (mode, prev, prev_mode, 0); + + case 8: + /* In 64-bit mode, use SUBREG since word size is 8 bytes. */ + if (TARGET_64BIT) + return simplify_gen_subreg (mode, prev, prev_mode, 0); + + switch (GET_MODE_SIZE (mode)) + { + default: + gcc_unreachable (); + case 2: + case 4: +do_hi_si_mode: + /* In 32-bit mode, Extract the value from an 8-byte + register into an integer register first. */ + reg = gen_reg_rtx (SImode); + emit_move_insn (reg, + simplify_gen_subreg (SImode, prev, + prev_mode, 0)); + return simplify_gen_subreg (mode, reg, SImode, 0); + } + break; + + case 16: + switch (GET_MODE_SIZE (mode)) + { + default: + gcc_unreachable (); + case 2: + case 4: + /* Extract the value from a 16-byte vector register into + an integer register first. */ + goto do_hi_si_mode; + case 8: + return simplify_gen_subreg (mode, prev, prev_mode, 0); + case 16: + return prev; + } + break; + + case 32: + switch (GET_MODE_SIZE (mode)) + { + default: + gcc_unreachable (); + case 2: +do_himode: + /* Extract the value from a 32-byte vector register into + a 16-byte vector register first. */ + reg_ti = gen_reg_rtx (TImode); + emit_move_insn (reg_ti, + simplify_gen_subreg (TImode, prev, + prev_mode, 0)); + /* Then extract the value from a 16-byte vector register + into an integer register. */ + reg = gen_reg_rtx (SImode); + emit_move_insn (reg, + simplify_gen_subreg (SImode, reg_ti, + TImode, 0)); + return simplify_gen_subreg (mode, reg, SImode, 0); + + case 4: + case 8: +do_si_di_mode: + /* Extract the value from a 32-byte vector register into + a 16-byte vector register first. */ + reg_ti = gen_reg_rtx (TImode); + emit_move_insn (reg_ti, + simplify_gen_subreg (TImode, prev, + prev_mode, 0)); + /* Generate 4/8-byte SSE -> INT move instruction. */ + reg = gen_reg_rtx (mode); + emit_move_insn (reg, + simplify_gen_subreg (mode, reg_ti, + TImode, 0)); + return reg; + case 16: + return simplify_gen_subreg (mode, prev, prev_mode, 0); + case 32: + return prev; + } + + case 64: + switch (GET_MODE_SIZE (mode)) + { + default: + gcc_unreachable (); + case 2: + /* Extract the value from a 64-byte vector register into + a 16-byte vector register first. */ + goto do_himode; + case 4: + case 8: + /* Extract the value from a 64-byte vector register into + a 16-byte vector register first. */ + goto do_si_di_mode; + case 16: + case 32: + return simplify_gen_subreg (mode, prev, prev_mode, 0); + case 64: + return prev; + } + } + + return nullptr; +} + +/* Implement the TARGET_GEN_MEMSET_VALUE hook. */ + +static rtx +ix86_gen_memset_value (rtx data, void *prevp, scalar_int_mode mode) +{ + /* Don't use the previous value if size is 1. */ + if (GET_MODE_SIZE (mode) == 1) + return data; + + by_pieces_prev *prev = (by_pieces_prev *) prevp; + if (prev != nullptr && prev->data != nullptr) + { + rtx value = ix86_gen_memset_value_from_prev (prev, mode); + if (value) + return value; + } + + /* Use default_gen_memset_value for vector store won't be used. */ + if (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (DImode)) + return default_gen_memset_value (data, prevp, mode); + + rtx one, target; + scalar_mode one_mode; + + switch (GET_MODE_SIZE (mode)) + { + default: + gcc_unreachable (); + + case 64: + if (!TARGET_AVX512BW) + { + rtx tmp = gen_reg_rtx (V32QImode); + if (!ix86_expand_vector_init_duplicate (false, V32QImode, + tmp, data)) + gcc_unreachable (); + target = gen_rtx_VEC_CONCAT (V64QImode, tmp, tmp); + return convert_to_mode (mode, target, 1); + } + /* FALLTHRU */ + case 16: + case 32: + one_mode = QImode; + one = data; + break; + } + + unsigned int nunits = GET_MODE_SIZE (mode) / GET_MODE_SIZE (one_mode); + machine_mode vector_mode; + if (!mode_for_vector (one_mode, nunits).exists (&vector_mode)) + gcc_unreachable (); + + target = gen_reg_rtx (vector_mode, UNITS_PER_WORD * BITS_PER_UNIT); + if (!ix86_expand_vector_init_duplicate (false, vector_mode, target, + one)) + gcc_unreachable (); + + return convert_to_mode (mode, target, 1, + UNITS_PER_WORD * BITS_PER_UNIT); +} + +/* Implement the TARGET_READ_MEMSET_VALUE hook. */ + +static rtx +ix86_read_memset_value (const char *str, void *prevp, + scalar_int_mode mode) +{ + rtx value; + + by_pieces_prev *prev = (by_pieces_prev *) prevp; + if (prev != nullptr && prev->data != nullptr) + { + /* Don't use the previous value if size is 1. */ + if (GET_MODE_SIZE (mode) == 1) + return default_read_memset_value (str, nullptr, mode); + + value = ix86_gen_memset_value_from_prev (prev, mode); + if (value) + return value; + + return default_read_memset_value (str, nullptr, mode); + } + + /* Use default_gen_memset_value if vector store can't be used. + NB: Need AVX2 for fast vector duplication and gen_reg_rtx. */ + if (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (DImode) + || !TARGET_AVX2 + || !reg_rtx_no) + return default_read_memset_value (str, nullptr, mode); + + value = default_read_memset_value (str, nullptr, QImode); + return ix86_gen_memset_value (value, nullptr, mode); +} + /* Address space support. This is not "far pointers" in the 16-bit sense, but an easy way @@ -23909,6 +24139,12 @@ static bool ix86_libc_has_fast_function (int fcode ATTRIBUTE_UNUSED) #undef TARGET_LIBC_HAS_FAST_FUNCTION #define TARGET_LIBC_HAS_FAST_FUNCTION ix86_libc_has_fast_function +#undef TARGET_GEN_MEMSET_VALUE +#define TARGET_GEN_MEMSET_VALUE ix86_gen_memset_value + +#undef TARGET_READ_MEMSET_VALUE +#define TARGET_READ_MEMSET_VALUE ix86_read_memset_value + #if CHECKING_P #undef TARGET_RUN_TARGET_SELFTESTS #define TARGET_RUN_TARGET_SELFTESTS selftest::ix86_run_selftests diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index 7e8fb8b6ee8..2861d60ff28 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -11944,6 +11944,22 @@ This function prepares to emit a conditional comparison within a sequence @var{bit_code} is @code{AND} or @code{IOR}, which is the op on the compares. @end deftypefn +@deftypefn {Target Hook} rtx TARGET_READ_MEMSET_VALUE (const char *@var{c}, void *@var{prev}, scalar_int_mode @var{mode}) +This function returns the RTL of a constant integer corresponding to +target reading @code{GET_MODE_SIZE (@var{mode})} bytes from the stringn +constant @var{str}. If @var{prev} is not @samp{nullptr}, it contains +the RTL information from the previous interation. +@end deftypefn + +@deftypefn {Target Hook} rtx TARGET_GEN_MEMSET_VALUE (rtx @var{data}, void *@var{prev}, scalar_int_mode @var{mode}) +This function returns the RTL of a register containing +@code{GET_MODE_SIZE (@var{mode})} consecutive copies of the unsigned +char value given in the RTL register @var{data}. For example, if +@var{mode} is 4 bytes wide, return the RTL for 0x01010101*@var{data}. +If @var{PREV} is not @samp{nullptr}, it is the RTL information from +the previous iteration. +@end deftypefn + @deftypefn {Target Hook} unsigned TARGET_LOOP_UNROLL_ADJUST (unsigned @var{nunroll}, class loop *@var{loop}) This target hook returns a new value for the number of times @var{loop} should be unrolled. The parameter @var{nunroll} is the number of times diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in index 20acf363ed9..3fabf2b6181 100644 --- a/gcc/doc/tm.texi.in +++ b/gcc/doc/tm.texi.in @@ -8032,6 +8032,10 @@ lists. @hook TARGET_GEN_CCMP_NEXT +@hook TARGET_READ_MEMSET_VALUE + +@hook TARGET_GEN_MEMSET_VALUE + @hook TARGET_LOOP_UNROLL_ADJUST @defmac POWI_MAX_MULTS diff --git a/gcc/expr.c b/gcc/expr.c index 42db4ddbe0a..56e845a40da 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -1171,7 +1171,6 @@ op_by_pieces_d::run () /* NB: widest_int_mode_for_size checks M_MAX_SIZE > 1. */ scalar_int_mode mode = widest_int_mode_for_size (m_max_size); mode = get_usable_mode (mode, m_len); - by_pieces_prev to_prev = { nullptr, mode }; by_pieces_prev from_prev = { nullptr, mode }; diff --git a/gcc/target.def b/gcc/target.def index c3a4280b655..25dc1850e0c 100644 --- a/gcc/target.def +++ b/gcc/target.def @@ -2692,6 +2692,26 @@ DEFHOOK rtx, (rtx_insn **prep_seq, rtx_insn **gen_seq, rtx prev, int cmp_code, tree op0, tree op1, int bit_code), NULL) +DEFHOOK +(read_memset_value, + "This function returns the RTL of a constant integer corresponding to\n\ +target reading @code{GET_MODE_SIZE (@var{mode})} bytes from the stringn\n\ +constant @var{str}. If @var{prev} is not @samp{nullptr}, it contains\n\ +the RTL information from the previous interation.", + rtx, (const char *c, void *prev, scalar_int_mode mode), + default_read_memset_value) + +DEFHOOK +(gen_memset_value, + "This function returns the RTL of a register containing\n\ +@code{GET_MODE_SIZE (@var{mode})} consecutive copies of the unsigned\n\ +char value given in the RTL register @var{data}. For example, if\n\ +@var{mode} is 4 bytes wide, return the RTL for 0x01010101*@var{data}.\n\ +If @var{PREV} is not @samp{nullptr}, it is the RTL information from\n\ +the previous iteration.", + rtx, (rtx data, void *prev, scalar_int_mode mode), + default_gen_memset_value) + /* Return a new value for loop unroll size. */ DEFHOOK (loop_unroll_adjust, diff --git a/gcc/targhooks.c b/gcc/targhooks.c index 952fad422eb..e4766be6683 100644 --- a/gcc/targhooks.c +++ b/gcc/targhooks.c @@ -90,6 +90,7 @@ along with GCC; see the file COPYING3. If not see #include "attribs.h" #include "asan.h" #include "emit-rtl.h" +#include "builtins.h" bool default_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED, @@ -2547,4 +2548,57 @@ default_memtag_untagged_pointer (rtx tagged_pointer, rtx target) return untagged_base; } +/* Default implementation of TARGET_READ_MEMSET_VALUE. */ + +rtx +default_read_memset_value (const char *c, void *prevp, + scalar_int_mode mode) +{ + by_pieces_prev *prev = (by_pieces_prev *) prevp; + if (prev != nullptr && prev->data != nullptr) + { + /* Use the previous data in the same mode. */ + if (prev->mode == mode) + return prev->data; + } + + char *p = XALLOCAVEC (char, GET_MODE_SIZE (mode)); + + memset (p, *c, GET_MODE_SIZE (mode)); + + return c_readstr (p, mode); +} + +/* Default implementation of TARGET_GEN_MEMSET_VALUE. */ + +rtx +default_gen_memset_value (rtx data, void *prevp, scalar_int_mode mode) +{ + rtx target, coeff; + size_t size; + char *p; + + by_pieces_prev *prev = (by_pieces_prev *) prevp; + if (prev != nullptr && prev->data != nullptr) + { + /* Use the previous data in the same mode. */ + if (prev->mode == mode) + return prev->data; + + return simplify_gen_subreg (mode, prev->data, prev->mode, 0); + } + + size = GET_MODE_SIZE (mode); + if (size == 1) + return data; + + p = XALLOCAVEC (char, size); + memset (p, 1, size); + coeff = c_readstr (p, mode); + + target = convert_to_mode (mode, data, 1); + target = expand_mult (mode, target, coeff, NULL_RTX, 1); + return force_reg (mode, target); +} + #include "gt-targhooks.h" diff --git a/gcc/targhooks.h b/gcc/targhooks.h index 9928d064abd..c34f3f9480e 100644 --- a/gcc/targhooks.h +++ b/gcc/targhooks.h @@ -300,4 +300,8 @@ extern rtx default_memtag_set_tag (rtx, rtx, rtx); extern rtx default_memtag_extract_tag (rtx, rtx); extern rtx default_memtag_untagged_pointer (rtx, rtx); +extern rtx default_read_memset_value (const char *, void *, + scalar_int_mode); +extern rtx default_gen_memset_value (rtx, void *, scalar_int_mode); + #endif /* GCC_TARGHOOKS_H */ diff --git a/gcc/testsuite/gcc.target/i386/pr90773-15.c b/gcc/testsuite/gcc.target/i386/pr90773-15.c new file mode 100644 index 00000000000..c0a96fed892 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr90773-15.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -march=skylake-avx512" } */ + +extern char *dst; + +void +foo (int c) +{ + __builtin_memset (dst, c, 17); +} + +/* { dg-final { scan-assembler-times "vpbroadcastb\[\\t \]+%edi, %xmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]+%xmm\[0-9\]+, \\(%\[\^,\]+\\)" 1 } } */ +/* { dg-final { scan-assembler-times "movb\[\\t \]+%dil, 16\\(%\[\^,\]+\\)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr90773-16.c b/gcc/testsuite/gcc.target/i386/pr90773-16.c new file mode 100644 index 00000000000..d2d1ec6141c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr90773-16.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -march=skylake-avx512" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, -1, 17); +} + +/* { dg-final { scan-assembler-times "vpcmpeqd" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]+%xmm\[0-9\]+, \\(%\[\^,\]+\\)" 1 } } */ +/* { dg-final { scan-assembler-times "movb\[\\t \]+\\\$-1, 16\\(%\[\^,\]+\\)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr90773-17.c b/gcc/testsuite/gcc.target/i386/pr90773-17.c new file mode 100644 index 00000000000..6c8da7d24ef --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr90773-17.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -march=skylake-avx512" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 12, 19); +} + +/* { dg-final { scan-assembler-times "vpbroadcastb" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]+%xmm\[0-9\]+, \\(%\[\^,\]+\\)" 1 } } */ +/* { dg-final { scan-assembler-times "vmovd\[\\t \]+%xmm\[0-9\]+, 15\\(%\[\^,\]+\\)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr90773-18.c b/gcc/testsuite/gcc.target/i386/pr90773-18.c new file mode 100644 index 00000000000..b0687abbe01 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr90773-18.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=skylake-avx512" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 12, 9); +} + +/* { dg-final { scan-assembler-times "movabsq\[\\t \]+\\\$868082074056920076, %r" 1 { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler-times "movl\[\\t \]+\\\$202116108, \\(%\[\^,\]+\\)" 1 { target ia32 } } } */ +/* { dg-final { scan-assembler-times "movl\[\\t \]+\\\$202116108, 4\\(%\[\^,\]+\\)" 1 { target ia32 } } } */ +/* { dg-final { scan-assembler-times "movb\[\\t \]+\\\$12, 8\\(%\[\^,\]+\\)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr90773-19.c b/gcc/testsuite/gcc.target/i386/pr90773-19.c new file mode 100644 index 00000000000..8aa5540bacc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr90773-19.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=skylake" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 12, 9); +} + +/* { dg-final { scan-assembler-times "movabsq\[\\t \]+\\\$868082074056920076, %r" 1 { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler-times "movl\[\\t \]+\\\$202116108, \\(%\[\^,\]+\\)" 1 { target ia32 } } } */ +/* { dg-final { scan-assembler-times "movl\[\\t \]+\\\$202116108, 4\\(%\[\^,\]+\\)" 1 { target ia32 } } } */ From patchwork Thu Apr 29 12:54:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 1471705 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=yKnHG83F; dkim-atps=neutral Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FWFnX0fnhz9sV5 for ; Thu, 29 Apr 2021 22:54:23 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id DFDF83AA982A; Thu, 29 Apr 2021 12:54:20 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org DFDF83AA982A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1619700860; bh=b0CY/RDdelgblvBd3oQO28AEnCwcTYBsPbSPUjmm+tw=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=yKnHG83FCXlRuQd1taEUf9LPI/1FIvd4lPpcB19/bn0maLlkTBwRNrlFK1aOKsIOE 8TNnnqpj0lrDmHVLUA62mdnnDZyO0dUcovjvuLg8YxyibUZgC1+gBVtT9OYD3DfCil mQEwCQTyjQKVHgdmlp4RLf+Mf2ARelM0R2NxZ4os= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by sourceware.org (Postfix) with ESMTPS id AB8B23951C9F for ; Thu, 29 Apr 2021 12:54:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org AB8B23951C9F Received: by mail-pj1-x1029.google.com with SMTP id u14-20020a17090a1f0eb029014e38011b09so10887021pja.5 for ; Thu, 29 Apr 2021 05:54:18 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=b0CY/RDdelgblvBd3oQO28AEnCwcTYBsPbSPUjmm+tw=; b=T3lsYLSzQ1IgU98IuY3j8lETQPqb5nqe6kGSAmSuX0b4NUcm3hYeNHILDhFT79j2t0 W7emUwxgvFiElzmtQVXxFidebuxUKhmK7hS8zeQu9xUyxJ+NIfp2KFTsg8k2xrO0ZhB6 r48xIvp2neTnMHmUUZr7KG0FB0XZD80oKINir9XHRJRpHz7ywgPLGmcQV501CMt5g+Mj /UpAngFmR0APzhYViM4S2e+ZX8aKcBYmYCv3J5iyVqTl5F9TfN0C772Ii9ez3N7Yar1E W+9OpRp0hBqyze9c/eZ3s7YozcP7UCPEmMcV1B06Pdb/TvrFwmFur9yvsnkwULVhc9Me ce8g== X-Gm-Message-State: AOAM531XCZ3pWj5TROfv7O+kFotL2YM/PM7Sm0Z2F8/KNOz5oakvxWBS 9WriDt3nQM6eyRPXJemR8tR+jmNCSzqolg== X-Google-Smtp-Source: ABdhPJyCtbElaErCDLzyvB088PFXYPu/GDGclRItBVfUd3qSKxSfqMY1RoiwMwClN9Y6y3hk4iTr7g== X-Received: by 2002:a17:90b:2355:: with SMTP id ms21mr9403832pjb.226.1619700857430; Thu, 29 Apr 2021 05:54:17 -0700 (PDT) Received: from gnu-cfl-2.localdomain ([172.58.35.177]) by smtp.gmail.com with ESMTPSA id 5sm2544024pfi.43.2021.04.29.05.54.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Apr 2021 05:54:17 -0700 (PDT) Received: from gnu-cfl-2.. (localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id A13B5C04F9; Thu, 29 Apr 2021 05:54:15 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH 04/12] x86: Avoid stack realignment when copying data Date: Thu, 29 Apr 2021 05:54:07 -0700 Message-Id: <20210429125415.1634118-5-hjl.tools@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210429125415.1634118-1-hjl.tools@gmail.com> References: <20210429125415.1634118-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3035.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Gcc-patches" From: "H.J. Lu" Reply-To: "H.J. Lu" Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Pass UNITS_PER_WORD * BITS_PER_UNIT to force_reg, when copying data from one memory location to another with vector registers, to avoid stack realignment. * config/i386/i386-expand.c (ix86_expand_vector_move): Pass UNITS_PER_WORD * BITS_PER_UNIT to force_reg when copying data from one memory location to another. --- gcc/config/i386/i386-expand.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c index 1942b46efbf..b3c9b94f717 100644 --- a/gcc/config/i386/i386-expand.c +++ b/gcc/config/i386/i386-expand.c @@ -431,7 +431,12 @@ ix86_expand_vector_move (machine_mode mode, rtx operands[]) && !register_operand (op0, mode) && !register_operand (op1, mode)) { - emit_move_insn (op0, force_reg (GET_MODE (op0), op1)); + /* NB: Don't increase stack alignment requirement when forcing + operand1 into a pseudo register to copy data from one memory + location to another since it doen't require spill. */ + emit_move_insn (op0, + force_reg (GET_MODE (op0), op1, + (UNITS_PER_WORD * BITS_PER_UNIT))); return; } From patchwork Thu Apr 29 12:54:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. 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(localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id A256AC0500; Thu, 29 Apr 2021 05:54:15 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH 05/12] Remove MAX_BITSIZE_MODE_ANY_INT Date: Thu, 29 Apr 2021 05:54:08 -0700 Message-Id: <20210429125415.1634118-6-hjl.tools@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210429125415.1634118-1-hjl.tools@gmail.com> References: <20210429125415.1634118-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3035.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Gcc-patches" From: "H.J. Lu" Reply-To: "H.J. Lu" Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" It is only defined for i386 and everyone uses the default: #define MAX_BITSIZE_MODE_ANY_INT (64*BITS_PER_UNIT) Whatever problems we had before, they have been fixed now. * config/i386/i386-modes.def (MAX_BITSIZE_MODE_ANY_INT): Removed. --- gcc/config/i386/i386-modes.def | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/gcc/config/i386/i386-modes.def b/gcc/config/i386/i386-modes.def index dbddfd8e48f..4e7014be034 100644 --- a/gcc/config/i386/i386-modes.def +++ b/gcc/config/i386/i386-modes.def @@ -107,19 +107,10 @@ INT_MODE (XI, 64); PARTIAL_INT_MODE (HI, 16, P2QI); PARTIAL_INT_MODE (SI, 32, P2HI); -/* Mode used for signed overflow checking of TImode. As - MAX_BITSIZE_MODE_ANY_INT is only 160, wide-int.h reserves only that - rounded up to multiple of HOST_BITS_PER_WIDE_INT bits in wide_int etc., - so OImode is too large. For the overflow checking we actually need - just 1 or 2 bits beyond TImode precision. Use 160 bits to have - a multiple of 32. */ +/* Mode used for signed overflow checking of TImode. For the overflow + checking we actually need just 1 or 2 bits beyond TImode precision. + Use 160 bits to have a multiple of 32. */ PARTIAL_INT_MODE (OI, 160, POI); -/* Keep the OI and XI modes from confusing the compiler into thinking - that these modes could actually be used for computation. They are - only holders for vectors during data movement. Include POImode precision - though. */ -#define MAX_BITSIZE_MODE_ANY_INT (160) - /* The symbol Pmode stands for one of the above machine modes (usually SImode). The tm.h file specifies which one. It is not a distinct mode. */ From patchwork Thu Apr 29 12:54:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 1471711 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=iSCtfVhT; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FWFnx61L5z9sV5 for ; Thu, 29 Apr 2021 22:54:45 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7A3233AAAC16; Thu, 29 Apr 2021 12:54:27 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7A3233AAAC16 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1619700867; bh=Rn+N4ZblTSU8/dzenzCi4MFy11gxTPLz240t8c01rlM=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=iSCtfVhTSp9gsOhCnBBhqXCJKhXO5mXjvTGRU8jRSYrVeewAQAHLiy4kzwALeMmsA lsnp54GIyRRCGpMssMnrbopMboetlEVOD2mdvMSieXIbrItGBQDxQSyHkEDC7BTqy+ BLbk30HAxPIdGG/VJ4M1vZadi2pksbHxQ0wF0PZA= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pg1-x532.google.com (mail-pg1-x532.google.com [IPv6:2607:f8b0:4864:20::532]) by sourceware.org (Postfix) with ESMTPS id 5B2CD3958C3D for ; Thu, 29 Apr 2021 12:54:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 5B2CD3958C3D Received: by mail-pg1-x532.google.com with SMTP id z16so6153771pga.1 for ; Thu, 29 Apr 2021 05:54:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Rn+N4ZblTSU8/dzenzCi4MFy11gxTPLz240t8c01rlM=; b=LIyA2aRW0P+wIs6I62/gGGdwTpFt7ihDsIv0C5tmg+QMRxThRkhmyFnpfQLHnLuuRc QubfYE9GlHiFkEulTYyRm9YCVTT0N8Y8ZF62HDBep1Bruo2q7eECd+vhesbjV0KvyJ0y t6D95eq64SFWzQmmN5GPujC754lhIcXc1+OmUDmRXYxbCdEkkGvM42fi27BKeoA54dt0 PJEOopRWZvtIHdL7TIGq5qCeEmhnW+y/A8iavhjYtkxhKepKo1LpAWG3Q51rIpzkXsWj OKT7Rz2sVlibm/iqXDM0BnbcAbZbgCI9nwsFwugFVDP63ad3xhbkwR3Z4+6glMl2XHUF GlQg== X-Gm-Message-State: AOAM53141f+jaynGPliJKU8iSMWApekQ0h662PzJ4GPtxrTUVOLsbYy6 Ua/AAkPyP9Qc2NfK6QVhp6I8MXkXgWnYcA== X-Google-Smtp-Source: ABdhPJwxPPRyrqA/cdx+S14ejGJ5Olh0OBLwD7Wt8XzDYiOcVS7AwAu7qK/P19rxIM5ilk7k/2BQQQ== X-Received: by 2002:a63:7802:: with SMTP id t2mr23897159pgc.269.1619700860060; Thu, 29 Apr 2021 05:54:20 -0700 (PDT) Received: from gnu-cfl-2.localdomain ([172.58.35.177]) by smtp.gmail.com with ESMTPSA id t9sm2670527pgg.6.2021.04.29.05.54.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Apr 2021 05:54:19 -0700 (PDT) Received: from gnu-cfl-2.. (localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id ADA84C0530; Thu, 29 Apr 2021 05:54:15 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH 06/12] x86: Update piecewise move and store Date: Thu, 29 Apr 2021 05:54:09 -0700 Message-Id: <20210429125415.1634118-7-hjl.tools@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210429125415.1634118-1-hjl.tools@gmail.com> References: <20210429125415.1634118-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3035.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Gcc-patches" From: "H.J. Lu" Reply-To: "H.J. Lu" Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" We can use TImode/OImode/XImode integers for piecewise move and store. When vector register is used for piecewise move and store, we don't increase stack_alignment_needed since vector register spill isn't required for piecewise move and store. Since stack_realign_needed is set to true by checking stack_alignment_estimated set by pseudo vector register usage, we also need to check stack_realign_needed to eliminate frame pointer. gcc/ * config/i386/i386.c (ix86_finalize_stack_frame_flags): Also check stack_realign_needed for stack realignment. (ix86_legitimate_constant_p): Always allow CONST_WIDE_INT smaller than the largest integer supported by vector register. * config/i386/i386.h (MOVE_MAX): Set to 64. (MOVE_MAX_PIECES): Set to bytes of the largest integer supported by vector register. (STORE_MAX_PIECES): New. gcc/testsuite/ * gcc.target/i386/pr90773-1.c: Adjust to expect movq for 32-bit. * gcc.target/i386/pr90773-4.c: Also run for 32-bit. * gcc.target/i386/pr90773-14.c: Likewise. * gcc.target/i386/pr90773-15.c: Likewise. * gcc.target/i386/pr90773-16.c: Likewise. * gcc.target/i386/pr90773-17.c: Likewise. --- gcc/config/i386/i386.c | 21 ++++++++++++--- gcc/config/i386/i386.h | 31 +++++++++++++++++----- gcc/testsuite/gcc.target/i386/pr90773-1.c | 10 +++---- gcc/testsuite/gcc.target/i386/pr90773-14.c | 2 +- gcc/testsuite/gcc.target/i386/pr90773-15.c | 6 ++--- gcc/testsuite/gcc.target/i386/pr90773-16.c | 2 +- gcc/testsuite/gcc.target/i386/pr90773-17.c | 2 +- gcc/testsuite/gcc.target/i386/pr90773-4.c | 2 +- 8 files changed, 53 insertions(+), 23 deletions(-) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index e6ee3ef630a..8ae0fa764f6 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -7925,8 +7925,17 @@ ix86_finalize_stack_frame_flags (void) assumed stack realignment might be needed or -fno-omit-frame-pointer is used, but in the end nothing that needed the stack alignment had been spilled nor stack access, clear frame_pointer_needed and say we - don't need stack realignment. */ - if ((stack_realign || (!flag_omit_frame_pointer && optimize)) + don't need stack realignment. + + When vector register is used for piecewise move and store, we don't + increase stack_alignment_needed as there is no register spill for + piecewise move and store. Since stack_realign_needed is set to true + by checking stack_alignment_estimated which is updated by pseudo + vector register usage, we also need to check stack_realign_needed to + eliminate frame pointer. */ + if ((stack_realign + || (!flag_omit_frame_pointer && optimize) + || crtl->stack_realign_needed) && frame_pointer_needed && crtl->is_leaf && crtl->sp_is_unchanging @@ -10385,7 +10394,13 @@ ix86_legitimate_constant_p (machine_mode mode, rtx x) /* FALLTHRU */ case E_OImode: case E_XImode: - if (!standard_sse_constant_p (x, mode)) + if (!standard_sse_constant_p (x, mode) + && GET_MODE_SIZE (TARGET_AVX512F + ? XImode + : (TARGET_AVX + ? OImode + : (TARGET_SSE2 + ? TImode : DImode))) < GET_MODE_SIZE (mode)) return false; default: break; diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 96b46bac238..b3213f85698 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -1750,7 +1750,7 @@ typedef struct ix86_args { /* Max number of bytes we can move from memory to memory in one reasonably fast instruction. */ -#define MOVE_MAX 16 +#define MOVE_MAX 64 /* MOVE_MAX_PIECES is the number of bytes at a time which we can move efficiently, as opposed to MOVE_MAX which is the maximum @@ -1761,11 +1761,30 @@ typedef struct ix86_args { widest mode with MAX_FIXED_MODE_SIZE, we can only use TImode in 64-bit mode. */ #define MOVE_MAX_PIECES \ - ((TARGET_64BIT \ - && TARGET_SSE2 \ - && TARGET_SSE_UNALIGNED_LOAD_OPTIMAL \ - && TARGET_SSE_UNALIGNED_STORE_OPTIMAL) \ - ? GET_MODE_SIZE (TImode) : UNITS_PER_WORD) + ((TARGET_AVX512F && !TARGET_PREFER_AVX256) \ + ? 64 \ + : ((TARGET_AVX \ + && !TARGET_PREFER_AVX128 \ + && !TARGET_AVX256_SPLIT_UNALIGNED_LOAD \ + && !TARGET_AVX256_SPLIT_UNALIGNED_STORE) \ + ? 32 \ + : ((TARGET_SSE2 \ + && TARGET_SSE_UNALIGNED_LOAD_OPTIMAL \ + && TARGET_SSE_UNALIGNED_STORE_OPTIMAL) \ + ? 16 : UNITS_PER_WORD))) + +/* STORE_MAX_PIECES is the number of bytes at a time that we can + store efficiently. */ +#define STORE_MAX_PIECES \ + ((TARGET_AVX512F && !TARGET_PREFER_AVX256) \ + ? 64 \ + : ((TARGET_AVX \ + && !TARGET_PREFER_AVX128 \ + && !TARGET_AVX256_SPLIT_UNALIGNED_STORE) \ + ? 32 \ + : ((TARGET_SSE2 \ + && TARGET_SSE_UNALIGNED_STORE_OPTIMAL) \ + ? 16 : UNITS_PER_WORD))) /* If a memory-to-memory move would take MOVE_RATIO or more simple move-instruction pairs, we will do a cpymem or libcall instead. diff --git a/gcc/testsuite/gcc.target/i386/pr90773-1.c b/gcc/testsuite/gcc.target/i386/pr90773-1.c index 1d9f282dc0d..4fd5a40d99d 100644 --- a/gcc/testsuite/gcc.target/i386/pr90773-1.c +++ b/gcc/testsuite/gcc.target/i386/pr90773-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -mtune=generic" } */ +/* { dg-options "-O2 -msse2 -mtune=generic" } */ extern char *dst, *src; @@ -9,9 +9,5 @@ foo (void) __builtin_memcpy (dst, src, 15); } -/* { dg-final { scan-assembler-times "movq\[\\t \]+\\(%\[\^,\]+\\)," 1 { target { ! ia32 } } } } */ -/* { dg-final { scan-assembler-times "movq\[\\t \]+7\\(%\[\^,\]+\\)," 1 { target { ! ia32 } } } } */ -/* { dg-final { scan-assembler-times "movl\[\\t \]+\\(%\[\^,\]+\\)," 1 { target ia32 } } } */ -/* { dg-final { scan-assembler-times "movl\[\\t \]+4\\(%\[\^,\]+\\)," 1 { target ia32 } } } */ -/* { dg-final { scan-assembler-times "movl\[\\t \]+8\\(%\[\^,\]+\\)," 1 { target ia32 } } } */ -/* { dg-final { scan-assembler-times "movl\[\\t \]+11\\(%\[\^,\]+\\)," 1 { target ia32 } } } */ +/* { dg-final { scan-assembler-times "movq\[\\t \]+\\(%\[\^,\]+\\)," 1 } } */ +/* { dg-final { scan-assembler-times "movq\[\\t \]+7\\(%\[\^,\]+\\)," 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr90773-14.c b/gcc/testsuite/gcc.target/i386/pr90773-14.c index 6364916ecac..74ba5055960 100644 --- a/gcc/testsuite/gcc.target/i386/pr90773-14.c +++ b/gcc/testsuite/gcc.target/i386/pr90773-14.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-do compile } */ /* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */ extern char *dst; diff --git a/gcc/testsuite/gcc.target/i386/pr90773-15.c b/gcc/testsuite/gcc.target/i386/pr90773-15.c index c0a96fed892..880f71d1567 100644 --- a/gcc/testsuite/gcc.target/i386/pr90773-15.c +++ b/gcc/testsuite/gcc.target/i386/pr90773-15.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-do compile } */ /* { dg-options "-O2 -march=skylake-avx512" } */ extern char *dst; @@ -9,6 +9,6 @@ foo (int c) __builtin_memset (dst, c, 17); } -/* { dg-final { scan-assembler-times "vpbroadcastb\[\\t \]+%edi, %xmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vpbroadcastb\[\\t \]+%.*, %xmm\[0-9\]+" 1 } } */ /* { dg-final { scan-assembler-times "vmovdqu\[\\t \]+%xmm\[0-9\]+, \\(%\[\^,\]+\\)" 1 } } */ -/* { dg-final { scan-assembler-times "movb\[\\t \]+%dil, 16\\(%\[\^,\]+\\)" 1 } } */ +/* { dg-final { scan-assembler-times "movb\[\\t \]+%.*, 16\\(%\[\^,\]+\\)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr90773-16.c b/gcc/testsuite/gcc.target/i386/pr90773-16.c index d2d1ec6141c..32a976b10df 100644 --- a/gcc/testsuite/gcc.target/i386/pr90773-16.c +++ b/gcc/testsuite/gcc.target/i386/pr90773-16.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-do compile } */ /* { dg-options "-O2 -march=skylake-avx512" } */ extern char *dst; diff --git a/gcc/testsuite/gcc.target/i386/pr90773-17.c b/gcc/testsuite/gcc.target/i386/pr90773-17.c index 6c8da7d24ef..2d6fbf22a8b 100644 --- a/gcc/testsuite/gcc.target/i386/pr90773-17.c +++ b/gcc/testsuite/gcc.target/i386/pr90773-17.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-do compile } */ /* { dg-options "-O2 -march=skylake-avx512" } */ extern char *dst; diff --git a/gcc/testsuite/gcc.target/i386/pr90773-4.c b/gcc/testsuite/gcc.target/i386/pr90773-4.c index ec0bc0100ae..ee4c04678d1 100644 --- a/gcc/testsuite/gcc.target/i386/pr90773-4.c +++ b/gcc/testsuite/gcc.target/i386/pr90773-4.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-do compile } */ /* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */ extern char *dst; From patchwork Thu Apr 29 12:54:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. 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(localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id BA0E9C08A2; Thu, 29 Apr 2021 05:54:15 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH 07/12] x86: Add AVX2 tests for PR middle-end/90773 Date: Thu, 29 Apr 2021 05:54:10 -0700 Message-Id: <20210429125415.1634118-8-hjl.tools@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210429125415.1634118-1-hjl.tools@gmail.com> References: <20210429125415.1634118-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3035.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Gcc-patches" From: "H.J. Lu" Reply-To: "H.J. Lu" Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" PR middle-end/90773 * gcc.target/i386/pr90773-20.c: New test. * gcc.target/i386/pr90773-21.c: Likewise. * gcc.target/i386/pr90773-22.c: Likewise. * gcc.target/i386/pr90773-23.c: Likewise. --- gcc/testsuite/gcc.target/i386/pr90773-20.c | 13 +++++++++++++ gcc/testsuite/gcc.target/i386/pr90773-21.c | 13 +++++++++++++ gcc/testsuite/gcc.target/i386/pr90773-22.c | 13 +++++++++++++ gcc/testsuite/gcc.target/i386/pr90773-23.c | 13 +++++++++++++ 4 files changed, 52 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr90773-20.c create mode 100644 gcc/testsuite/gcc.target/i386/pr90773-21.c create mode 100644 gcc/testsuite/gcc.target/i386/pr90773-22.c create mode 100644 gcc/testsuite/gcc.target/i386/pr90773-23.c diff --git a/gcc/testsuite/gcc.target/i386/pr90773-20.c b/gcc/testsuite/gcc.target/i386/pr90773-20.c new file mode 100644 index 00000000000..e61e405f2b6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr90773-20.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=skylake" } */ + +extern char *dst; + +void +foo (int c) +{ + __builtin_memset (dst, c, 33); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, \\(%\[\^,\]+\\)" 1 } } */ +/* { dg-final { scan-assembler-times "movb\[\\t \]+.+, 32\\(%\[\^,\]+\\)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr90773-21.c b/gcc/testsuite/gcc.target/i386/pr90773-21.c new file mode 100644 index 00000000000..16ad17f3cbb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr90773-21.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=skylake" } */ + +extern char *dst; + +void +foo (int c) +{ + __builtin_memset (dst, c, 34); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, \\(%\[\^,\]+\\)" 1 } } */ +/* { dg-final { scan-assembler-times "movw\[\\t \]%.*, 32\\(%\[\^,\]+\\)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr90773-22.c b/gcc/testsuite/gcc.target/i386/pr90773-22.c new file mode 100644 index 00000000000..45a8ff65a84 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr90773-22.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=skylake" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 0, 33); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, \\(%\[\^,\]+\\)" 1 } } */ +/* { dg-final { scan-assembler-times "movb\[\\t \]+.+, 32\\(%\[\^,\]+\\)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr90773-23.c b/gcc/testsuite/gcc.target/i386/pr90773-23.c new file mode 100644 index 00000000000..9256ce10ff0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr90773-23.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=skylake" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 0, 34); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, \\(%\[\^,\]+\\)" 1 } } */ +/* { dg-final { scan-assembler-times "movw\[\\t \]+.+, 32\\(%\[\^,\]+\\)" 1 } } */ From patchwork Thu Apr 29 12:54:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. 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(localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id CAB45C120C; Thu, 29 Apr 2021 05:54:15 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH 08/12] x86: Add tests for piecewise move and store Date: Thu, 29 Apr 2021 05:54:11 -0700 Message-Id: <20210429125415.1634118-9-hjl.tools@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210429125415.1634118-1-hjl.tools@gmail.com> References: <20210429125415.1634118-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3035.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SCC_5_SHORT_WORD_LINES, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Gcc-patches" From: "H.J. Lu" Reply-To: "H.J. Lu" Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" * gcc.target/i386/pieces-memcpy-10.c: New test. * gcc.target/i386/pieces-memcpy-11.c: Likewise. * gcc.target/i386/pieces-memcpy-12.c: Likewise. * gcc.target/i386/pieces-memcpy-13.c: Likewise. * gcc.target/i386/pieces-memcpy-14.c: Likewise. * gcc.target/i386/pieces-memcpy-15.c: Likewise. * gcc.target/i386/pieces-memcpy-16.c: Likewise. * gcc.target/i386/pieces-memcpy-17.c: Likewise. * gcc.target/i386/pieces-memcpy-18.c: Likewise. * gcc.target/i386/pieces-memcpy-19.c: Likewise. * gcc.target/i386/pieces-memset-1.c: Likewise. * gcc.target/i386/pieces-memset-2.c: Likewise. * gcc.target/i386/pieces-memset-3.c: Likewise. * gcc.target/i386/pieces-memset-4.c: Likewise. * gcc.target/i386/pieces-memset-5.c: Likewise. * gcc.target/i386/pieces-memset-6.c: Likewise. * gcc.target/i386/pieces-memset-7.c: Likewise. * gcc.target/i386/pieces-memset-8.c: Likewise. * gcc.target/i386/pieces-memset-9.c: Likewise. * gcc.target/i386/pieces-memset-10.c: Likewise. * gcc.target/i386/pieces-memset-11.c: Likewise. * gcc.target/i386/pieces-memset-12.c: Likewise. * gcc.target/i386/pieces-memset-13.c: Likewise. * gcc.target/i386/pieces-memset-14.c: Likewise. * gcc.target/i386/pieces-memset-15.c: Likewise. * gcc.target/i386/pieces-memset-16.c: Likewise. * gcc.target/i386/pieces-memset-17.c: Likewise. * gcc.target/i386/pieces-memset-18.c: Likewise. * gcc.target/i386/pieces-memset-19.c: Likewise. * gcc.target/i386/pieces-memset-20.c: Likewise. * gcc.target/i386/pieces-memset-21.c: Likewise. * gcc.target/i386/pieces-memset-22.c: Likewise. * gcc.target/i386/pieces-memset-23.c: Likewise. * gcc.target/i386/pieces-memset-24.c: Likewise. * gcc.target/i386/pieces-memset-25.c: Likewise. * gcc.target/i386/pieces-memset-26.c: Likewise. * gcc.target/i386/pieces-memset-27.c: Likewise. * gcc.target/i386/pieces-memset-28.c: Likewise. * gcc.target/i386/pieces-memset-29.c: Likewise. * gcc.target/i386/pieces-memset-30.c: Likewise. * gcc.target/i386/pieces-memset-31.c: Likewise. * gcc.target/i386/pieces-memset-32.c: Likewise. * gcc.target/i386/pieces-memset-33.c: Likewise. * gcc.target/i386/pieces-memset-34.c: Likewise. * gcc.target/i386/pieces-memset-35.c: Likewise. * gcc.target/i386/pieces-memset-36.c: Likewise. * gcc.target/i386/pieces-memset-37.c: Likewise. * gcc.target/i386/pieces-memset-38.c: Likewise. * gcc.target/i386/pieces-memset-39.c: Likewise. * gcc.target/i386/pieces-memset-40.c: Likewise. * gcc.target/i386/pieces-memset-41.c: Likewise. * gcc.target/i386/pieces-memset-42.c: Likewise. * gcc.target/i386/pieces-memset-43.c: Likewise. * gcc.target/i386/pieces-memset-44.c: Likewise. --- .../gcc.target/i386/pieces-memcpy-10.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memcpy-11.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memcpy-12.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memcpy-13.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memcpy-14.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memcpy-15.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memcpy-16.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memcpy-7.c | 15 +++++++++++++++ .../gcc.target/i386/pieces-memcpy-8.c | 14 ++++++++++++++ .../gcc.target/i386/pieces-memcpy-9.c | 14 ++++++++++++++ .../gcc.target/i386/pieces-memset-1.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memset-10.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memset-11.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memset-12.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memset-13.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memset-14.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memset-15.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memset-16.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memset-17.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memset-18.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memset-19.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-2.c | 12 ++++++++++++ .../gcc.target/i386/pieces-memset-20.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-21.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-22.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-23.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-24.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-25.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-26.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-27.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-28.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-29.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-3.c | 18 ++++++++++++++++++ .../gcc.target/i386/pieces-memset-30.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-31.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-32.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-33.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-34.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-35.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-36.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-37.c | 15 +++++++++++++++ .../gcc.target/i386/pieces-memset-38.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-39.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memset-4.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memset-40.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-41.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memset-42.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-43.c | 17 +++++++++++++++++ .../gcc.target/i386/pieces-memset-5.c | 12 ++++++++++++ .../gcc.target/i386/pieces-memset-6.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memset-7.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memset-8.c | 16 ++++++++++++++++ .../gcc.target/i386/pieces-memset-9.c | 16 ++++++++++++++++ 53 files changed, 860 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memcpy-10.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memcpy-11.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memcpy-12.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memcpy-13.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memcpy-14.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memcpy-15.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memcpy-16.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memcpy-7.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memcpy-8.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memcpy-9.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-10.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-11.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-12.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-13.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-14.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-15.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-16.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-17.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-18.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-19.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-20.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-21.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-22.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-23.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-24.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-25.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-26.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-27.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-28.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-29.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-3.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-30.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-31.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-32.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-33.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-34.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-35.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-36.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-37.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-38.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-39.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-4.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-40.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-41.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-42.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-43.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-5.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-6.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-7.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-8.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-9.c diff --git a/gcc/testsuite/gcc.target/i386/pieces-memcpy-10.c b/gcc/testsuite/gcc.target/i386/pieces-memcpy-10.c new file mode 100644 index 00000000000..5faee21f9b9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memcpy-10.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=sandybridge" } */ + +extern char *dst, *src; + +void +foo (void) +{ + __builtin_memcpy (dst, src, 33); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%xmm" 4 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memcpy-11.c b/gcc/testsuite/gcc.target/i386/pieces-memcpy-11.c new file mode 100644 index 00000000000..b8917a7f917 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memcpy-11.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */ + +extern char *dst, *src; + +void +foo (void) +{ + __builtin_memcpy (dst, src, 64); +} + +/* { dg-final { scan-assembler-times "movdqu\[ \\t\]+\[^\n\]*%xmm" 4 } } */ +/* { dg-final { scan-assembler-times "movups\[ \\t\]+\[^\n\]*%xmm" 4 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memcpy-12.c b/gcc/testsuite/gcc.target/i386/pieces-memcpy-12.c new file mode 100644 index 00000000000..f1432ebe517 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memcpy-12.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=haswell" } */ + +extern char *dst, *src; + +void +foo (void) +{ + __builtin_memcpy (dst, src, 64); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 4 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memcpy-13.c b/gcc/testsuite/gcc.target/i386/pieces-memcpy-13.c new file mode 100644 index 00000000000..97e6067fec9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memcpy-13.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f -mtune=generic" } */ + +extern char *dst, *src; + +void +foo (void) +{ + __builtin_memcpy (dst, src, 66); +} + +/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*%zmm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memcpy-14.c b/gcc/testsuite/gcc.target/i386/pieces-memcpy-14.c new file mode 100644 index 00000000000..7addc4c0a28 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memcpy-14.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */ + +extern char *dst, *src; + +void +foo (void) +{ + __builtin_memcpy (dst, src, 33); +} + +/* { dg-final { scan-assembler-times "movdqu\[ \\t\]+\[^\n\]*%xmm" 2 } } */ +/* { dg-final { scan-assembler-times "movups\[ \\t\]+\[^\n\]*%xmm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memcpy-15.c b/gcc/testsuite/gcc.target/i386/pieces-memcpy-15.c new file mode 100644 index 00000000000..695e8c3fa67 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memcpy-15.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=haswell" } */ + +extern char *dst, *src; + +void +foo (void) +{ + __builtin_memcpy (dst, src, 33); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memcpy-16.c b/gcc/testsuite/gcc.target/i386/pieces-memcpy-16.c new file mode 100644 index 00000000000..b0643d05ee7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memcpy-16.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f -mtune=generic" } */ + +extern char *dst, *src; + +void +foo (void) +{ + __builtin_memcpy (dst, src, 34); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memcpy-7.c b/gcc/testsuite/gcc.target/i386/pieces-memcpy-7.c new file mode 100644 index 00000000000..3d248d447ea --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memcpy-7.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */ + +void +foo (int a1, int a2, int a3, int a4, int a5, int a6, char *dst, char *src) +{ + __builtin_memcpy (dst, src, 17); +} + +/* { dg-final { scan-assembler-times "movdqu\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "movups\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memcpy-8.c b/gcc/testsuite/gcc.target/i386/pieces-memcpy-8.c new file mode 100644 index 00000000000..c13a2beb2f0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memcpy-8.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=generic" } */ + +void +foo (int a1, int a2, int a3, int a4, int a5, int a6, char *dst, char *src) +{ + __builtin_memcpy (dst, src, 18); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%xmm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memcpy-9.c b/gcc/testsuite/gcc.target/i386/pieces-memcpy-9.c new file mode 100644 index 00000000000..238f88b275e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memcpy-9.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f -mtune=generic" } */ + +void +foo (int a1, int a2, int a3, int a4, int a5, int a6, char *dst, char *src) +{ + __builtin_memcpy (dst, src, 19); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%xmm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-1.c b/gcc/testsuite/gcc.target/i386/pieces-memset-1.c new file mode 100644 index 00000000000..2b8032684b3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */ + +extern char *dst; + +void +foo (int x) +{ + __builtin_memset (dst, x, 64); +} + +/* { dg-final { scan-assembler-times "movups\[ \\t\]+\[^\n\]*%xmm" 4 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-10.c b/gcc/testsuite/gcc.target/i386/pieces-memset-10.c new file mode 100644 index 00000000000..a6390d1bd8f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-10.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 3, 64); +} + +/* { dg-final { scan-assembler-times "movups\[ \\t\]+\[^\n\]*%xmm" 4 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-11.c b/gcc/testsuite/gcc.target/i386/pieces-memset-11.c new file mode 100644 index 00000000000..3fb9038b04f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-11.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=haswell" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 3, 64); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-12.c b/gcc/testsuite/gcc.target/i386/pieces-memset-12.c new file mode 100644 index 00000000000..fa834566097 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-12.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 3, 66); +} + +/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*%zmm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-13.c b/gcc/testsuite/gcc.target/i386/pieces-memset-13.c new file mode 100644 index 00000000000..7f2cd3f58ec --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-13.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 3, 33); +} + +/* { dg-final { scan-assembler-times "movups\[ \\t\]+\[^\n\]*%xmm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-14.c b/gcc/testsuite/gcc.target/i386/pieces-memset-14.c new file mode 100644 index 00000000000..45ece482464 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-14.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=haswell" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 3, 33); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-15.c b/gcc/testsuite/gcc.target/i386/pieces-memset-15.c new file mode 100644 index 00000000000..bddf47d728e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-15.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 3, 33); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-16.c b/gcc/testsuite/gcc.target/i386/pieces-memset-16.c new file mode 100644 index 00000000000..1c5d124cecc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-16.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 3, 17); +} + +/* { dg-final { scan-assembler-times "movups\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-17.c b/gcc/testsuite/gcc.target/i386/pieces-memset-17.c new file mode 100644 index 00000000000..6cdb33557c0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-17.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 3, 17); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-18.c b/gcc/testsuite/gcc.target/i386/pieces-memset-18.c new file mode 100644 index 00000000000..adbd201b4e7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-18.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 3, 18); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-19.c b/gcc/testsuite/gcc.target/i386/pieces-memset-19.c new file mode 100644 index 00000000000..7e9cf2e26d8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-19.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 0, 64); +} + +/* { dg-final { scan-assembler-times "pxor\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "movups\[ \\t\]+\[^\n\]*%xmm" 4 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-2.c b/gcc/testsuite/gcc.target/i386/pieces-memset-2.c new file mode 100644 index 00000000000..649f344e8f6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-2.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=haswell" } */ + +extern char *dst; + +void +foo (int x) +{ + __builtin_memset (dst, x, 64); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 2 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-20.c b/gcc/testsuite/gcc.target/i386/pieces-memset-20.c new file mode 100644 index 00000000000..b8747e669e8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-20.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=haswell" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 0, 64); +} + +/* { dg-final { scan-assembler-times "vpxor\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-21.c b/gcc/testsuite/gcc.target/i386/pieces-memset-21.c new file mode 100644 index 00000000000..4f001c6d06c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-21.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 0, 66); +} + +/* { dg-final { scan-assembler-times "vpxor\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*%zmm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-22.c b/gcc/testsuite/gcc.target/i386/pieces-memset-22.c new file mode 100644 index 00000000000..5f3c454ef8f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-22.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 0, 33); +} + +/* { dg-final { scan-assembler-times "pxor\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "movups\[ \\t\]+\[^\n\]*%xmm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-23.c b/gcc/testsuite/gcc.target/i386/pieces-memset-23.c new file mode 100644 index 00000000000..a3b4ffc18e0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-23.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=haswell" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 0, 33); +} + +/* { dg-final { scan-assembler-times "vpxor\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-24.c b/gcc/testsuite/gcc.target/i386/pieces-memset-24.c new file mode 100644 index 00000000000..e222787b541 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-24.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 0, 33); +} + +/* { dg-final { scan-assembler-times "vpxor\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-25.c b/gcc/testsuite/gcc.target/i386/pieces-memset-25.c new file mode 100644 index 00000000000..195ddb635eb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-25.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 0, 17); +} + +/* { dg-final { scan-assembler-times "pxor\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "movups\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-26.c b/gcc/testsuite/gcc.target/i386/pieces-memset-26.c new file mode 100644 index 00000000000..13606b2da54 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-26.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 0, 17); +} + +/* { dg-final { scan-assembler-times "pxor\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-27.c b/gcc/testsuite/gcc.target/i386/pieces-memset-27.c new file mode 100644 index 00000000000..54a672b6015 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-27.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 0, 17); +} + +/* { dg-final { scan-assembler-times "pxor\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-28.c b/gcc/testsuite/gcc.target/i386/pieces-memset-28.c new file mode 100644 index 00000000000..83c2d3f0fde --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-28.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, -1, 64); +} + +/* { dg-final { scan-assembler-times "pcmpeqd\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "movups\[ \\t\]+\[^\n\]*%xmm" 4 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-29.c b/gcc/testsuite/gcc.target/i386/pieces-memset-29.c new file mode 100644 index 00000000000..650e6fe66a5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-29.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=haswell" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, -1, 64); +} + +/* { dg-final { scan-assembler-not "vpcmpeqd\[ \\t\]+\[^\n\]*%ymm" } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-3.c b/gcc/testsuite/gcc.target/i386/pieces-memset-3.c new file mode 100644 index 00000000000..2aed6dbc68e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-3.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx512bw -mno-avx512vl -mavx512f -mtune=intel" } */ + +extern char *dst; + +void +foo (int x) +{ + __builtin_memset (dst, x, 66); +} + +/* { dg-final { scan-assembler-times "vpbroadcastb\[ \\t\]+\[^\n\]*%ymm" 1 } } */ +/* { dg-final { scan-assembler-times "vinserti64x4\[ \\t\]+\[^\n\]*%zmm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*%zmm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-30.c b/gcc/testsuite/gcc.target/i386/pieces-memset-30.c new file mode 100644 index 00000000000..dcec2c700fc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-30.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx512f -mavx2 -mtune=haswell" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, -1, 64); +} + +/* { dg-final { scan-assembler-times "vpcmpeqd\[ \\t\]+\[^\n\]*%ymm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-31.c b/gcc/testsuite/gcc.target/i386/pieces-memset-31.c new file mode 100644 index 00000000000..5d20af0938d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-31.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, -1, 66); +} + +/* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\[^\n\]*%zmm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*%zmm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-32.c b/gcc/testsuite/gcc.target/i386/pieces-memset-32.c new file mode 100644 index 00000000000..c5ca0bd17ba --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-32.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, -1, 33); +} + +/* { dg-final { scan-assembler-times "pcmpeqd\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "movups\[ \\t\]+\[^\n\]*%xmm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-33.c b/gcc/testsuite/gcc.target/i386/pieces-memset-33.c new file mode 100644 index 00000000000..a87d1b80ae6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-33.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=haswell" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, -1, 33); +} + +/* { dg-final { scan-assembler-not "vpcmpeqd\[ \\t\]+\[^\n\]*%ymm" } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-34.c b/gcc/testsuite/gcc.target/i386/pieces-memset-34.c new file mode 100644 index 00000000000..0c2f1ee6049 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-34.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx512f -mavx2 -mtune=haswell" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, -1, 33); +} + +/* { dg-final { scan-assembler-times "vpcmpeqd\[ \\t\]+\[^\n\]*%ymm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-35.c b/gcc/testsuite/gcc.target/i386/pieces-memset-35.c new file mode 100644 index 00000000000..b0f4a8b898e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-35.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f -mtune=generic" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, -1, 34); +} + +/* { dg-final { scan-assembler-times "vpcmpeqd\[ \\t\]+\[^\n\]*%ymm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-36.c b/gcc/testsuite/gcc.target/i386/pieces-memset-36.c new file mode 100644 index 00000000000..d1f1263c7b2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-36.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx512f -mavx2 -mtune=generic" } */ + +extern char *dst; + +void +foo (int x) +{ + __builtin_memset (dst, x, 17); +} + +/* { dg-final { scan-assembler-times "vpbroadcastb\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-37.c b/gcc/testsuite/gcc.target/i386/pieces-memset-37.c new file mode 100644 index 00000000000..ec59497b116 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-37.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx512f -mavx2 -mtune=generic" } */ + +void +foo (int a1, int a2, int a3, int a4, int a5, int a6, int x, char *dst) +{ + __builtin_memset (dst, x, 66); +} + +/* { dg-final { scan-assembler-times "vpbroadcastb\[ \\t\]+\[^\n\]*%ymm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-38.c b/gcc/testsuite/gcc.target/i386/pieces-memset-38.c new file mode 100644 index 00000000000..ed4a24a54fd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-38.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx512f -mavx2 -mtune=sandybridge" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, -1, 33); +} + +/* { dg-final { scan-assembler-times "vpcmpeqd\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%xmm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-39.c b/gcc/testsuite/gcc.target/i386/pieces-memset-39.c new file mode 100644 index 00000000000..a330bff5f3f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-39.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mtune=generic" } */ + +void +foo (int a1, int a2, int a3, int a4, int a5, int a6, int x, char *dst) +{ + __builtin_memset (dst, x, 66); +} + +/* { dg-final { scan-assembler-times "vpbroadcastb\[ \\t\]+\[^\n\]*%zmm" 1 } } */ +/* { dg-final { scan-assembler-not "vinserti64x4" } } */ +/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*%zmm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-4.c b/gcc/testsuite/gcc.target/i386/pieces-memset-4.c new file mode 100644 index 00000000000..9256919bfdf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-4.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */ + +extern char *dst; + +void +foo (int x) +{ + __builtin_memset (dst, x, 33); +} + +/* { dg-final { scan-assembler-times "movups\[ \\t\]+\[^\n\]*%xmm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-40.c b/gcc/testsuite/gcc.target/i386/pieces-memset-40.c new file mode 100644 index 00000000000..4eda73ead59 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-40.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx512f -mavx2 -mtune=sandybridge" } */ + +extern char *dst; + +void +foo (int x) +{ + __builtin_memset (dst, x, 66); +} + +/* { dg-final { scan-assembler-times "vpbroadcastb\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%xmm" 4 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-41.c b/gcc/testsuite/gcc.target/i386/pieces-memset-41.c new file mode 100644 index 00000000000..f86b6986da9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-41.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=sandybridge" } */ + +extern char *dst; + +void +foo (int x) +{ + __builtin_memset (dst, x, 33); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%xmm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-42.c b/gcc/testsuite/gcc.target/i386/pieces-memset-42.c new file mode 100644 index 00000000000..df0c122aae7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-42.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=sandybridge" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, 0, 33); +} + +/* { dg-final { scan-assembler-times "vpxor\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%xmm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-43.c b/gcc/testsuite/gcc.target/i386/pieces-memset-43.c new file mode 100644 index 00000000000..2f2179c2df9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-43.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=sandybridge" } */ + +extern char *dst; + +void +foo (void) +{ + __builtin_memset (dst, -1, 33); +} + +/* { dg-final { scan-assembler-times "vpcmpeqd\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%xmm" 2 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-5.c b/gcc/testsuite/gcc.target/i386/pieces-memset-5.c new file mode 100644 index 00000000000..3e95db5efef --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-5.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=haswell" } */ + +extern char *dst; + +void +foo (int x) +{ + __builtin_memset (dst, x, 33); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-6.c b/gcc/testsuite/gcc.target/i386/pieces-memset-6.c new file mode 100644 index 00000000000..571113c3a33 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-6.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f -mtune=intel" } */ + +extern char *dst; + +void +foo (int x) +{ + __builtin_memset (dst, x, 33); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-7.c b/gcc/testsuite/gcc.target/i386/pieces-memset-7.c new file mode 100644 index 00000000000..fd159869817 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-7.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */ + +extern char *dst; + +void +foo (int x) +{ + __builtin_memset (dst, x, 17); +} + +/* { dg-final { scan-assembler-times "movups\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-8.c b/gcc/testsuite/gcc.target/i386/pieces-memset-8.c new file mode 100644 index 00000000000..7df0019ef63 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-8.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-avx2 -mavx -mtune=generic" } */ + +extern char *dst; + +void +foo (int x) +{ + __builtin_memset (dst, x, 17); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-9.c b/gcc/testsuite/gcc.target/i386/pieces-memset-9.c new file mode 100644 index 00000000000..ed45d590875 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pieces-memset-9.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f -mtune=generic" } */ + +extern char *dst; + +void +foo (int x) +{ + __builtin_memset (dst, x, 17); +} + +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%xmm" 1 } } */ +/* No need to dynamically realign the stack here. */ +/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */ +/* Nor use a frame pointer. */ +/* { dg-final { scan-assembler-not "%\[re\]bp" } } */ From patchwork Thu Apr 29 12:54:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 1471713 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=GrxSkRnh; dkim-atps=neutral Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FWFp65sQNz9sV5 for ; Thu, 29 Apr 2021 22:54:54 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id AB5913AAA0FF; Thu, 29 Apr 2021 12:54:28 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org AB5913AAA0FF DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1619700868; bh=ENotfVzOqfEByeldXwpp9YMmurkGloeiY9w3RKYfh0Y=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=GrxSkRnhb4yxvfdlNOjRmA6nZ044b1o59CSFYaEIRKnSjLC3M8uoVWm/fYrQasAq1 kk6fE8wixJDPxYj5BFo/WiYaBWdoovjIm63lSSqA72a/xi7cqb5EFTRkWKdpPvrufy k4JGggjrS+3BSmmeOt2jvezSgxzjjSjLyBvT+/Ig= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by sourceware.org (Postfix) with ESMTPS id C9C773992436 for ; Thu, 29 Apr 2021 12:54:22 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org C9C773992436 Received: by mail-pj1-x102e.google.com with SMTP id md17so7153517pjb.0 for ; Thu, 29 Apr 2021 05:54:22 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ENotfVzOqfEByeldXwpp9YMmurkGloeiY9w3RKYfh0Y=; b=DKneFRKXbWRXFOePMhchZkfW4HAFzXLJBimxCTff7xOnWcbb4X9fy+dCwMDVEgP50r rPHgZQzrjJ54yjTl78PdTyznHp06bdXmqKt+rVF5zckp8o8yVWxgSRwPkZ70/if+PKRV qG3/CS2GgmJoL2892jCgTun8fVI9nc1AS4VoB460CHQeMb2kWxEmOByJtIAWHKpDvEiE EM7BtHCzTcC7+k2r4YTc2SXSivgc9Q8a5vnysHdtt0X7at4j25/RTL8Nr9LeEhllqWQc zrEDRmCNK0R/PJHEU4huIklLNByWi1DVpxDhPy8dskGCEnLjqzIOHDuac3CMRdnIQFu/ uLnA== X-Gm-Message-State: AOAM5306bZjwxGQUXPSUAqsIOiljBNqL0eNjokdBpQ0X7Jt9YjFJg1Hz kF3asi0CXsuAnqI56kM5xs88GQqCIqQd/Q== X-Google-Smtp-Source: ABdhPJyXV/OwB/9uPkdek4IRP+4Blu2beCLOUVSR+/riMrar8PRlfzcKgaL0+h0/asV8SB2YZ3DHMQ== X-Received: by 2002:a17:90a:510d:: with SMTP id t13mr8460331pjh.1.1619700861658; Thu, 29 Apr 2021 05:54:21 -0700 (PDT) Received: from gnu-cfl-2.localdomain ([172.58.35.177]) by smtp.gmail.com with ESMTPSA id z62sm2408157pfb.110.2021.04.29.05.54.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Apr 2021 05:54:19 -0700 (PDT) Received: from gnu-cfl-2.. (localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id DB989C1221; Thu, 29 Apr 2021 05:54:15 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH 09/12] x86: Also pass -mno-avx to pr72839.c Date: Thu, 29 Apr 2021 05:54:12 -0700 Message-Id: <20210429125415.1634118-10-hjl.tools@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210429125415.1634118-1-hjl.tools@gmail.com> References: <20210429125415.1634118-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3035.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Gcc-patches" From: "H.J. Lu" Reply-To: "H.J. Lu" Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Also pass -mno-avx to pr72839.c to avoid copying data with YMM or ZMM registers. * gcc.target/i386/pr72839.c: Also pass -mno-avx. --- gcc/testsuite/gcc.target/i386/pr72839.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/i386/pr72839.c b/gcc/testsuite/gcc.target/i386/pr72839.c index ea724f70377..6888d9d0a55 100644 --- a/gcc/testsuite/gcc.target/i386/pr72839.c +++ b/gcc/testsuite/gcc.target/i386/pr72839.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target ia32 } */ -/* { dg-options "-O2 -mtune=lakemont" } */ +/* { dg-options "-O2 -mtune=lakemont -mno-avx" } */ extern char *strcpy (char *, const char *); From patchwork Thu Apr 29 12:54:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 1471715 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=hAXLX6mI; dkim-atps=neutral Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FWFpG6Rmxz9sV5 for ; Thu, 29 Apr 2021 22:55:02 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E01E13AAAC19; Thu, 29 Apr 2021 12:54:29 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E01E13AAAC19 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1619700869; bh=D4MnHi1mj3glD9Vfr6FolEqRXQ6tjURJUTC7jpkCipo=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=hAXLX6mIgu6iFlu6w/GxTzJR9aW4Vkffe7m90UHBUTw0vLCsRm6F7XNOB/IpGnAyz z/GKbCvwMXCyi13jeuV7D5d8tJchNPO1oT2Zq5g+wapCOOVXTZxlG6EOkpxmSKhtMX +4EHiVDvHZKmpOA0gENOyatntUPzf2i92+ScfBcI= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by sourceware.org (Postfix) with ESMTPS id 025AD3AAAC0B for ; Thu, 29 Apr 2021 12:54:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 025AD3AAAC0B Received: by mail-pj1-x1033.google.com with SMTP id gj14so2679069pjb.5 for ; Thu, 29 Apr 2021 05:54:23 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=D4MnHi1mj3glD9Vfr6FolEqRXQ6tjURJUTC7jpkCipo=; b=Uj7xW8B2ecFkBt23iIEinkazttQqz9juk63htqAcr5yqKRXUK/E4HnGVY8Ki2BZFCy rpCWw0cclRF4hRMct4uvso7LDapX4WIyMrifoeFWXpDla/D1tAQrtHE0u4YKfM4hd47y ehAqHPcELPZoqsPuT2+WiZnBOFcLmzJupCS3nSZ/n5CylsKUGLtUtOAkPMx3JyqBwjkZ jGFnKsyaGDKmd2Fxq8zyyehwN4mG1tfNraPBiggVFww2fa3oDIJ2LJKYYJFYlbLCexK5 L3h5VIocHdTRtdprXepETIn04cutOmBUtNExEma5Y6sNXYoSgt8AaygkfDFHCVBBzBNw kcDg== X-Gm-Message-State: AOAM532yzSCzfeGJgiVr7rIk7WSd+chtOeB9RHyew09zQdwz4Nix6KBi Yjz2XYj3/BhDJ0fIJRPFYXnZ7Edr1jMVsA== X-Google-Smtp-Source: ABdhPJzRJMOy3x4ywR844SseP5qUreLGwm1wAwrgYSuXjAPWJLoHS4NGhwSESdqg7cC7YiS0hdywbg== X-Received: by 2002:a17:90b:8cf:: with SMTP id ds15mr2656346pjb.110.1619700862681; Thu, 29 Apr 2021 05:54:22 -0700 (PDT) Received: from gnu-cfl-2.localdomain ([172.58.35.177]) by smtp.gmail.com with ESMTPSA id a20sm2450163pfc.186.2021.04.29.05.54.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Apr 2021 05:54:19 -0700 (PDT) Received: from gnu-cfl-2.. (localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id DC3A2C1233; Thu, 29 Apr 2021 05:54:15 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH 10/12] x86: Also pass -mno-avx to cold-attribute-1.c Date: Thu, 29 Apr 2021 05:54:13 -0700 Message-Id: <20210429125415.1634118-11-hjl.tools@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210429125415.1634118-1-hjl.tools@gmail.com> References: <20210429125415.1634118-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3035.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Gcc-patches" From: "H.J. Lu" Reply-To: "H.J. Lu" Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Also pass -mno-avx to pr72839.c to avoid copying data with YMM or ZMM registers. * gcc.target/i386/cold-attribute-1.c: Also pass -mno-avx. --- gcc/testsuite/gcc.target/i386/cold-attribute-1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/i386/cold-attribute-1.c b/gcc/testsuite/gcc.target/i386/cold-attribute-1.c index 57666ac60b6..658eb3e25bb 100644 --- a/gcc/testsuite/gcc.target/i386/cold-attribute-1.c +++ b/gcc/testsuite/gcc.target/i386/cold-attribute-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -mno-avx" } */ #include static inline __attribute__ ((cold)) void From patchwork Thu Apr 29 12:54:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 1471716 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=i6pVpChP; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FWFpM6vJQz9sV5 for ; Thu, 29 Apr 2021 22:55:07 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7846C3AAAC0C; Thu, 29 Apr 2021 12:54:30 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7846C3AAAC0C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1619700870; bh=klBNDFPhKR1GPi9QH4Nb5uvdqQ5UzAPfms5xv6Aac0U=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=i6pVpChPMf8+jhjiXaPHcisTobpQLjWn5BNbx+ROQZLi6cmOQtuH8z+rKmDaQ7f8m FrM5RgPcePZb69URSs7XiqMDDdg0MfmpnDi9UADbECu+YwfPn+tGKLmM4G2ToFMLNr B+oOEhUzFl4xaQytdVKsyCbj0ybbED4uaddY/pEo= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pj1-x1032.google.com (mail-pj1-x1032.google.com [IPv6:2607:f8b0:4864:20::1032]) by sourceware.org (Postfix) with ESMTPS id 46F853AAAC0C for ; Thu, 29 Apr 2021 12:54:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 46F853AAAC0C Received: by mail-pj1-x1032.google.com with SMTP id m6-20020a17090a8586b02901507e1acf0fso10896596pjn.3 for ; Thu, 29 Apr 2021 05:54:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=klBNDFPhKR1GPi9QH4Nb5uvdqQ5UzAPfms5xv6Aac0U=; b=mrmlSa7IoSaIwh68U6rJzYvWvfOwgMwzcqUL2nFqiEX9ZZK6jESOVHFvOFwxD0B4s7 JvTJQalf/gI6nIS4HfKi1VPmz0YY3ZN9CcDk71v/EdvWg7XgPScSHVAtDis5MOsStO5z cOaEFvIpHGMa4FvFW7OZERAgDrsGttoIH0icdnwmnydpfv5STmsnn7CRSPtD8kSh2RN3 pfOZUMw0EaQhpb7huyNE03UV/qTq7iVfi+wI62EfcUBouoimGS3lWscv0UspFieeFQIK TDI9WYdysrkNLHkVyMKpkWfCrtzhfp/kgKrQf+ic0V06BctPn7ZLvn8b4sRqnL2kSni5 K0kg== X-Gm-Message-State: AOAM531M2yAkfinOBF3+TBieuU7rU14eq07rBfueM+0YQFbDkiZ+wlKQ z1jfiAfo1NS7RyDHSSzlo+d4ueUPuJim7g== X-Google-Smtp-Source: ABdhPJwuIeJo7xvM62EX7txOHLlUzBcVm7oLn9ugzLb8G0S23OJJtyIeoFyAZWLxK2JJhSudopn7Zg== X-Received: by 2002:a17:90a:e54e:: with SMTP id ei14mr20771398pjb.142.1619700863208; Thu, 29 Apr 2021 05:54:23 -0700 (PDT) Received: from gnu-cfl-2.localdomain ([172.58.35.177]) by smtp.gmail.com with ESMTPSA id m11sm7465069pjs.34.2021.04.29.05.54.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Apr 2021 05:54:22 -0700 (PDT) Received: from gnu-cfl-2.. (localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id E76B1C123F; Thu, 29 Apr 2021 05:54:15 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH 11/12] x86: Also pass -mno-avx to sw-1.c for ia32 Date: Thu, 29 Apr 2021 05:54:14 -0700 Message-Id: <20210429125415.1634118-12-hjl.tools@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210429125415.1634118-1-hjl.tools@gmail.com> References: <20210429125415.1634118-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3035.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Gcc-patches" From: "H.J. Lu" Reply-To: "H.J. Lu" Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Also pass -mno-avx to sw-1.c for ia32 since copying data with YMM or ZMM registers disables shrink-wrapping when the second argument is passed on stack. * gcc.target/i386/sw-1.c: Also pass -mno-avx for ia32. --- gcc/testsuite/gcc.target/i386/sw-1.c | 1 + 1 file changed, 1 insertion(+) diff --git a/gcc/testsuite/gcc.target/i386/sw-1.c b/gcc/testsuite/gcc.target/i386/sw-1.c index aec095eda62..a9c89fca4ec 100644 --- a/gcc/testsuite/gcc.target/i386/sw-1.c +++ b/gcc/testsuite/gcc.target/i386/sw-1.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mtune=generic -fshrink-wrap -fdump-rtl-pro_and_epilogue" } */ +/* { dg-additional-options "-mno-avx" { target ia32 } } */ /* { dg-skip-if "No shrink-wrapping preformed" { x86_64-*-mingw* } } */ #include From patchwork Thu Apr 29 12:54:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 1471717 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=sZFFRHon; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FWFpR5SCqz9sV5 for ; Thu, 29 Apr 2021 22:55:11 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8AFDA3AAAC39; Thu, 29 Apr 2021 12:54:32 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8AFDA3AAAC39 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1619700872; bh=FXy3Syhc+oNswnDnGtzKewSCF4T/rrDdFLmy1d+tpMc=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=sZFFRHonW2L3nbKx+wHuSbaeAzN940xYpuZ46IQlo7J605taI4nFz5b7SjVhD3B+2 4gW6kgw7iZ9n3/sx3eG0NmXTjVAECR48yEuFNtongh2+/VdkWdX5UMh8ryyP8IQtR+ XgV4zbdeS8PB5HS2j8dT4FFbxWfwV57FpMjU2oyY= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pg1-x532.google.com (mail-pg1-x532.google.com [IPv6:2607:f8b0:4864:20::532]) by sourceware.org (Postfix) with ESMTPS id 180D03992436 for ; Thu, 29 Apr 2021 12:54:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 180D03992436 Received: by mail-pg1-x532.google.com with SMTP id m12so6330193pgr.9 for ; Thu, 29 Apr 2021 05:54:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FXy3Syhc+oNswnDnGtzKewSCF4T/rrDdFLmy1d+tpMc=; b=T/HqysBkHB8DcgpoRCMfZMsqnFsstZfS7/+Hv/lDt97yikPtcPe58ROXSiidEVn0g1 3Tm6I8FrVOvjkvwZQd0Vx0rydzgHf9mzpeUtEhMRt9aN6BgBhf3GBhkmpyeEvUc3o7VO vBw1XvYQfxitmTaZUPIk0HFSpIf24gXhL8dAwlBtBQs/jBEmdf/uSzgCxgU6NtFtjNo7 bImx1ggFrClWM40wJP1387YsjoiQTIUjYzt++AwHr/nBkEbKAU+xVhvTrQRHDsisiScR DDmDuVblPFSUhZcwPIPamv62v8lCE/dqdvL05SkI4MJf1tfzOej5wQHFKngKojFcMxvK SIng== X-Gm-Message-State: AOAM530E/u9r26B20Zu8o3acFxNFxbDPvPK/OQkABbT75E/Z2HECq4MM 5PjzSpPRMy51sFkw2+jHvweP9fvg3ACkMg== X-Google-Smtp-Source: ABdhPJyjTfgZq9c656eQ0Q7IIUIeQZK+x2nOdFePxrYRJapn8xCZPIhIyApJOqaubbaoYREfOMtV/Q== X-Received: by 2002:a63:c13:: with SMTP id b19mr15435108pgl.198.1619700864080; Thu, 29 Apr 2021 05:54:24 -0700 (PDT) Received: from gnu-cfl-2.localdomain ([172.58.35.177]) by smtp.gmail.com with ESMTPSA id f20sm2692692pgb.47.2021.04.29.05.54.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Apr 2021 05:54:22 -0700 (PDT) Received: from gnu-cfl-2.. (localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id EA3D7C1240; Thu, 29 Apr 2021 05:54:15 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH 12/12] x86: Update gcc.target/i386/incoming-11.c Date: Thu, 29 Apr 2021 05:54:15 -0700 Message-Id: <20210429125415.1634118-13-hjl.tools@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210429125415.1634118-1-hjl.tools@gmail.com> References: <20210429125415.1634118-1-hjl.tools@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3035.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Gcc-patches" From: "H.J. Lu" Reply-To: "H.J. Lu" Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Expect no stack realignment since we no longer realign stack when copying data. * gcc.target/i386/incoming-11.c: Expect no stack realignment. --- gcc/testsuite/gcc.target/i386/incoming-11.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/i386/incoming-11.c b/gcc/testsuite/gcc.target/i386/incoming-11.c index a830c96f7d1..4b822684b88 100644 --- a/gcc/testsuite/gcc.target/i386/incoming-11.c +++ b/gcc/testsuite/gcc.target/i386/incoming-11.c @@ -15,4 +15,4 @@ void f() for (i = 0; i < 100; i++) q[i] = 1; } -/* { dg-final { scan-assembler "andl\[\\t \]*\\$-16,\[\\t \]*%esp" } } */ +/* { dg-final { scan-assembler-not "andl\[\\t \]*\\$-16,\[\\t \]*%esp" } } */