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([103.51.75.154]) by smtp.gmail.com with ESMTPSA id w1sm11185811pgp.31.2021.04.26.06.26.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Apr 2021 06:26:54 -0700 (PDT) From: Anand Moon To: u-boot@lists.denx.de Cc: Neil Armstrong , Bin Meng , Kever Yang , Anand Moon Subject: [PATCH 1/3] pci: pcie_dw_rockchip: Fixed the below compilation error Date: Mon, 26 Apr 2021 13:26:30 +0000 Message-Id: <20210426132632.10221-1-linux.amoon@gmail.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean Use the Error values that may be returned by PCI functions Added the error macro from linux/include/linux/pci.h drivers/pci/pcie_dw_rockchip.c: In function 'rk_pcie_read': drivers/pci/pcie_dw_rockchip.c:70:10: error: 'PCIBIOS_UNSUPPORTED' undeclared (first use in this function) 70 | return PCIBIOS_UNSUPPORTED; | ^~~~~~~~~~~~~~~~~~~ drivers/pci/pcie_dw_rockchip.c: In function 'rk_pcie_write': drivers/pci/pcie_dw_rockchip.c:90:10: error: 'PCIBIOS_UNSUPPORTED' undeclared (first use in this function) 90 | return PCIBIOS_UNSUPPORTED; | ^~~~~~~~~~~~~~~~~~~ Cc: Neil Armstrong Cc: Kever Yang Signed-off-by: Anand Moon Reviewed-by: Kever Yang --- drivers/pci/pcie_dw_common.h | 9 +++++++++ drivers/pci/pcie_dw_rockchip.c | 4 ++-- 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pcie_dw_common.h b/drivers/pci/pcie_dw_common.h index 6b701645af..ba5feb5b51 100644 --- a/drivers/pci/pcie_dw_common.h +++ b/drivers/pci/pcie_dw_common.h @@ -90,6 +90,15 @@ #define PCIE_MISC_CONTROL_1_OFF 0x8bc #define PCIE_DBI_RO_WR_EN BIT(0) +/* Error values that may be returned by PCI functions */ +#define PCIBIOS_SUCCESSFUL 0x00 +#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81 +#define PCIBIOS_BAD_VENDOR_ID 0x83 +#define PCIBIOS_DEVICE_NOT_FOUND 0x86 +#define PCIBIOS_BAD_REGISTER_NUMBER 0x87 +#define PCIBIOS_SET_FAILED 0x88 +#define PCIBIOS_BUFFER_TOO_SMALL 0x89 + /* Parameters for the waiting for iATU enabled routine */ #define LINK_WAIT_MAX_IATU_RETRIES 5 #define LINK_WAIT_IATU 10000 diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c index bc22af4230..9702b40019 100644 --- a/drivers/pci/pcie_dw_rockchip.c +++ b/drivers/pci/pcie_dw_rockchip.c @@ -67,7 +67,7 @@ static int rk_pcie_read(void __iomem *addr, int size, u32 *val) { if ((uintptr_t)addr & (size - 1)) { *val = 0; - return PCIBIOS_UNSUPPORTED; + return PCIBIOS_BAD_REGISTER_NUMBER; } if (size == 4) { @@ -87,7 +87,7 @@ static int rk_pcie_read(void __iomem *addr, int size, u32 *val) static int rk_pcie_write(void __iomem *addr, int size, u32 val) { if ((uintptr_t)addr & (size - 1)) - return PCIBIOS_UNSUPPORTED; + return PCIBIOS_BAD_REGISTER_NUMBER; if (size == 4) writel(val, addr); From patchwork Mon Apr 26 13:26:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anand Moon X-Patchwork-Id: 1470307 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=HkI7ls/J; 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([103.51.75.154]) by smtp.gmail.com with ESMTPSA id w1sm11185811pgp.31.2021.04.26.06.26.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Apr 2021 06:26:57 -0700 (PDT) From: Anand Moon To: u-boot@lists.denx.de Cc: Neil Armstrong , Bin Meng , Kever Yang , Anand Moon Subject: [PATCH 2/3] pci: pcie_dw_rockchip: Drop the unused variable warning Date: Mon, 26 Apr 2021 13:26:31 +0000 Message-Id: <20210426132632.10221-2-linux.amoon@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210426132632.10221-1-linux.amoon@gmail.com> References: <20210426132632.10221-1-linux.amoon@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean Drop the unused variable warning below. drivers/pci/pcie_dw_rockchip.c:161:6: warning: unused variable 'val' [-Wunused-variable] 161 | u32 val; | ^~~ Cc: Neil Armstrong Cc: Kever Yang Signed-off-by: Anand Moon Reviewed-by: Kever Yang --- drivers/pci/pcie_dw_rockchip.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c index 9702b40019..e7f42604ab 100644 --- a/drivers/pci/pcie_dw_rockchip.c +++ b/drivers/pci/pcie_dw_rockchip.c @@ -158,8 +158,6 @@ static inline void rk_pcie_writel_apb(struct rk_pcie *rk_pcie, u32 reg, */ static void rk_pcie_configure(struct rk_pcie *pci, u32 cap_speed) { - u32 val; - dw_pcie_dbi_write_enable(&pci->dw, true); clrsetbits_le32(pci->dw.dbi_base + PCIE_LINK_CAPABILITY, From patchwork Mon Apr 26 13:26:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anand Moon X-Patchwork-Id: 1470308 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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([103.51.75.154]) by smtp.gmail.com with ESMTPSA id w1sm11185811pgp.31.2021.04.26.06.26.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Apr 2021 06:26:59 -0700 (PDT) From: Anand Moon To: u-boot@lists.denx.de Cc: Neil Armstrong , Bin Meng , Kever Yang , Anand Moon Subject: [PATCH 3/3] pci: pcie_dw_rockchip: Use udelay instead of msleep Date: Mon, 26 Apr 2021 13:26:32 +0000 Message-Id: <20210426132632.10221-3-linux.amoon@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210426132632.10221-1-linux.amoon@gmail.com> References: <20210426132632.10221-1-linux.amoon@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean Use udelay instead of msleep fix the below warning. drivers/pci/pcie_dw_rockchip.c:254:3: warning: implicit declaration of function 'msleep' [-Wimplicit-function-declaration] Cc: Neil Armstrong Cc: Kever Yang Signed-off-by: Anand Moon --- drivers/pci/pcie_dw_rockchip.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c index e7f42604ab..6c87ee1ea0 100644 --- a/drivers/pci/pcie_dw_rockchip.c +++ b/drivers/pci/pcie_dw_rockchip.c @@ -249,7 +249,7 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed) * some wired devices need much more, such as 600ms. * Add a enough delay to cover all cases. */ - msleep(PERST_WAIT_MS); + udelay(PERST_WAIT_MS); dm_gpio_set_value(&priv->rst_gpio, 1); } @@ -271,12 +271,12 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed) dev_info(priv->dw.dev, "PCIe Linking... LTSSM is 0x%x\n", rk_pcie_readl_apb(priv, PCIE_CLIENT_LTSSM_STATUS)); rk_pcie_debug_dump(priv); - msleep(1000); + udelay(1000); } dev_err(priv->dw.dev, "PCIe-%d Link Fail\n", dev_seq(priv->dw.dev)); /* Link maybe in Gen switch recovery but we need to wait more 1s */ - msleep(1000); + udelay(1000); return -EIO; } @@ -296,7 +296,7 @@ static int rockchip_pcie_init_port(struct udevice *dev) } } - msleep(1000); + udelay(1000); ret = generic_phy_init(&priv->phy); if (ret) {