From patchwork Mon Mar 1 15:17:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 1445649 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Dq3p93TWxz9sRR for ; Tue, 2 Mar 2021 02:19:29 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237165AbhCAPTM (ORCPT ); Mon, 1 Mar 2021 10:19:12 -0500 Received: from bhuna.collabora.co.uk ([46.235.227.227]:60428 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237152AbhCAPSu (ORCPT ); Mon, 1 Mar 2021 10:18:50 -0500 Received: from localhost.localdomain (unknown [IPv6:2a01:e0a:4cb:a870:39a1:f0e7:a696:18c8]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id C5B831F44E6E; Mon, 1 Mar 2021 15:18:06 +0000 (GMT) From: Benjamin Gaignard To: p.zabel@pengutronix.de, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, ezequiel@collabora.com, mchehab@kernel.org, gregkh@linuxfoundation.org Cc: kernel@pengutronix.de, linux-imx@nxp.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, devel@driverdev.osuosl.org, kernel@collabora.com, benjamin.gaignard@collabora.com Subject: [PATCH v3 1/5] dt-bindings: reset: IMX8MQ VPU reset Date: Mon, 1 Mar 2021 16:17:50 +0100 Message-Id: <20210301151754.104749-2-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210301151754.104749-1-benjamin.gaignard@collabora.com> References: <20210301151754.104749-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document bindings for IMX8MQ VPU reset hardware block Signed-off-by: Benjamin Gaignard --- .../bindings/reset/fsl,imx8mq-vpu-reset.yaml | 54 +++++++++++++++++++ include/dt-bindings/reset/imx8mq-vpu-reset.h | 16 ++++++ 2 files changed, 70 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/fsl,imx8mq-vpu-reset.yaml create mode 100644 include/dt-bindings/reset/imx8mq-vpu-reset.h diff --git a/Documentation/devicetree/bindings/reset/fsl,imx8mq-vpu-reset.yaml b/Documentation/devicetree/bindings/reset/fsl,imx8mq-vpu-reset.yaml new file mode 100644 index 000000000000..00020421c0e3 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/fsl,imx8mq-vpu-reset.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/fsl,imx8mq-vpu-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX8MQ VPU Reset Controller + +maintainers: + - Benjamin Gaignard + +description: | + The VPU reset controller is used to reset the video processor + unit peripherals. Device nodes that need access to reset lines should + specify them as a reset phandle in their corresponding node as + specified in reset.txt. + + For list of all valid reset indices see + for i.MX8MQ. + +properties: + compatible: + items: + - const: fsl,imx8mq-vpu-reset + - const: syscon + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 3 + + '#reset-cells': + const: 1 + +required: + - compatible + - reg + - clocks + - '#reset-cells' + +additionalProperties: false + +examples: + - | + #include + + vpu-reset@38320000 { + compatible = "fsl,imx8mq-vpu-reset", "syscon"; + reg = <0x38320000 0x10000>; + clocks = <&clk IMX8MQ_CLK_VPU_DEC_ROOT>; + #reset-cells = <1>; + }; diff --git a/include/dt-bindings/reset/imx8mq-vpu-reset.h b/include/dt-bindings/reset/imx8mq-vpu-reset.h new file mode 100644 index 000000000000..efcbe18177fe --- /dev/null +++ b/include/dt-bindings/reset/imx8mq-vpu-reset.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2021, Collabora + * + * i.MX7 System Reset Controller (SRC) driver + * + * Author: Benjamin Gaignard + */ + +#ifndef DT_BINDINGS_VPU_RESET_IMX8MQ +#define DT_BINDINGS_VPU_RESET_IMX8MQ + +#define IMX8MQ_RESET_VPU_RESET_G1 0 +#define IMX8MQ_RESET_VPU_RESET_G2 1 + +#endif From patchwork Mon Mar 1 15:17:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 1445648 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Dq3p90r51z9sRN for ; Tue, 2 Mar 2021 02:19:29 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237164AbhCAPTK (ORCPT ); Mon, 1 Mar 2021 10:19:10 -0500 Received: from bhuna.collabora.co.uk ([46.235.227.227]:60448 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237153AbhCAPSu (ORCPT ); Mon, 1 Mar 2021 10:18:50 -0500 Received: from localhost.localdomain (unknown [IPv6:2a01:e0a:4cb:a870:39a1:f0e7:a696:18c8]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id B26DD1F44E72; Mon, 1 Mar 2021 15:18:07 +0000 (GMT) From: Benjamin Gaignard To: p.zabel@pengutronix.de, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, ezequiel@collabora.com, mchehab@kernel.org, gregkh@linuxfoundation.org Cc: kernel@pengutronix.de, linux-imx@nxp.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, devel@driverdev.osuosl.org, kernel@collabora.com, benjamin.gaignard@collabora.com Subject: [PATCH v3 2/5] dt-bindings: media: IMX8MQ VPU: document reset usage Date: Mon, 1 Mar 2021 16:17:51 +0100 Message-Id: <20210301151754.104749-3-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210301151754.104749-1-benjamin.gaignard@collabora.com> References: <20210301151754.104749-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document IMX8MQ VPU bindings to add the phandle to the reset driver. Provide an independent reset driver allow to the both VPUs to share their control/reset hardware block. The reset driver replace what was previously done be using the 'ctrl' registers inside the driver. This breaks the compatibility between DTB and kernel but the driver is still in staging directory and limited to IMX8MQ SoC. Signed-off-by: Benjamin Gaignard Reviewed-by: Rob Herring --- version 3: - Fix error in VPU example node .../devicetree/bindings/media/nxp,imx8mq-vpu.yaml | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml index 762be3f96ce9..fd53a4e43572 100644 --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml @@ -18,13 +18,12 @@ properties: const: nxp,imx8mq-vpu reg: - maxItems: 3 + maxItems: 2 reg-names: items: - const: g1 - const: g2 - - const: ctrl interrupts: maxItems: 2 @@ -46,6 +45,9 @@ properties: power-domains: maxItems: 1 + resets: + maxItems: 1 + required: - compatible - reg @@ -54,6 +56,7 @@ required: - interrupt-names - clocks - clock-names + - resets additionalProperties: false @@ -61,13 +64,13 @@ examples: - | #include #include + #include vpu: video-codec@38300000 { compatible = "nxp,imx8mq-vpu"; reg = <0x38300000 0x10000>, - <0x38310000 0x10000>, - <0x38320000 0x10000>; - reg-names = "g1", "g2", "ctrl"; + <0x38310000 0x10000>; + reg-names = "g1", "g2"; interrupts = , ; interrupt-names = "g1", "g2"; @@ -76,4 +79,5 @@ examples: <&clk IMX8MQ_CLK_VPU_DEC_ROOT>; clock-names = "g1", "g2", "bus"; power-domains = <&pgc_vpu>; + resets = <&vpu_reset IMX8MQ_RESET_VPU_RESET_G1>; };