From patchwork Tue Feb 9 04:34:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rayagonda Kokatanur X-Patchwork-Id: 1438113 X-Patchwork-Delegate: van.freenix@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=broadcom.com header.i=@broadcom.com header.a=rsa-sha256 header.s=google header.b=cMBuG93V; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DZVRL5Dd5z9sS8 for ; Tue, 9 Feb 2021 15:34:38 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B6A44829B9; Tue, 9 Feb 2021 05:34:33 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=broadcom.com header.i=@broadcom.com header.b="cMBuG93V"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 7B97D829C0; Tue, 9 Feb 2021 05:34:32 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MIME_HEADER_CTYPE_ONLY, MIME_NO_TEXT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,T_TVD_MIME_NO_HEADERS autolearn=no autolearn_force=no version=3.4.2 Received: from mail-pf1-x42c.google.com (mail-pf1-x42c.google.com [IPv6:2607:f8b0:4864:20::42c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0CC63829B0 for ; Tue, 9 Feb 2021 05:34:29 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=rayagonda.kokatanur@broadcom.com Received: by mail-pf1-x42c.google.com with SMTP id x136so4542604pfc.2 for ; Mon, 08 Feb 2021 20:34:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id; bh=JOtqTWXYWhCz1FLQqqO5AN2+QSjo2F1uaLZhhSA6Oyw=; b=cMBuG93VnTSd3pQRzxsfzPKuwsFJcQi9F1yVfwQlBCQU+ETiIYR6WfQrLWmz7PXzW8 0pdFvdX5mp+hKDRDgfVkmYmswdC6Up0MHITrhVfnZBHoSEKLm7pI4H66ItxgmWQQHURj 4KM2TEF7tJOsj8DpncmixPbboG1bS6McrXwbU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=JOtqTWXYWhCz1FLQqqO5AN2+QSjo2F1uaLZhhSA6Oyw=; b=bIkjV0e+6eq/Jyn/UnxrxbghQqzd7+qIix4vDPZL/68JDclF1OIAYxIRoCAatzcMgU 0apModJYkRbsweTr4lBM73FPSrw/4DfpMkz2X02Aaiy4VLi8SL6urXFywqrEId5YHg9W XqiljP8Q4KrU9a5g6sbfu+YPY6pAc66iuMvAMtLAsdYImP6XJ51Y7tzobCBchFoRwGtE tes7/YBTbhD9FRlLV4COQDOqXeaG2+wA368ocuFUU17wukyTml1a7p86w11/iAntaNPO hw5O6p0UpEXz/7iOdVhjv+PQcRaTQkKfeJSaj9XMkkI9xaFYSgBscAwxa7MUOwmEZgTP tmkw== X-Gm-Message-State: AOAM530My028Y1v7OnjfbdXI7Vn3crhHCq9fuESunvr6q0O4lOXfwVm1 c/NHXIQK3lkJvbREACcs5ZFNKA== X-Google-Smtp-Source: ABdhPJz5/7fybpgXYT85GFogByrat0JBRLJ/Kk4u0iV7i5vKOGYcrokosF5E9+uU+/7Nl3IiHq6WWw== X-Received: by 2002:a62:14d4:0:b029:1e3:34e7:5797 with SMTP id 203-20020a6214d40000b02901e334e75797mr1020984pfu.43.1612845266877; Mon, 08 Feb 2021 20:34:26 -0800 (PST) Received: from rayagonda.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id x4sm795678pjh.43.2021.02.08.20.34.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Feb 2021 20:34:25 -0800 (PST) From: Rayagonda Kokatanur To: Peng Fan , u-boot@lists.denx.de, bharat.gooty@broadcom.com Cc: Rayagonda Kokatanur Subject: [PATCH v1 1/1] drivers: mmc: iproc_sdhci: enable HS200 mode Date: Tue, 9 Feb 2021 10:04:12 +0530 Message-Id: <20210209043412.28934-1-rayagonda.kokatanur@broadcom.com> X-Mailer: git-send-email 2.17.1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Bharat Gooty Add tuning functionality which is needed for HS200 mode. For HS200, program the correct needed 1.8 voltage Signed-off-by: Bharat Gooty Signed-off-by: Rayagonda Kokatanur --- drivers/mmc/iproc_sdhci.c | 88 +++++++++++++++++++++++++++++++++++---- 1 file changed, 79 insertions(+), 9 deletions(-) diff --git a/drivers/mmc/iproc_sdhci.c b/drivers/mmc/iproc_sdhci.c index f931e4b3c1..360ea01e21 100644 --- a/drivers/mmc/iproc_sdhci.c +++ b/drivers/mmc/iproc_sdhci.c @@ -9,6 +9,7 @@ #include #include #include +#include "mmc_private.h" #include DECLARE_GLOBAL_DATA_PTR; @@ -139,17 +140,87 @@ static void sdhci_iproc_writeb(struct sdhci_host *host, u8 val, int reg) static int sdhci_iproc_set_ios_post(struct sdhci_host *host) { - u32 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); + struct mmc *mmc = (struct mmc *)host->mmc; + u32 ctrl; - /* Reset UHS mode bits */ - ctrl &= ~SDHCI_CTRL_UHS_MASK; + if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) { + ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); + ctrl |= SDHCI_CTRL_VDD_180; + sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); + } - if (host->mmc->ddr_mode) - ctrl |= UHS_DDR50_BUS_SPEED; + sdhci_set_uhs_timing(host); + return 0; +} +static void sdhci_start_tuning(struct sdhci_host *host) +{ + u32 ctrl; + + ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); + ctrl |= SDHCI_CTRL_EXEC_TUNING; sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); - return 0; + sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_INT_ENABLE); + sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_SIGNAL_ENABLE); +} + +static void sdhci_end_tuning(struct sdhci_host *host) +{ + /* Enable only interrupts served by the SD controller */ + sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK, + SDHCI_INT_ENABLE); + /* Mask all sdhci interrupt sources */ + sdhci_writel(host, 0x0, SDHCI_SIGNAL_ENABLE); +} + +static int sdhci_iproc_execute_tuning(struct mmc *mmc, u8 opcode) +{ +#define MAX_TUNING_LOOP 40 + struct mmc_cmd cmd; + u32 ctrl; + u32 blocksize = SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 64); + struct sdhci_host *host = dev_get_priv(mmc->dev); + char tuning_loop_counter = MAX_TUNING_LOOP; + int ret = 0; + + sdhci_start_tuning(host); + + cmd.cmdidx = opcode; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = 0; + + if (opcode == MMC_CMD_SEND_TUNING_BLOCK_HS200 && mmc->bus_width == 8) + blocksize = SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 128); + + sdhci_writew(host, blocksize, SDHCI_BLOCK_SIZE); + sdhci_writew(host, 1, SDHCI_BLOCK_COUNT); + sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE); + + do { + mmc_send_cmd(mmc, &cmd, NULL); + if (opcode == MMC_CMD_SEND_TUNING_BLOCK) + udelay(1); + + ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); + + if (tuning_loop_counter-- == 0) + break; + + } while (ctrl & SDHCI_CTRL_EXEC_TUNING); + + if (tuning_loop_counter < 0 || (!(ctrl & SDHCI_CTRL_TUNED_CLK))) { + ctrl &= ~(SDHCI_CTRL_TUNED_CLK | SDHCI_CTRL_EXEC_TUNING); + sdhci_writel(host, ctrl, SDHCI_HOST_CONTROL2); + printf("%s:Tuning failed, opcode = 0x%02x\n", __func__, opcode); + ret = -EIO; + } + + udelay(1); + + sdhci_end_tuning(host); + + return ret; } static struct sdhci_ops sdhci_platform_ops = { @@ -162,6 +233,7 @@ static struct sdhci_ops sdhci_platform_ops = { .write_b = sdhci_iproc_writeb, #endif .set_ios_post = sdhci_iproc_set_ios_post, + .platform_execute_tuning = sdhci_iproc_execute_tuning, }; struct iproc_sdhci_plat { @@ -189,9 +261,7 @@ static int iproc_sdhci_probe(struct udevice *dev) host->name = dev->name; host->ioaddr = dev_read_addr_ptr(dev); - host->voltages = MMC_VDD_165_195 | - MMC_VDD_32_33 | MMC_VDD_33_34; - host->quirks = SDHCI_QUIRK_BROKEN_VOLTAGE | SDHCI_QUIRK_BROKEN_R1B; + host->quirks = SDHCI_QUIRK_BROKEN_R1B; host->host_caps = MMC_MODE_DDR_52MHz; host->index = fdtdec_get_uint(gd->fdt_blob, node, "index", 0); host->ops = &sdhci_platform_ops;