From patchwork Thu Jan 11 15:33:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrill Tkachov X-Patchwork-Id: 859183 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-470843-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="vfUsm+oD"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zHVK542hGz9ryQ for ; Fri, 12 Jan 2018 02:33:45 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; q=dns; s=default; b=D518EWgFin6DdUJrT7lbIwm2cSPKixwXUxLIqXAb1m6 xkSnri+5FvfgYngMI1BR+BSBIka2gtsZkQR+tFtAKzhznufBAzdwjYkVMB2pwi+M uLJ/4s2FgTDYZf9Xff9aSuTEuHNfBGkJ6lm/FS14qU1b4xf6f3rrYd457yVYoa0I = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; s=default; bh=V5t/mKSVNCPrCNgA+ky/aZFZy6w=; b=vfUsm+oDA1xz1b4Ys 59uThvXvQvdADy1WR7P6tGt/JfPSxACeCp0t18ywxMJPLw4svTnq1JyZolTLoTFa kFIrpCaVPClHKIxAvrKx9VprXqfKJB86iYlsgFknx9GhZyhuGqFUSR+MKZulP1wH kO86PfeufBPMHu55d0XKAjr73o= Received: (qmail 39386 invoked by alias); 11 Jan 2018 15:33:38 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 39239 invoked by uid 89); 11 Jan 2018 15:33:38 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=noticeable, vld1x2c, UD:vld1x2.c, Hx-languages-length:2216 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 11 Jan 2018 15:33:36 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2522415BF; Thu, 11 Jan 2018 07:33:35 -0800 (PST) Received: from [10.2.207.77] (e100706-lin.cambridge.arm.com [10.2.207.77]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 592233F41F; Thu, 11 Jan 2018 07:33:34 -0800 (PST) Message-ID: <5A5783CC.6090806@foss.arm.com> Date: Thu, 11 Jan 2018 15:33:32 +0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" CC: James Greenhalgh , "Richard Earnshaw (lists)" , Marcus Shawcroft Subject: [PATCH][arm] XFAIL advsimd-intrinsics/vld1x2.c Hi all, This recently added test fails on arm. We haven't implemented these intrinsics for arm (any volunteers?) so for now let's XFAIL these on that target. Also, the float64 versions of these intrinsics are not supposed to be available on arm so this patch slightly adjusts the test to not include them for aarch32. In any case the entire test is XFAILed on arm, so this doesn't have any noticeable effect. The same number of tests (PASS) still occur on aarch64 but now they appear as XFAIL rather than FAIL on arm. Ok for trunk? (from an aarch64 perspective). Thanks, Kyrill 2018-01-11 Kyrylo Tkachov * gcc.target/aarch64/advsimd-intrinsics/vld1x2.c: Make float64 tests specific to aarch64. XFAIL test on arm. diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c index 0a43d0daf8c39949d447d29d7a5fa37a60b97134..92a139bc52313ef52d8bd97c6eb64dd8a7f7769a 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c @@ -1,3 +1,5 @@ +/* We haven't implemented these intrinsics for arm yet. */ +/* { dg-xfail-if "" { arm*-*-* } } */ /* { dg-do run } */ /* { dg-options "-O3" } */ @@ -26,7 +28,7 @@ test_vld##SUFFIX##_x2 () \ return 0; \ } -#define VARIANTS(VARIANT) \ +#define VARIANTS_1(VARIANT) \ VARIANT (uint8, 8, _u8) \ VARIANT (uint16, 4, _u16) \ VARIANT (uint32, 2, _u32) \ @@ -39,7 +41,6 @@ VARIANT (poly8, 8, _p8) \ VARIANT (poly16, 4, _p16) \ VARIANT (float16, 4, _f16) \ VARIANT (float32, 2, _f32) \ -VARIANT (float64, 1, _f64) \ VARIANT (uint8, 16, q_u8) \ VARIANT (uint16, 8, q_u16) \ VARIANT (uint32, 4, q_u32) \ @@ -51,8 +52,15 @@ VARIANT (int64, 2, q_s64) \ VARIANT (poly8, 16, q_p8) \ VARIANT (poly16, 8, q_p16) \ VARIANT (float16, 8, q_f16) \ -VARIANT (float32, 4, q_f32) \ +VARIANT (float32, 4, q_f32) + +#ifdef __aarch64__ +#define VARIANTS(VARIANT) VARIANTS_1(VARIANT) \ +VARIANT (float64, 1, _f64) \ VARIANT (float64, 2, q_f64) +#else +#define VARIANTS(VARIANT) VARIANTS_1(VARIANT) +#endif /* Tests of vld1_x2 and vld1q_x2. */ VARIANTS (TESTMETH)