From patchwork Tue Jan 26 10:29:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Stubbs X-Patchwork-Id: 1431605 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Received: from sourceware.org (unknown [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DQ2zf43Gtz9sWD for ; Tue, 26 Jan 2021 21:29:50 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 16FD43AAA098; Tue, 26 Jan 2021 10:29:48 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from esa1.mentor.iphmx.com (esa1.mentor.iphmx.com [68.232.129.153]) by sourceware.org (Postfix) with ESMTPS id A4C5A3850427 for ; Tue, 26 Jan 2021 10:29:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org A4C5A3850427 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=codesourcery.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=Andrew_Stubbs@mentor.com IronPort-SDR: RhUQLGoPkBW6168uoJi+wPa4RVYc76ywfPPcJRm1EI0ntJOx0L+xdqqUSeZjOzSBbeo0pR3RCJ XB2pF5BDFjp6Wgi6LdOS0h0V6enR4nqiJhBOgNh5nTAhRBXb7sR33NV+gi3k8n0Qjlb8wXBuzw mZuzPQmLe8mX88vZc/qrP2vr9sr03FlKk//aTWEy0HxZB+NoAf253LMYkf6oqX3FS7ZOj184/k AcIJSanEVhVUEsmrGNwUnqiWXqfIcw/UiGGBWcYWw2j4dQVvWTUbK0bKSJ9wffIK+gR0tccgow wko= X-IronPort-AV: E=Sophos;i="5.79,375,1602576000"; d="scan'208";a="59723855" Received: from orw-gwy-01-in.mentorg.com ([192.94.38.165]) by esa1.mentor.iphmx.com with ESMTP; 26 Jan 2021 02:29:44 -0800 IronPort-SDR: 2aVHKErxXyg1vg6i+6eXsMG2jGEgh0JHbdmrGgE7YseA0LkQ8HYEcI4nqPsQWx1lsvr+1xLr0p tMzO5EZ5Zh0qUn4vQvrE6JP8z1TtcMAG1lFSFG3gzuW8i5hqafRuE20VnWfmbF+xOM98/tDfoZ +vGiR8re2AFFvm3iyzyX2e+Cs3YieQ4FB4SB05VhXxFoKmp8wOiqf3z13O4ZXxlqr6fmkN5hjT MntCqMvhWQpZVH0VSZA+uUR81OEGZbDQWyo/n63v2WVOVNQLNtSHBBK52DKD+OtssmRrpE3/k2 JPU= To: "gcc-patches@gcc.gnu.org" From: Andrew Stubbs Subject: [committed] amdgcn: Allow V64DFmode min/max reductions Message-ID: <3a1a46f1-67e8-3097-3102-99e91c3423c9@codesourcery.com> Date: Tue, 26 Jan 2021 10:29:39 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 Content-Language: en-GB X-Originating-IP: [137.202.0.90] X-ClientProxiedBy: svr-ies-mbx-06.mgc.mentorg.com (139.181.222.6) To svr-ies-mbx-01.mgc.mentorg.com (139.181.222.1) X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" This patch fixes and AMD GCN bug in which attempting to use DFmode vector reductions would cause an ICE. There's no reason not to allow the reductions, so we simply enable them thusly. Andrew amdgcn: Allow V64DFmode min/max reductions I don't know why these were disabled. There're no direct min/max DPP instructions for this mode, but the "use moves" strategy works fine. gcc/ChangeLog: * config/gcn/gcn.c (gcn_expand_reduc_scalar): Use move instructions for V64DFmode min/max reductions. diff --git a/gcc/config/gcn/gcn.c b/gcc/config/gcn/gcn.c index 3b1762efd3a..2351b24a4d5 100644 --- a/gcc/config/gcn/gcn.c +++ b/gcc/config/gcn/gcn.c @@ -4251,7 +4251,8 @@ gcn_expand_reduc_scalar (machine_mode mode, rtx src, int unspec) || unspec == UNSPEC_SMAX_DPP_SHR || unspec == UNSPEC_UMIN_DPP_SHR || unspec == UNSPEC_UMAX_DPP_SHR) - && mode == V64DImode) + && (mode == V64DImode + || mode == V64DFmode)) || (unspec == UNSPEC_PLUS_DPP_SHR && mode == V64DFmode)); rtx_code code = (unspec == UNSPEC_SMIN_DPP_SHR ? SMIN