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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id eb14sm14468809edb.20.2020.12.14.00.37.59 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 14 Dec 2020 00:37:59 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com, vikhyat.goyal@xilinx.com, Simon Glass Cc: Anatolij Gustschin Subject: [PATCH v2 1/5] video: Fix video sync kernel-doc format Date: Mon, 14 Dec 2020 09:37:48 +0100 Message-Id: <0d73134bae803933a815ba3bae51d2c1ff8cf1f6.1607935068.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Place description below function parameters to make kernel-doc stript happy. Also rename dev to vid to be aligned with function parameters. Fixes: 1acafc73bfc7 ("dm: video: Add a video uclass") Signed-off-by: Michal Simek Reviewed-by: Simon Glass --- Changes in v2: - New patch is series ./scripts/kernel-doc -v -man include/video.h > /dev/null --- include/video.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/video.h b/include/video.h index 9d09d2409af6..7313b17f7ce8 100644 --- a/include/video.h +++ b/include/video.h @@ -151,13 +151,13 @@ int video_clear(struct udevice *dev); /** * video_sync() - Sync a device's frame buffer with its hardware * + * @vid: Device to sync + * @force: True to force a sync even if there was one recently (this is + * very expensive on sandbox) + * * Some frame buffers are cached or have a secondary frame buffer. This * function syncs these up so that the current contents of the U-Boot frame * buffer are displayed to the user. - * - * @dev: Device to sync - * @force: True to force a sync even if there was one recently (this is - * very expensive on sandbox) */ void video_sync(struct udevice *vid, bool force); From patchwork Mon Dec 14 08:37:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1415848 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=Bk3jw4Mh; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CvZY76rR3z9sSC for ; Mon, 14 Dec 2020 19:38:35 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 77542827B7; Mon, 14 Dec 2020 09:38:16 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="Bk3jw4Mh"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 0AED58266F; Mon, 14 Dec 2020 09:38:06 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ed1-x543.google.com (mail-ed1-x543.google.com [IPv6:2a00:1450:4864:20::543]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 29AFB8266F for ; Mon, 14 Dec 2020 09:38:02 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-ed1-x543.google.com with SMTP id h16so16254017edt.7 for ; Mon, 14 Dec 2020 00:38:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dPyi2S82yl7tlW884/Uq0IfHIq/L2AG/iYMTFliFdD0=; b=Bk3jw4MhPWAbXtuREUmJ7SBhQe/o7MgoK1Ron2h2rITEYOC2FVbXs1FfbQfe1dSCAN 2fpud6xxkXg9TNuCNBAcAtBe5d3a6STJKE0U3sJb8pmXY6I/d/FTzEh3tDQk+g4Z7xO5 0jZPHSA8AajUEGp5fVw+NC9lkY0iv/ZL9iQmCL0YTobtGi+aa/dybqILOUp0G28POsoi M7NOcHoonNmYxd2ByP6kjYIEyOeUet+7r6WglrERt4iRkabKDUHZenPAek/q1V9+DwLu InBJQdL8FQTJenODAv/8IM/JxyPOHJXtVkMW+iz8TloDMU5peRZS0lq1BFUKmIc9TI2Y gagg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=dPyi2S82yl7tlW884/Uq0IfHIq/L2AG/iYMTFliFdD0=; b=DUug1q3KIkcYDKHU5GoUFV6wUv6LiFysnj8oxvCx9QBLrU25QKGflAwiydHo98Xz8A YDIlhZbhSurQ4fyDbmqFWQnGsH4qFg21R2CqtRt0iM4xuOxoEu+jkzv/rI7DT1CzygGU 9T+2IX/fQUsWnsqe3vo+kOvv4r7WdDIit58FwSJFeSTe7ZSHxTA4gnPQKdFrRbgV7ipa +WPFKDEIY7RkltxJNVb9tSgm1/regB7jJKokse+Z2kBk1e6DZu92FQpI2m/siHB2lPKq /T6+vh0KjAd+9srJXAvgUcJF/YhZItrsBC5r2wtZXaWlIGUb69uuxMmejOZnc4AnTAfb YiBA== X-Gm-Message-State: AOAM532BEC+asmfo+lvLck719jDLYXVwsnHM8Kt3SXv5eCEgym309K5w NO4cRG8y59z0t4C7awG5Sk5HssKl9YN7D/8m X-Google-Smtp-Source: ABdhPJzf3KiS8jTE/GwHZ8o8LoH6E52Qbvh6/J1lHQJdGR2xwyknLu2G2xKuL+3KQ8VvExJ7mmQgwg== X-Received: by 2002:a50:d646:: with SMTP id c6mr23588866edj.177.1607935081488; Mon, 14 Dec 2020 00:38:01 -0800 (PST) Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) by smtp.gmail.com with ESMTPSA id rk12sm13046374ejb.75.2020.12.14.00.38.00 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 14 Dec 2020 00:38:00 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com, vikhyat.goyal@xilinx.com, Simon Glass Cc: Anatolij Gustschin Subject: [PATCH v2 2/5] video: Let video_sync to return error value Date: Mon, 14 Dec 2020 09:37:49 +0100 Message-Id: <684076cfd930c11076bdb01f5283fa944846054c.1607935068.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean This patch is preparation for follow up one to support cases where synchronization can fail. Suggested-by: Simon Glass Signed-off-by: Michal Simek Reviewed-by: Simon Glass --- Changes in v2: - New patch is series drivers/video/vidconsole-uclass.c | 40 ++++++++++++++++++++++--------- drivers/video/video-uclass.c | 12 +++++++--- include/video.h | 4 +++- 3 files changed, 41 insertions(+), 15 deletions(-) diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c index 3a07f36ce278..f29c0e58c76d 100644 --- a/drivers/video/vidconsole-uclass.c +++ b/drivers/video/vidconsole-uclass.c @@ -89,9 +89,7 @@ static int vidconsole_back(struct udevice *dev) if (priv->ycur < 0) priv->ycur = 0; } - video_sync(dev->parent, false); - - return 0; + return video_sync(dev->parent, false); } /* Move to a newline, scrolling the display if necessary */ @@ -101,7 +99,7 @@ static void vidconsole_newline(struct udevice *dev) struct udevice *vid_dev = dev->parent; struct video_priv *vid_priv = dev_get_uclass_priv(vid_dev); const int rows = CONFIG_CONSOLE_SCROLL_LINES; - int i; + int i, ret; priv->xcur_frac = priv->xstart_frac; priv->ycur += priv->y_charsize; @@ -116,7 +114,12 @@ static void vidconsole_newline(struct udevice *dev) } priv->last_ch = 0; - video_sync(dev->parent, false); + ret = video_sync(dev->parent, false); + if (ret) { +#ifdef DEBUG + console_puts_select_stderr(true, "[vc err: video_sync]"); +#endif + } } static const struct vid_rgb colors[VID_COLOR_COUNT] = { @@ -348,8 +351,15 @@ static void vidconsole_escape_char(struct udevice *dev, char ch) parsenum(priv->escape_buf + 1, &mode); if (mode == 2) { + int ret; + video_clear(dev->parent); - video_sync(dev->parent, false); + ret = video_sync(dev->parent, false); + if (ret) { +#ifdef DEBUG + console_puts_select_stderr(true, "[vc err: video_sync]"); +#endif + } priv->ycur = 0; priv->xcur_frac = priv->xstart_frac; } else { @@ -565,7 +575,12 @@ static void vidconsole_putc(struct stdio_dev *sdev, const char ch) console_puts_select_stderr(true, "[vc err: putc]"); #endif } - video_sync(dev->parent, false); + ret = video_sync(dev->parent, false); + if (ret) { +#ifdef DEBUG + console_puts_select_stderr(true, "[vc err: video_sync]"); +#endif + } } static void vidconsole_puts(struct stdio_dev *sdev, const char *s) @@ -582,7 +597,12 @@ static void vidconsole_puts(struct stdio_dev *sdev, const char *s) console_puts_select_stderr(true, str); #endif } - video_sync(dev->parent, false); + ret = video_sync(dev->parent, false); + if (ret) { +#ifdef DEBUG + console_puts_select_stderr(true, "[vc err: video_sync]"); +#endif + } } /* Set up the number of rows and colours (rotated drivers override this) */ @@ -691,9 +711,7 @@ static int do_video_puts(struct cmd_tbl *cmdtp, int flag, int argc, for (s = argv[1]; *s; s++) vidconsole_put_char(dev, *s); - video_sync(dev->parent, false); - - return 0; + return video_sync(dev->parent, false); } U_BOOT_CMD( diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index 650891e49dd0..6fc412801714 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #ifdef CONFIG_SANDBOX @@ -172,7 +173,7 @@ void video_set_default_colors(struct udevice *dev, bool invert) } /* Flush video activity to the caches */ -void video_sync(struct udevice *vid, bool force) +int video_sync(struct udevice *vid, bool force) { /* * flush_dcache_range() is declared in common.h but it seems that some @@ -196,17 +197,22 @@ void video_sync(struct udevice *vid, bool force) last_sync = get_timer(0); } #endif + return 0; } void video_sync_all(void) { struct udevice *dev; + int ret; for (uclass_find_first_device(UCLASS_VIDEO, &dev); dev; uclass_find_next_device(&dev)) { - if (device_active(dev)) - video_sync(dev, true); + if (device_active(dev)) { + ret = video_sync(dev, true); + if (ret) + dev_dbg(dev, "Video sync failed\n"); + } } } diff --git a/include/video.h b/include/video.h index 7313b17f7ce8..1bfe6843a805 100644 --- a/include/video.h +++ b/include/video.h @@ -155,11 +155,13 @@ int video_clear(struct udevice *dev); * @force: True to force a sync even if there was one recently (this is * very expensive on sandbox) * + * @return: 0 always + * * Some frame buffers are cached or have a secondary frame buffer. This * function syncs these up so that the current contents of the U-Boot frame * buffer are displayed to the user. */ -void video_sync(struct udevice *vid, bool force); +int video_sync(struct udevice *vid, bool force); /** * video_sync_all() - Sync all devices' frame buffers with there hardware From patchwork Mon Dec 14 08:37:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1415849 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=csYiLfyX; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CvZYM0l3fz9sSC for ; Mon, 14 Dec 2020 19:38:47 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 784CE827F6; Mon, 14 Dec 2020 09:38:20 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="csYiLfyX"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 3373C827E3; Mon, 14 Dec 2020 09:38:08 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x642.google.com (mail-ej1-x642.google.com [IPv6:2a00:1450:4864:20::642]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id A6D05827B2 for ; Mon, 14 Dec 2020 09:38:03 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-ej1-x642.google.com with SMTP id g20so21415597ejb.1 for ; Mon, 14 Dec 2020 00:38:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lvviyf9Obdi3TtNqaL7prXTw6pA05VnryuvBzg4/Wqc=; b=csYiLfyXRC6/mZwTxhKUw2eCQqXFQoHDnV47hw7kxcBfgaUbV2nrbf8a1H12Q/ib03 hkai71F1wpWce5EA5lqk+a15yykzgP6gbJD4x0L+zMK7K4SQbmkMu5m455Tz0Z+sbjIM U8aVMVtR4EuXKH+x6BHf0UbmdMNnrOs3jEtFRdOegTRcqEqyly+WQEJZ/j6oqOxc89Y6 lOAmIDF4qw9UJznp7x4LFsWYkwNPP4eFdV6or9PJxmbRs0HIX1PKv3OSNCsf5P0nJvBX M65vEbu2YAu1apExKlgRvWcw3S0cgnJp41ziHboCV9huhIQOM3x9v9nyq1+U+pJ+8LdC xeDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=lvviyf9Obdi3TtNqaL7prXTw6pA05VnryuvBzg4/Wqc=; b=rpcoOq50ReM4Wtxn1JmaE6I+RC+itzz9QDVm/SZvh/+ggttxsHvNMnvKQSK0ihLsA1 FvMaFxdUvgaN0rYz0KAE8oMh79hCpNuE7aCcy0RzGuas2E/Iq6AF0Rvvh1HrtSuoU9ae 6UtZYp9+GfnPLbnic/DNLCCla5fHCi4gst0g9YUfu9LXfV3c+JimH374zDegeunuVAb/ mYYAkjkfXiHNHvI+VO95qJpZ5BFBbJYf/0kEWtExQe8BANu6gWwmy8wor4FQAH0NITCE Z/N3WmbM+ZJMnvf3SAYErC9VKEM89+MOr1+xz5nZwmq2mY9MhoA0o+csge65aOHKPaGK L6IQ== X-Gm-Message-State: AOAM530DHhnRaBxUDBwHNRrxY3Va660xzQb/cuiWJkVkn98H0h0qq59d nsHBbXaBVLN0Ir/ARYXBtKgAoWb3qaGQb4jg X-Google-Smtp-Source: ABdhPJy/3A2+ksp0m9NMALzg1cOULwVXI+2NN/gm5KXbU0iW8NlNlgzISRAfb8IOFNOvQaRtfzPx7Q== X-Received: by 2002:a17:906:1197:: with SMTP id n23mr21648806eja.359.1607935083077; Mon, 14 Dec 2020 00:38:03 -0800 (PST) Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) by smtp.gmail.com with ESMTPSA id m24sm13099580ejo.52.2020.12.14.00.38.02 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 14 Dec 2020 00:38:02 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com, vikhyat.goyal@xilinx.com, Simon Glass Cc: Anatolij Gustschin Subject: [PATCH v2 3/5] video: Introduce video_sync operation Date: Mon, 14 Dec 2020 09:37:50 +0100 Message-Id: <04221731ad19461b6a6b9c1a3d84105167aebe47.1607935068.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Some drivers like LCD connected via SPI requires explicit sync function which copy framebuffer content over SPI to controller to display. This hook doesn't exist yet that's why introduce it via video operations. Signed-off-by: Michal Simek Reviewed-by: Simon Glass --- Changes in v2: - Add support for returning value - Update kernel-doc format to pass kernel-doc script - Update patch subject s/call/operation/ Simon: Please review this. I didn't find existing way how this can be done that's why I am introducing this hook. Also maybe name can be named a little bit differently. That's why waiting for better suggestion. --- drivers/video/video-uclass.c | 9 +++++++++ include/video.h | 12 ++++++++++-- 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index 6fc412801714..938e7d371311 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -175,6 +175,15 @@ void video_set_default_colors(struct udevice *dev, bool invert) /* Flush video activity to the caches */ int video_sync(struct udevice *vid, bool force) { + struct video_ops *ops = video_get_ops(vid); + int ret; + + if (ops && ops->video_sync) { + ret = ops->video_sync(vid); + if (ret) + return ret; + } + /* * flush_dcache_range() is declared in common.h but it seems that some * architectures do not actually implement it. Is there a way to find diff --git a/include/video.h b/include/video.h index 1bfe6843a805..12fc525ab4ef 100644 --- a/include/video.h +++ b/include/video.h @@ -114,8 +114,16 @@ struct video_priv { u8 bg_col_idx; }; -/* Placeholder - there are no video operations at present */ +/** + * struct video_ops - structure for keeping video operations + * @video_sync: Synchronize FB with device. Some device like SPI based LCD + * displays needs synchronization when data in an FB is available. + * For these devices implement video_sync hook to call a sync + * function. vid is pointer to video device udevice. Function + * should return 0 on success video_sync and error code otherwise + */ struct video_ops { + int (*video_sync)(struct udevice *vid); }; #define video_get_ops(dev) ((struct video_ops *)(dev)->driver->ops) @@ -155,7 +163,7 @@ int video_clear(struct udevice *dev); * @force: True to force a sync even if there was one recently (this is * very expensive on sandbox) * - * @return: 0 always + * @return: 0 on success, error code otherwise * * Some frame buffers are cached or have a secondary frame buffer. This * function syncs these up so that the current contents of the U-Boot frame From patchwork Mon Dec 14 08:37:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1415851 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=oDZ8dVSw; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CvZYp6975z9sT6 for ; Mon, 14 Dec 2020 19:39:10 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 37543827FC; Mon, 14 Dec 2020 09:38:42 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="oDZ8dVSw"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 0DC21827EF; Mon, 14 Dec 2020 09:38:16 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x644.google.com (mail-ej1-x644.google.com [IPv6:2a00:1450:4864:20::644]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 49DD8827B7 for ; Mon, 14 Dec 2020 09:38:05 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-ej1-x644.google.com with SMTP id w1so16709452ejf.11 for ; Mon, 14 Dec 2020 00:38:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kh0+FXviklHfJ/m+aPZNkG4D3YXQu1/udyp55rpc+14=; b=oDZ8dVSwEVK6kEaqGrWhQRv9q5cP3pVbbciXbV1Kx5eXZ5ABfs0TJGXpjdp6MZ+y/L miVqYrFXOV9wsTjPGbPuaynjAYvO7FwGq/kAyAcOUwZHb/2CA3+PRgqmY+BLG4Rq5sbi KVJlr7lHnN/uG3KoCF5Bdrmql41vkzuIdXd5OscBuoer7abL5aMnke9fcs3B/yy1GOr0 zlEZZKU9YQuPb1boxCC0Mu89aU6IG/AxaHPR0C6vLLH+ncjSfzVzwd8jPD2pSs1hJnlm vU7N99cVCk0GBPO03Cyd48BlOacXauFV4GljRDLBUESxCcH324LIZDTKc5fHA8te7xHY dSfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=kh0+FXviklHfJ/m+aPZNkG4D3YXQu1/udyp55rpc+14=; b=pyqFYFuQiO7JhMb5k3wK+N6J3maLMODjQjnfgWbGm9ZhHs7Q+vfMt8LLVxZ87+8a5P 9YAw5mThE0XtizUSbGHpywRxyzZUFu0aEQF4oKrvCyCvMpxrEHakJDx0ZqGQcbQbYVEe uZA0LwsDWhaNDsGC2RA3GRdNJelHP+peQwA8Bk3HzqtUdXedgQr9LzULSBy91ce9ZPPI +nZKESNpqiXVkRjoIxJ0Pwt47vW9dbD1qZfaM/cTP0l+45wp8kBZglRdYynveQ6aYUnZ nt+6WS8Zpfu/PN85ui4WYYTMADg3SrA08cW3Y7msuIQHatLT41ytgfKvLhSb6cG5cixe D7Fg== X-Gm-Message-State: AOAM531svd7L3k2jh2oqtRfhVuzma1PIFOpYm7+bBiqkvJ3cdWDH+12N cs9BsbL7LlRRJl6Fmo4UIchaklijOBrwhxTR X-Google-Smtp-Source: ABdhPJxftRKBTpDGD+glbBMFzNS7NsW1kRK8NpDaCs7ntUsFP5h5KI0Lw8lVNC0FuVUrYTPJPxt1Ug== X-Received: by 2002:a17:906:5243:: with SMTP id y3mr21621618ejm.273.1607935084730; Mon, 14 Dec 2020 00:38:04 -0800 (PST) Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) by smtp.gmail.com with ESMTPSA id z26sm15007971edl.71.2020.12.14.00.38.04 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 14 Dec 2020 00:38:04 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com, vikhyat.goyal@xilinx.com, Simon Glass Cc: Alex Nemirovsky , Anastasiia Lukianenko , Anatolij Gustschin , Baruch Siach , Heinrich Schuchardt , Lokesh Vutla , Masahiro Yamada , Michal Simek , Patrice Chotard , Rayagonda Kokatanur , Robert Marko , Sam Protsenko , Sean Anderson , Stefan Bosch Subject: [PATCH v2 4/5] video: seps525: Add dt binding description Date: Mon, 14 Dec 2020 09:37:51 +0100 Message-Id: <9b1bc3618981be03fb04b3d682deb5242b5b5245.1607935068.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Vikhyat Goyal Added dt binding for seps525 display driver. Signed-off-by: Vikhyat Goyal Signed-off-by: Michal Simek Reviewed-by: Simon Glass --- (no changes since v1) MAINTAINERS | 1 + .../video/syncoam,seps525.txt | 24 +++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 doc/device-tree-bindings/video/syncoam,seps525.txt diff --git a/MAINTAINERS b/MAINTAINERS index 127e30c0a5e0..11857ece9a53 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -547,6 +547,7 @@ S: Maintained T: git https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze.git F: arch/arm/mach-zynq/ F: doc/board/xilinx/ +F: doc/device-tree-bindings/video/syncoam,seps525.txt F: drivers/clk/clk_zynq.c F: drivers/fpga/zynqpl.c F: drivers/gpio/zynq_gpio.c diff --git a/doc/device-tree-bindings/video/syncoam,seps525.txt b/doc/device-tree-bindings/video/syncoam,seps525.txt new file mode 100644 index 000000000000..e1e0db9d71fb --- /dev/null +++ b/doc/device-tree-bindings/video/syncoam,seps525.txt @@ -0,0 +1,24 @@ +spi based seps525 framebuffer display driver + +Driver for seps525 display controller (in spi mode), This binding supports selection +of spi chipselect, spi max frequency, gpio to drive dc and reset pin of seps525 +controller and spi transaction bit length. + +Required properties: +- compatible: "syncoam,seps525" +- reg: Specifies the chip-select the seps525 is connected to on the spi bus +- reset-gpios: gpio connected to reset pin of seps525 controller. +- dc-gpios: gpio connected to dc pin of seps525 controller: +- buswidth: bitlength of each spi transaction + +Example: + displayspi@0 { + compatible = "syncoam,seps525"; + reg = <0>; + spi-max-frequency = <10000000>; + spi-cpol; + spi-cpha; + buswidth = <8>; + reset-gpios = <&gpio 0x1c GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio 0x1b GPIO_ACTIVE_HIGH>; + }; From patchwork Mon Dec 14 08:37:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1415850 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=2EZeEiie; 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id e19sm15363052edr.61.2020.12.14.00.38.05 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 14 Dec 2020 00:38:06 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com, vikhyat.goyal@xilinx.com, Simon Glass Cc: Alex Nemirovsky , Anastasiia Lukianenko , Anatolij Gustschin , Heinrich Schuchardt , Lokesh Vutla , Masahiro Yamada , Patrice Chotard , Rayagonda Kokatanur , Robert Marko , Sam Protsenko , Sean Anderson , Stefan Bosch Subject: [PATCH v2 5/5] video: seps525: Add seps525 SPI driver Date: Mon, 14 Dec 2020 09:37:52 +0100 Message-Id: X-Mailer: git-send-email 2.29.2 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Add support for the WiseChip Semiconductor Inc. (UG-6028GDEBF02) display using the SEPS525 (Syncoam) LCD Controller. Syncoam Seps525 PM-Oled is RGB 160x128 display. This driver has been tested through zynq-spi driver. ZynqMP> load mmc 1 100000 rainbow.bmp 61562 bytes read in 20 ms (2.9 MiB/s) ZynqMP> bmp info 100000 Image size : 160 x 128 Bits per pixel: 24 Compression : 0 ZynqMP> bmp display 100000 ZynqMP> setenv stdout vidconsole Signed-off-by: Michal Simek Reviewed-by: Simon Glass --- Changes in v2: - Fix Kconfig entry and use VIDEO_SEPS525 instead of SEPS525 and fix location - Add kernel-doc structure for seps525_priv structure - Remove flags variable and use macros directly MAINTAINERS | 1 + drivers/video/Kconfig | 7 + drivers/video/Makefile | 1 + drivers/video/seps525.c | 327 ++++++++++++++++++++++++++++++++++++++++ 4 files changed, 336 insertions(+) create mode 100644 drivers/video/seps525.c diff --git a/MAINTAINERS b/MAINTAINERS index 11857ece9a53..847b63685a29 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -589,6 +589,7 @@ F: drivers/spi/zynq_qspi.c F: drivers/spi/zynq_spi.c F: drivers/timer/cadence-ttc.c F: drivers/usb/host/ehci-zynq.c +F: drivers/video/seps525.c F: drivers/watchdog/cdns_wdt.c F: include/zynqmppl.h F: include/zynqmp_firmware.h diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 998271b9b628..71363409f04e 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -652,6 +652,13 @@ config VIDEO_NX HDMI. This option enables this support which can be used on devices which have an eDP display connected. +config VIDEO_SEPS525 + bool "Enable video support for Seps525" + depends on DM_VIDEO + help + Enable support for the Syncoam PM-OLED display driver (RGB 160x128). + Currently driver is supporting only SPI interface. + source "drivers/video/nexell/Kconfig" config VIDEO diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 67a492a2d60d..9db96aa891a3 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -70,6 +70,7 @@ obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o obj-$(CONFIG_VIDEO_TEGRA20) += tegra.o obj-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o obj-$(CONFIG_VIDEO_VESA) += vesa.o +obj-$(CONFIG_VIDEO_SEPS525) += seps525.o obj-y += bridge/ obj-y += sunxi/ diff --git a/drivers/video/seps525.c b/drivers/video/seps525.c new file mode 100644 index 000000000000..2b4d5bdda04e --- /dev/null +++ b/drivers/video/seps525.c @@ -0,0 +1,327 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * FB driver for the WiseChip Semiconductor Inc. (UG-6028GDEBF02) display + * using the SEPS525 (Syncoam) LCD Controller + * + * Copyright (C) 2020 Xilinx Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define WIDTH 160 +#define HEIGHT 128 + +#define SEPS525_INDEX 0x00 +#define SEPS525_STATUS_RD 0x01 +#define SEPS525_OSC_CTL 0x02 +#define SEPS525_IREF 0x80 +#define SEPS525_CLOCK_DIV 0x03 +#define SEPS525_REDUCE_CURRENT 0x04 +#define SEPS525_SOFT_RST 0x05 +#define SEPS525_DISP_ONOFF 0x06 +#define SEPS525_PRECHARGE_TIME_R 0x08 +#define SEPS525_PRECHARGE_TIME_G 0x09 +#define SEPS525_PRECHARGE_TIME_B 0x0A +#define SEPS525_PRECHARGE_CURRENT_R 0x0B +#define SEPS525_PRECHARGE_CURRENT_G 0x0C +#define SEPS525_PRECHARGE_CURRENT_B 0x0D +#define SEPS525_DRIVING_CURRENT_R 0x10 +#define SEPS525_DRIVING_CURRENT_G 0x11 +#define SEPS525_DRIVING_CURRENT_B 0x12 +#define SEPS525_DISPLAYMODE_SET 0x13 +#define SEPS525_RGBIF 0x14 +#define SEPS525_RGB_POL 0x15 +#define SEPS525_MEMORY_WRITEMODE 0x16 +#define SEPS525_MX1_ADDR 0x17 +#define SEPS525_MX2_ADDR 0x18 +#define SEPS525_MY1_ADDR 0x19 +#define SEPS525_MY2_ADDR 0x1A +#define SEPS525_MEMORY_ACCESS_POINTER_X 0x20 +#define SEPS525_MEMORY_ACCESS_POINTER_Y 0x21 +#define SEPS525_DDRAM_DATA_ACCESS_PORT 0x22 +#define SEPS525_GRAY_SCALE_TABLE_INDEX 0x50 +#define SEPS525_GRAY_SCALE_TABLE_DATA 0x51 +#define SEPS525_DUTY 0x28 +#define SEPS525_DSL 0x29 +#define SEPS525_D1_DDRAM_FAC 0x2E +#define SEPS525_D1_DDRAM_FAR 0x2F +#define SEPS525_D2_DDRAM_SAC 0x31 +#define SEPS525_D2_DDRAM_SAR 0x32 +#define SEPS525_SCR1_FX1 0x33 +#define SEPS525_SCR1_FX2 0x34 +#define SEPS525_SCR1_FY1 0x35 +#define SEPS525_SCR1_FY2 0x36 +#define SEPS525_SCR2_SX1 0x37 +#define SEPS525_SCR2_SX2 0x38 +#define SEPS525_SCR2_SY1 0x39 +#define SEPS525_SCR2_SY2 0x3A +#define SEPS525_SCREEN_SAVER_CONTEROL 0x3B +#define SEPS525_SS_SLEEP_TIMER 0x3C +#define SEPS525_SCREEN_SAVER_MODE 0x3D +#define SEPS525_SS_SCR1_FU 0x3E +#define SEPS525_SS_SCR1_MXY 0x3F +#define SEPS525_SS_SCR2_FU 0x40 +#define SEPS525_SS_SCR2_MXY 0x41 +#define SEPS525_MOVING_DIRECTION 0x42 +#define SEPS525_SS_SCR2_SX1 0x47 +#define SEPS525_SS_SCR2_SX2 0x48 +#define SEPS525_SS_SCR2_SY1 0x49 +#define SEPS525_SS_SCR2_SY2 0x4A + +/* SEPS525_DISPLAYMODE_SET */ +#define MODE_SWAP_BGR BIT(7) +#define MODE_SM BIT(6) +#define MODE_RD BIT(5) +#define MODE_CD BIT(4) + +/** + * struct seps525_priv - Private structure + * @reset_gpio: Reset gpio pin + * @dc_gpio: Data/command control gpio pin + * @dev: Device uclass for video_ops + */ +struct seps525_priv { + struct gpio_desc reset_gpio; + struct gpio_desc dc_gpio; + struct udevice *dev; +}; + +static int seps525_spi_write_cmd(struct udevice *dev, u8 reg) +{ + struct seps525_priv *priv = dev_get_priv(dev); + u8 buf8 = reg; + int ret; + + ret = dm_gpio_set_value(&priv->dc_gpio, 0); + if (ret) { + dev_dbg(dev, "Failed to handle dc\n"); + return ret; + } + + ret = dm_spi_xfer(dev, 8, &buf8, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) + dev_dbg(dev, "Failed to write command\n"); + + return ret; +} + +static int seps525_spi_write_data(struct udevice *dev, u8 val) +{ + struct seps525_priv *priv = dev_get_priv(dev); + u8 buf8 = val; + int ret; + + ret = dm_gpio_set_value(&priv->dc_gpio, 1); + if (ret) { + dev_dbg(dev, "Failed to handle dc\n"); + return ret; + } + + ret = dm_spi_xfer(dev, 8, &buf8, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) + dev_dbg(dev, "Failed to write data\n"); + + return ret; +} + +static void seps525_spi_write(struct udevice *dev, u8 reg, u8 val) +{ + (void)seps525_spi_write_cmd(dev, reg); + (void)seps525_spi_write_data(dev, val); +} + +static int seps525_display_init(struct udevice *dev) +{ + /* Disable Oscillator Power Down */ + seps525_spi_write(dev, SEPS525_REDUCE_CURRENT, 0x03); + mdelay(5); + + /* Set Normal Driving Current */ + seps525_spi_write(dev, SEPS525_REDUCE_CURRENT, 0x00); + mdelay(5); + + seps525_spi_write(dev, SEPS525_SCREEN_SAVER_CONTEROL, 0x00); + /* Set EXPORT1 Pin at Internal Clock */ + seps525_spi_write(dev, SEPS525_OSC_CTL, 0x01); + /* Set Clock as 120 Frames/Sec */ + seps525_spi_write(dev, SEPS525_CLOCK_DIV, 0x90); + /* Set Reference Voltage Controlled by External Resister */ + seps525_spi_write(dev, SEPS525_IREF, 0x01); + + /* precharge time R G B */ + seps525_spi_write(dev, SEPS525_PRECHARGE_TIME_R, 0x04); + seps525_spi_write(dev, SEPS525_PRECHARGE_TIME_G, 0x05); + seps525_spi_write(dev, SEPS525_PRECHARGE_TIME_B, 0x05); + + /* precharge current R G B (uA) */ + seps525_spi_write(dev, SEPS525_PRECHARGE_CURRENT_R, 0x9D); + seps525_spi_write(dev, SEPS525_PRECHARGE_CURRENT_G, 0x8C); + seps525_spi_write(dev, SEPS525_PRECHARGE_CURRENT_B, 0x57); + + /* driving current R G B (uA) */ + seps525_spi_write(dev, SEPS525_DRIVING_CURRENT_R, 0x56); + seps525_spi_write(dev, SEPS525_DRIVING_CURRENT_G, 0x4D); + seps525_spi_write(dev, SEPS525_DRIVING_CURRENT_B, 0x46); + /* Set Color Sequence */ + seps525_spi_write(dev, SEPS525_DISPLAYMODE_SET, 0x00); + /* Set MCU Interface Mode */ + seps525_spi_write(dev, SEPS525_RGBIF, 0x01); + /* Set Memory Write Mode */ + seps525_spi_write(dev, SEPS525_MEMORY_WRITEMODE, 0x66); + /* 1/128 Duty (0x0F~0x7F) */ + seps525_spi_write(dev, SEPS525_DUTY, 0x7F); + /* Set Mapping RAM Display Start Line (0x00~0x7F) */ + seps525_spi_write(dev, SEPS525_DSL, 0x00); + /* Display On (0x00/0x01) */ + seps525_spi_write(dev, SEPS525_DISP_ONOFF, 0x01); + /* Set All Internal Register Value as Normal Mode */ + seps525_spi_write(dev, SEPS525_SOFT_RST, 0x00); + /* Set RGB Interface Polarity as Active Low */ + seps525_spi_write(dev, SEPS525_RGB_POL, 0x00); + + /* Enable access for data */ + (void)seps525_spi_write_cmd(dev, SEPS525_DDRAM_DATA_ACCESS_PORT); + + return 0; +} + +static int seps525_spi_startup(struct udevice *dev) +{ + struct seps525_priv *priv = dev_get_priv(dev); + int ret; + + ret = dm_gpio_set_value(&priv->reset_gpio, 1); + if (ret) + return ret; + + ret = dm_gpio_set_value(&priv->reset_gpio, 0); + if (ret) + return ret; + + ret = dm_spi_claim_bus(dev); + if (ret) { + dev_err(dev, "Failed to claim SPI bus: %d\n", ret); + return ret; + } + + ret = seps525_display_init(dev); + if (ret) + return ret; + + dm_spi_release_bus(dev); + + return 0; +} + +static int seps525_sync(struct udevice *vid) +{ + struct video_priv *uc_priv = dev_get_uclass_priv(vid); + struct seps525_priv *priv = dev_get_priv(vid); + struct udevice *dev = priv->dev; + int i, ret; + u8 data1, data2; + u8 *start = uc_priv->fb; + + ret = dm_spi_claim_bus(dev); + if (ret) { + dev_err(dev, "Failed to claim SPI bus: %d\n", ret); + return ret; + } + + /* start position X,Y */ + seps525_spi_write(dev, SEPS525_MEMORY_ACCESS_POINTER_X, 0); + seps525_spi_write(dev, SEPS525_MEMORY_ACCESS_POINTER_Y, 0); + + /* Enable access for data */ + (void)seps525_spi_write_cmd(dev, SEPS525_DDRAM_DATA_ACCESS_PORT); + + for (i = 0; i < (uc_priv->xsize * uc_priv->ysize); i++) { + data2 = *start++; + data1 = *start++; + (void)seps525_spi_write_data(dev, data1); + (void)seps525_spi_write_data(dev, data2); + } + + dm_spi_release_bus(dev); + + return 0; +} + +static int seps525_probe(struct udevice *dev) +{ + struct video_priv *uc_priv = dev_get_uclass_priv(dev); + struct seps525_priv *priv = dev_get_priv(dev); + u32 buswidth; + int ret; + + buswidth = dev_read_u32_default(dev, "buswidth", 0); + if (buswidth != 8) { + dev_err(dev, "Only 8bit buswidth is supported now"); + return -EINVAL; + } + + ret = gpio_request_by_name(dev, "reset-gpios", 0, + &priv->reset_gpio, GPIOD_IS_OUT); + if (ret) { + dev_err(dev, "missing reset GPIO\n"); + return ret; + } + + ret = gpio_request_by_name(dev, "dc-gpios", 0, + &priv->dc_gpio, GPIOD_IS_OUT); + if (ret) { + dev_err(dev, "missing dc GPIO\n"); + return ret; + } + + uc_priv->bpix = VIDEO_BPP16; + uc_priv->xsize = WIDTH; + uc_priv->ysize = HEIGHT; + uc_priv->rot = 0; + + priv->dev = dev; + + ret = seps525_spi_startup(dev); + if (ret) + return ret; + + return 0; +} + +static int seps525_bind(struct udevice *dev) +{ + struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); + + plat->size = WIDTH * HEIGHT * 16; + + return 0; +} + +static const struct video_ops seps525_ops = { + .video_sync = seps525_sync, +}; + +static const struct udevice_id seps525_ids[] = { + { .compatible = "syncoam,seps525" }, + { } +}; + +U_BOOT_DRIVER(seps525_video) = { + .name = "seps525_video", + .id = UCLASS_VIDEO, + .of_match = seps525_ids, + .ops = &seps525_ops, + .platdata_auto_alloc_size = sizeof(struct video_uc_platdata), + .bind = seps525_bind, + .probe = seps525_probe, + .priv_auto_alloc_size = sizeof(struct seps525_priv), +};