From patchwork Tue Nov 17 20:15:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 1401820 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=ZFQesfAk; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CbHKm34M0z9sSn for ; Wed, 18 Nov 2020 07:17:16 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731706AbgKQUQT (ORCPT ); Tue, 17 Nov 2020 15:16:19 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:51092 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726851AbgKQUQQ (ORCPT ); Tue, 17 Nov 2020 15:16:16 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0AHKGCch066056; Tue, 17 Nov 2020 14:16:12 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1605644172; bh=WvkCGz2iuxVOMGMnfv0mX3hEFweRTvsdysXYnm8TVkI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ZFQesfAkwr1MZ9oRK+d2g99Z4zi017ts3hAn0P/zCvTJ1KreWib933xGeeR3jSHvd t10M4MNfHhM2EgGOf649HseDhMEjd+qm8t8vba0tsqCE40E+vHmL39GTas+FDT1DZ7 kbq0ve0z20ZpMVG5bC9sY/L+4BUi8IlhLaJtGR48= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0AHKGCvY016165 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 17 Nov 2020 14:16:12 -0600 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 17 Nov 2020 14:16:12 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 17 Nov 2020 14:16:12 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0AHKGBxY096100; Tue, 17 Nov 2020 14:16:12 -0600 From: Dan Murphy To: , , , , , CC: , , , Dan Murphy Subject: [PATCH net-next v4 2/4] dt-bindings: net: Add Rx/Tx output configuration for 10base T1L Date: Tue, 17 Nov 2020 14:15:53 -0600 Message-ID: <20201117201555.26723-3-dmurphy@ti.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201117201555.26723-1-dmurphy@ti.com> References: <20201117201555.26723-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Per the 802.3cg spec the 10base T1L can operate at 2 different differential voltages 1v p2p and 2.4v p2p. The abiility of the PHY to drive that output is dependent on the PHY's on board power supply. This common feature is applicable to all 10base T1L PHYs so this binding property belongs in a top level ethernet document. Signed-off-by: Dan Murphy --- Documentation/devicetree/bindings/net/ethernet-phy.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index 6dd72faebd89..bda1ce51836b 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -174,6 +174,12 @@ properties: PHY's that have configurable TX internal delays. If this property is present then the PHY applies the TX delay. + max-tx-rx-p2p-microvolt: + description: | + Configures the Tx/Rx p2p differential output voltage for 10base-T1L PHYs. + enum: [ 1100, 2400 ] + default: 2400 + required: - reg From patchwork Tue Nov 17 20:15:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 1401821 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=wBH1xp12; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CbHKn38Svz9sPB for ; Wed, 18 Nov 2020 07:17:17 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731796AbgKQUQZ (ORCPT ); Tue, 17 Nov 2020 15:16:25 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:47448 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731758AbgKQUQY (ORCPT ); Tue, 17 Nov 2020 15:16:24 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0AHKGHAm098393; Tue, 17 Nov 2020 14:16:17 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1605644177; bh=hAP7xTIYE/3si6W5mQOK90txjunkGtM3wxWyq7hnqgQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=wBH1xp12wc2/aORPdrooKq0nLB+B7qI1wWWiRGdTpPzBnmyn+MT5ezJ8bum+cz0hW 6IVkS/1ztp74E/Q6Qy2tjzHRn8qtVf+5/bmI5zcVhlath2F7gYXHlY/2OE9d5pKCkd ibJHWCNubvse3kc0tFtgT2LqEESe+UoUhw0Jlep8= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0AHKGH6l016215 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 17 Nov 2020 14:16:17 -0600 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 17 Nov 2020 14:16:17 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 17 Nov 2020 14:16:17 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0AHKGHXp096184; Tue, 17 Nov 2020 14:16:17 -0600 From: Dan Murphy To: , , , , , CC: , , , Dan Murphy Subject: [PATCH net-next v4 3/4] dt-bindings: dp83td510: Add binding for DP83TD510 Ethernet PHY Date: Tue, 17 Nov 2020 14:15:54 -0600 Message-ID: <20201117201555.26723-4-dmurphy@ti.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201117201555.26723-1-dmurphy@ti.com> References: <20201117201555.26723-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The DP83TD510 is a 10M single twisted pair Ethernet PHY Signed-off-by: Dan Murphy --- .../devicetree/bindings/net/ti,dp83td510.yaml | 64 +++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/ti,dp83td510.yaml diff --git a/Documentation/devicetree/bindings/net/ti,dp83td510.yaml b/Documentation/devicetree/bindings/net/ti,dp83td510.yaml new file mode 100644 index 000000000000..d3c97bb4d820 --- /dev/null +++ b/Documentation/devicetree/bindings/net/ti,dp83td510.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2020 Texas Instruments Incorporated +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/net/ti,dp83td510.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: TI DP83TD510 ethernet PHY + +allOf: + - $ref: "ethernet-controller.yaml#" + - $ref: "ethernet-phy.yaml#" + +maintainers: + - Dan Murphy + +description: | + The PHY is an twisted pair 10Mbps Ethernet PHY that support MII, RMII and + RGMII interfaces. + + Specifications about the Ethernet PHY can be found at: + http://www.ti.com/lit/ds/symlink/dp83td510e.pdf + +properties: + reg: + maxItems: 1 + + tx-fifo-depth: + description: | + Transmitt FIFO depth for RMII mode. The PHY only exposes 4 nibble + depths. The valid nibble depths are 4, 5, 6 and 8. + enum: [ 4, 5, 6, 8 ] + default: 5 + + rx-internal-delay-ps: + description: | + Setting this property to a non-zero number sets the RX internal delay + for the PHY. The internal delay for the PHY is fixed to 30ns relative + to receive data. + + tx-internal-delay-ps: + description: | + Setting this property to a non-zero number sets the TX internal delay + for the PHY. The internal delay for the PHY has a range of -4 to 4ns + relative to transmit data. + +unevaluatedProperties: false + +required: + - reg + +examples: + - | + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + ethphy0: ethernet-phy@0 { + reg = <0>; + tx-rx-output-high; + tx-fifo-depth = <5>; + rx-internal-delay-ps = <1>; + tx-internal-delay-ps = <1>; + }; + };