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[58.96.106.158]) by smtp.gmail.com with ESMTPSA id e11sm5447545pfl.58.2020.10.28.03.50.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Oct 2020 03:51:00 -0700 (PDT) Received: by bubble.grove.modra.org (Postfix, from userid 1000) id B89F785892; Wed, 28 Oct 2020 21:20:56 +1030 (ACDT) Date: Wed, 28 Oct 2020 21:20:56 +1030 To: gcc-patches@gcc.gnu.org Subject: [RS6000] Don't be too clever with dg-do run and dg-do compile Message-ID: <20201028105056.GZ15956@bubble.grove.modra.org> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.9.4 (2018-02-28) X-Spam-Status: No, score=-13.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Alan Modra via Gcc-patches From: Alan Modra Reply-To: Alan Modra Cc: Segher Boessenkool , David Edelsohn Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Otherwise some versions of dejagnu go ahead and run the vsx tests below when they should not. To best cope with older dejagnu, put "run" before "compile", the idea being that if the second dg-do always wins then that won't cause fails. The altivec tests also need -save-temps for the scan-assembler test to occur when vms_hw. Regression tested powerpc64le-linux and powerpc64-linux. OK? * gcc.target/powerpc/vsx-load-element-extend-char.c: Put "dg-do run" before "dg-do compile", and make them mutually exclusive. * gcc.target/powerpc/vsx-load-element-extend-int.c: Likewise. * gcc.target/powerpc/vsx-load-element-extend-longlong.c: Likewise. * gcc.target/powerpc/vsx-load-element-extend-short.c: Likewise. * gcc.target/powerpc/vsx-store-element-truncate-char.c: Likewise. * gcc.target/powerpc/vsx-store-element-truncate-int.c: Likewise. * gcc.target/powerpc/vsx-store-element-truncate-longlong.c: Likewise. * gcc.target/powerpc/vsx-store-element-truncate-short.c: Likewise. * gcc.target/powerpc/altivec-consts.c: Likewise, add -save-temps. * gcc.target/powerpc/le-altivec-consts.c: Likewise. diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-consts.c b/gcc/testsuite/gcc.target/powerpc/altivec-consts.c index d59f9b4cf1c..c68c68125d1 100644 --- a/gcc/testsuite/gcc.target/powerpc/altivec-consts.c +++ b/gcc/testsuite/gcc.target/powerpc/altivec-consts.c @@ -1,7 +1,7 @@ /* { dg-do run { target vmx_hw } } */ -/* { dg-do compile } */ +/* { dg-do compile { target { ! vmx_hw } } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-options "-maltivec -mabi=altivec -O2" } */ +/* { dg-options "-maltivec -mabi=altivec -O2 -save-temps" } */ /* Check that "easy" AltiVec constants are correctly synthesized. */ diff --git a/gcc/testsuite/gcc.target/powerpc/le-altivec-consts.c b/gcc/testsuite/gcc.target/powerpc/le-altivec-consts.c index f48ef44e676..a1db5e92f87 100644 --- a/gcc/testsuite/gcc.target/powerpc/le-altivec-consts.c +++ b/gcc/testsuite/gcc.target/powerpc/le-altivec-consts.c @@ -1,7 +1,7 @@ /* { dg-do run { target vmx_hw } } */ -/* { dg-do compile } */ +/* { dg-do compile { target { ! vmx_hw } } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-options "-maltivec -mabi=altivec -O2" } */ +/* { dg-options "-maltivec -mabi=altivec -O2 -save-temps" } */ /* Check that "easy" AltiVec constants are correctly synthesized. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-char.c b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-char.c index f386346e059..c23a9128680 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-char.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-char.c @@ -2,8 +2,9 @@ Test of vec_xl_sext and vec_xl_zext (load into rightmost vector element and zero/sign extend). */ -/* { dg-do compile {target power10_ok} } */ -/* { dg-do run {target power10_hw} } */ +/* { dg-do run { target power10_hw } } */ +/* { dg-do compile { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-require-effective-target int128 } */ /* { dg-options "-mdejagnu-cpu=power10 -O3 -save-temps" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-int.c b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-int.c index ea737466a58..c40e1a3a0f7 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-int.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-int.c @@ -2,8 +2,9 @@ Test of vec_xl_sext and vec_xl_zext (load into rightmost vector element and zero/sign extend). */ -/* { dg-do compile {target power10_ok} } */ -/* { dg-do run {target power10_hw} } */ +/* { dg-do run { target power10_hw } } */ +/* { dg-do compile { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-require-effective-target int128 } */ /* Deliberately set optization to zero for this test to confirm diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-longlong.c b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-longlong.c index cd155c2013d..405b4245f8e 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-longlong.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-longlong.c @@ -2,8 +2,9 @@ Test of vec_xl_sext and vec_xl_zext (load into rightmost vector element and zero/sign extend). */ -/* { dg-do compile {target power10_ok} } */ -/* { dg-do run {target power10_hw} } */ +/* { dg-do run { target power10_hw } } */ +/* { dg-do compile { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-require-effective-target int128 } */ /* { dg-options "-mdejagnu-cpu=power10 -O3 -save-temps" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-short.c b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-short.c index 68fdcdcea37..837ba79c9ab 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-short.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-short.c @@ -2,8 +2,9 @@ Test of vec_xl_sext and vec_xl_zext (load into rightmost vector element and zero/sign extend). */ -/* { dg-do compile {target power10_ok} } */ -/* { dg-do run {target power10_hw} } */ +/* { dg-do run { target power10_hw } } */ +/* { dg-do compile { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-require-effective-target int128 } */ /* Deliberately set optization to zero for this test to confirm diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-char.c b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-char.c index 45c49547d66..3049b1c2c28 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-char.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-char.c @@ -1,8 +1,9 @@ /* Test of vec_xst_trunc (truncate and store rightmost vector element) */ -/* { dg-do compile {target power10_ok} } */ -/* { dg-do run {target power10_hw} } */ +/* { dg-do run { target power10_hw } } */ +/* { dg-do compile { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-require-effective-target int128 } */ /* Deliberately set optization to zero for this test to confirm the stxvr*x instruction is generated. At higher optimization levels diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-int.c b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-int.c index f263e3d5cc9..7cc7699f8eb 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-int.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-int.c @@ -1,8 +1,9 @@ /* Test of vec_xst_trunc (truncate and store rightmost vector element) */ -/* { dg-do compile {target power10_ok} } */ -/* { dg-do run {target power10_hw} } */ +/* { dg-do run { target power10_hw } } */ +/* { dg-do compile { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-require-effective-target int128 } */ /* Deliberately set optization to zero for this test to confirm the stxvr*x instruction is generated. At higher optimization levels diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-longlong.c b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-longlong.c index 0eeef5e6ba9..e1bd0216611 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-longlong.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-longlong.c @@ -1,8 +1,9 @@ /* Test of vec_xst_trunc (truncate and store rightmost vector element) */ -/* { dg-do compile {target power10_ok} } */ -/* { dg-do run {target power10_hw} } */ +/* { dg-do run { target power10_hw } } */ +/* { dg-do compile { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-require-effective-target int128 } */ /* Deliberately set optization to zero for this test to confirm diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-short.c b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-short.c index 0186ddc552f..b173b36dbda 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-short.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-short.c @@ -1,8 +1,9 @@ /* Test of vec_xst_trunc (truncate and store rightmost vector element) */ -/* { dg-do compile {target power10_ok} } */ -/* { dg-do run {target power10_hw} } */ +/* { dg-do run { target power10_hw } } */ +/* { dg-do compile { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-require-effective-target int128 } */ /* Deliberately set optization to zero for this test to confirm