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[81.34.51.75]) by smtp.gmail.com with ESMTPSA id g14sm4927400wrx.22.2020.10.14.06.07.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Oct 2020 06:07:29 -0700 (PDT) From: Jorge Ramirez-Ortiz To: jorge@foundries.io, sbabic@denx.de, festevam@gmail.com Cc: uboot-imx@nxp.com, u-boot@lists.denx.de, mike@foundries.io Subject: [PATCH] mx6: peripheral clock from oscillator Date: Wed, 14 Oct 2020 15:07:26 +0200 Message-Id: <20201014130726.21984-1-jorge@foundries.io> X-Mailer: git-send-email 2.17.1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean In order to be able to run the I2C bus at 400Khz, the chip errata[1] recommends that the peripheral clock runs out of the 24MHz oscillator. [1] Rev 2, 10/2019, ERR007805 Signed-off-by: Jorge Ramirez-Ortiz Reviewed-by: Peng Fan --- arch/arm/mach-imx/mx6/soc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index e129286065..1da250bbcd 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -469,7 +469,7 @@ int arch_cpu_init(void) } /* Set perclk to source from OSC 24MHz */ - if (is_mx6sl()) + if (is_mx6sl() || is_mx6ull()) setbits_le32(&ccm->cscmr1, MXC_CCM_CSCMR1_PER_CLK_SEL_MASK); imx_wdog_disable_powerdown(); /* Disable PDE bit of WMCR register */