From patchwork Mon Oct 12 02:53:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1380594 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C8jtN5RL2z9s0b for ; Mon, 12 Oct 2020 13:53:48 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=S/KBKtIS; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4C8jtK6pzKzDqhF for ; Mon, 12 Oct 2020 13:53:45 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::444; helo=mail-pf1-x444.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=S/KBKtIS; dkim-atps=neutral Received: from mail-pf1-x444.google.com (mail-pf1-x444.google.com [IPv6:2607:f8b0:4864:20::444]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4C8jt75MfKzDqZL for ; Mon, 12 Oct 2020 13:53:34 +1100 (AEDT) Received: by mail-pf1-x444.google.com with SMTP id x13so9595867pfa.9 for ; Sun, 11 Oct 2020 19:53:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=uMyis1CpjAxKanYbuB7z0PbAmxBIjjpyOfITdw3i6sU=; b=S/KBKtIS09AguwFTEwVqwoAA7uBrU5WCNMHiMDxJGnLinLAQgX+ojxKZpT8C2GYn0S dEe75BLCgoI2Q8Phr/TLR6enRlx90libS/+M55V+hTllrGoEUzi2qNhfHFCdSP6E5ipR u4LtD012KxNmzpcBG4lndMbqf+BiPhf3svjeJyx+wo4x6XLVuDr7NCsiQJsHBMdtWJOB 8bOBXo1vGKFKSQR5N1Rg9TUQ37EZGIVfy6cBxRL2cxEpEQDxnnSSo+Pfhn5IialoUfQX EvYZHt0Q4+AWoOAb8L7b23jgvWC6A9mpSQM+ZQuuE/YbKtUG11QLudi/kiX9mnGAUuoX 3k8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=uMyis1CpjAxKanYbuB7z0PbAmxBIjjpyOfITdw3i6sU=; b=hFAt10MRPH3wCLD0HPcpiYN79ZcQgcFHQ5xZG0DnVYNYL43+TyUV5s8yMFYwvP5Awf s/+MqNrx0TJbUmyjC2Kw3zm2YNbtF4J/UlalW9K+zah/k6u+MHJ5WqCysBAF+B+qpIzY r2XtaqTcxJclHO2n5GwJb9oaZwrd3z+8GSpVEZwgFpmzI+d3nVeY2mBje4b4LBr2GQkY PKOM2rmh+Yyqtp0iO9JE/IJzr3CQa9ADveb+0GJC2aCw5z6dLXt6DPIqrmtKRDhXn4PT Nfu/q9A/pMBC0nP9mAmDqEbxg29Kyjd9VbYk98wZkSkSBrHusRYNKuBNIuj9P8bRbqXi rOJg== X-Gm-Message-State: AOAM531u72vVeTipVzEDz5XG9+qSBbY+uWvDm2s8OqWOI6PfO7S+5PJc Z0rLiWYjvkJz+77Abntmn3WJohN6Uv4M/g== X-Google-Smtp-Source: ABdhPJxUjhShRglvWznr930ns/TfyDjP9Y1D4TyxCK1ElOjIdY51M+8SEnPEYqbNZIs5B2N2SPeTVQ== X-Received: by 2002:a62:4e87:0:b029:154:fdb9:548 with SMTP id c129-20020a624e870000b0290154fdb90548mr21350259pfb.26.1602471212718; Sun, 11 Oct 2020 19:53:32 -0700 (PDT) Received: from localhost.ibm.com (14-200-206-90.tpgi.com.au. [14.200.206.90]) by smtp.gmail.com with ESMTPSA id g4sm17909258pgg.75.2020.10.11.19.53.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Oct 2020 19:53:32 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Mon, 12 Oct 2020 13:53:05 +1100 Message-Id: <20201012025314.1070230-1-oohall@gmail.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Subject: [Skiboot] [PATCH 01/10] external/trace: Fall back to read() X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Not all kernels support mmap() on an OPAL exported memory range. Fall back to allocating a buffer and using the normal file IO system calls to read the contents of the trace buffer in those cases. This does mean we can't use "follow" mode since we can't monitor the raw trace data effectively, but otherwise it works fine. Signed-off-by: Oliver O'Halloran --- external/trace/dump_trace.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/external/trace/dump_trace.c b/external/trace/dump_trace.c index aba684b5b8b1..5a832c791fb6 100644 --- a/external/trace/dump_trace.c +++ b/external/trace/dump_trace.c @@ -261,6 +261,7 @@ int main(int argc, char *argv[]) { struct trace_reader *trs; struct trace_info *ti; + bool no_mmap = false; struct stat sb; int fd, opt, i; @@ -296,13 +297,26 @@ int main(int argc, char *argv[]) err(1, "Stating %s", argv[1]); ti = mmap(NULL, sb.st_size, PROT_READ, MAP_PRIVATE, fd, 0); - if (ti == MAP_FAILED) - err(1, "Mmaping %s", argv[i]); + if (ti == MAP_FAILED) { + no_mmap = true; + + ti = ezalloc(sb.st_size); + if (!ti) + err(1, "allocating memory for %s", argv[i]); + + if (read(fd, ti, sb.st_size) == -1) + err(1, "reading from %s", argv[i]); + } trs[i].tb = &ti->tb; list_head_init(&trs[i].traces); } + if (no_mmap) { + fprintf(stderr, "disabling follow mode: can't mmap() OPAL export files\n"); + follow = 0; + } + do { load_traces(trs, argc); display_traces(trs, argc); From patchwork Mon Oct 12 02:53:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1380595 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C8jtm1NWcz9s0b for ; Mon, 12 Oct 2020 13:54:08 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=jQTV0c23; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4C8jtm0WGzzDql0 for ; Mon, 12 Oct 2020 13:54:08 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::444; helo=mail-pf1-x444.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=jQTV0c23; dkim-atps=neutral Received: from mail-pf1-x444.google.com (mail-pf1-x444.google.com [IPv6:2607:f8b0:4864:20::444]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4C8jt91LHnzDqZL for ; Mon, 12 Oct 2020 13:53:36 +1100 (AEDT) Received: by mail-pf1-x444.google.com with SMTP id w21so12213715pfc.7 for ; Sun, 11 Oct 2020 19:53:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=puTJBKi0zvZcQ2Njy7jOelT+KnP3CxowFq92wzmHPFQ=; b=jQTV0c23PFhsGwxU0KchBL8da25vcErPEhVgo14n+gDvGfBEKidWKx+tXLhXofLxMT X8abYsIMyjMqvtzq6S1gFxGBvZpcX2ytMaGKUZMtglodjrU0Hir+T5dbP5Fq5jCakUv3 bxB7GPKfElZoJMDM9IbMC+JQe659zSM3y47U2n0rCPRPM274eecg0t53JifYxFsJRipT Ova9I8kSL2xsxbZCAXOHM4EF4+IIiVzReqlFC0xvpd7LazxPS5dKBvZXehqL7ALqMLqr qmFqKK4nMF6h9DGLyEjjRxr7bc64nlZJ3X6Cj+iSW5rm6RJpOkixI1ya87zwJYlyO1hx 4nGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=puTJBKi0zvZcQ2Njy7jOelT+KnP3CxowFq92wzmHPFQ=; b=SN3bq1th9U5vwlEf5lzknwe2SD8izOJYLKONvclM+XMndyXcWKRVZollaWu0yF003W XJqBanm1P7AzBaPpg0JuFhDGlihtESYa6bAVtBm100OYJcd+0/vQPa7aI7QAongyV+nQ e24iTcxdqc6VPOSmCJd5vYSgwm9kk8sqOuHDavwISWpX4ZQWOD25KXa1oPmOYmcnDOSb 6CCRpizd5he+YgwzvqiY8k0yOiKKSzOIj2ob2qoM6QUkWa5LeAcl4tsffRThHDvmrNoJ JRLJO+fZzGlJhYwSyR4FkHy8B2U01yzo1rQsH9SvDdD2BZWr2IbjY51Q3ZLChaLP9zuf aGdw== X-Gm-Message-State: AOAM531fdpdyHhxoMLisyEly9/FU9rk5b5/sVMF8RpYdr96T2bL9lC2p M1wLaxJNJ9ELI91RHlPH/d9syCMMpiwecA== X-Google-Smtp-Source: ABdhPJyKKlH94eNSd6fuvn2Fktp1C0ftS4hEA/mHHYi9gDvUHh15mUzMneANRHtoXr8XMpgIqFkL2A== X-Received: by 2002:aa7:9a4a:0:b029:155:323e:adae with SMTP id x10-20020aa79a4a0000b0290155323eadaemr18884116pfj.70.1602471215002; Sun, 11 Oct 2020 19:53:35 -0700 (PDT) Received: from localhost.ibm.com (14-200-206-90.tpgi.com.au. [14.200.206.90]) by smtp.gmail.com with ESMTPSA id g4sm17909258pgg.75.2020.10.11.19.53.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Oct 2020 19:53:34 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Mon, 12 Oct 2020 13:53:06 +1100 Message-Id: <20201012025314.1070230-2-oohall@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201012025314.1070230-1-oohall@gmail.com> References: <20201012025314.1070230-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 02/10] external/trace: Print timestamps in prlog()'s format X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Make the trace tool's output format match that of skiboot's prlog(). Printing a timebase tick count in hex isn't terribly useful and having a common format makes correlating trace entries to log entries much easier. Signed-off-by: Oliver O'Halloran --- external/trace/dump_trace.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/external/trace/dump_trace.c b/external/trace/dump_trace.c index 5a832c791fb6..c68eea894715 100644 --- a/external/trace/dump_trace.c +++ b/external/trace/dump_trace.c @@ -45,13 +45,18 @@ static void *ezalloc(size_t size) return p; } +#define TB_HZ 512000000ul + static void display_header(const struct trace_hdr *h) { static u64 prev_ts; u64 ts = be64_to_cpu(h->timestamp); - printf("%16lx (+%8lx) [%03x] : ", - ts, prev_ts ? (ts - prev_ts) : 0, be16_to_cpu(h->cpu)); + printf("[%5lu.%09lu,%d] (+%8lx) [%03x] : ", + ts / TB_HZ, /* match the usual skiboot log header */ + ts % TB_HZ, + h->type, /* hey why not */ + prev_ts ? (ts - prev_ts) % TB_HZ : 0, be16_to_cpu(h->cpu)); prev_ts = ts; } From patchwork Mon Oct 12 02:53:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1380596 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C8jvC2K1Kz9s0b for ; Mon, 12 Oct 2020 13:54:31 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=Q9pkbjAX; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4C8jvC1hr1zDqbf for ; Mon, 12 Oct 2020 13:54:31 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::644; helo=mail-pl1-x644.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=Q9pkbjAX; dkim-atps=neutral Received: from mail-pl1-x644.google.com (mail-pl1-x644.google.com [IPv6:2607:f8b0:4864:20::644]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4C8jtF31lFzDqZL for ; Mon, 12 Oct 2020 13:53:41 +1100 (AEDT) Received: by mail-pl1-x644.google.com with SMTP id b19so7825100pld.0 for ; Sun, 11 Oct 2020 19:53:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cYi8iNvsFTjePnPZzXqsCZLmw5Liw5pCMpv5lbEZF0k=; b=Q9pkbjAXfdYd0GIYoyQMUym8IgSelq5ghTqSWDCIQdGj8pV457ynyzkHLDLQdYzJWR C7EsJ2rburjhUp++/wG74uSsnjdB46jz4ajlwBtfz3+GIXFSqdfP+k13kiwtQGsGrujO HMZ2r8mpoPSz9Dm7FNHdlzFwhdJACIN3hVq6rm9Gt25Q6f8dKAZ5lRjFjmNjuqGk1NE7 pUsD3Q0UXCb7OOWRG9S6ax4OIBtPc2fwkzjzHV3l52MXzVzzMxqumN25xq66YIu4xI62 bqOplSgdo+pp7S17ChRVr6ltkdkVqOtTl0zp4orViiw0BX4Oz3/ALCE15wBZS5MtY42L 0xNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cYi8iNvsFTjePnPZzXqsCZLmw5Liw5pCMpv5lbEZF0k=; b=cSYpE8N1so13pTaxIy8zdssVRrKbmZWLksemjyWpemj7YXpC4Ek6yn+WHt8CfhFvMY VFGyt07l6BdKhD+h/TBs5WQUrgvGSsOr1fiPHpsH1bsadl/76WSP6SqGpHK3reJp7oT2 ZorQ9lEN5pXmMrQpUimWVXhRQhPlgELgxetPdnYdQz9VrW9vG+kZQY9cUuqt8Wx/DNtK SOAfHTensbOymDYifnCD/m/D9tJTZ58evFm5mfZuKJNq32Nlyv3U85iLpF2EKH2Y+KrK dLQWVIYLRf85EVsco0JQCPggHrU22EG+yF1NKUJVPRLsF3SeJ2FFB+ASvfdJ4yMnY9J3 1DvQ== X-Gm-Message-State: AOAM533OM23wQu0IBg6o4+Rr+a7k3aOugjnFw5I12oQKSy1XBY7UeOlw V7cB76HcOIKI9NMrWXrUxUpxRLA7rEQLuA== X-Google-Smtp-Source: ABdhPJyRUIWGizRjSCp1/YuXJdl+sqM22IfgJbITAKAOChYXmvL84Mbc3jdeEZxedLusbWRVvps5hw== X-Received: by 2002:a17:902:c3c5:b029:d3:df24:1ffb with SMTP id j5-20020a170902c3c5b02900d3df241ffbmr22076620plj.35.1602471217050; Sun, 11 Oct 2020 19:53:37 -0700 (PDT) Received: from localhost.ibm.com (14-200-206-90.tpgi.com.au. [14.200.206.90]) by smtp.gmail.com with ESMTPSA id g4sm17909258pgg.75.2020.10.11.19.53.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Oct 2020 19:53:36 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Mon, 12 Oct 2020 13:53:07 +1100 Message-Id: <20201012025314.1070230-3-oohall@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201012025314.1070230-1-oohall@gmail.com> References: <20201012025314.1070230-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 03/10] trace: Add nvram hack to use the old trace export behaviour X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Previously we put all the trace buffer exports in the exports/ node. However, there's one trace buffer for each core so I moved them into a subdirectory since they were crowding up the place. Most kernels don't support recursively exporting subnodes though so kernel's don't have support for recursively exporting subnodes, so add a hack to restore the old behaviour for now. Signed-off-by: Oliver O'Halloran --- core/init.c | 3 +++ core/trace.c | 17 ++++++++++------- include/trace.h | 1 + 3 files changed, 14 insertions(+), 7 deletions(-) diff --git a/core/init.c b/core/init.c index 6ddc7bde1be6..fbe1f90e6aae 100644 --- a/core/init.c +++ b/core/init.c @@ -1372,6 +1372,9 @@ void __noreturn __nomcount main_cpu_entry(const void *fdt) /* Disable protected execution facility in BML */ cpu_disable_pef(); + /* export the trace buffers */ + trace_add_dt_props(); + /* Now release parts of memory nodes we haven't used ourselves... */ mem_region_release_unused(); diff --git a/core/trace.c b/core/trace.c index 5a3ad4921cdf..561bd79e0654 100644 --- a/core/trace.c +++ b/core/trace.c @@ -18,6 +18,7 @@ #include #include #include +#include #define DEBUG_TRACES @@ -155,7 +156,7 @@ void trace_add(union trace *trace, u8 type, u16 len) unlock(&ti->lock); } -static void trace_add_dt_props(void) +void trace_add_dt_props(void) { uint64_t boot_buf_phys = (uint64_t) &boot_tracebuf.trace_info; struct dt_node *exports, *traces; @@ -168,9 +169,14 @@ static void trace_add_dt_props(void) if (!exports) return; - traces = dt_new(exports, "traces"); - if (!exports) - return; + /* + * nvram hack to put all the trace buffer exports in the exports + * node. This is useful if the kernel doesn't also export subnodes. + */ + if (nvram_query_safe("flat-trace-buf")) + traces = exports; + else + traces = dt_new(exports, "traces"); prop = malloc(sizeof(u64) * 2 * be32_to_cpu(debug_descriptor.num_traces)); @@ -256,7 +262,4 @@ void init_trace_buffers(void) continue; t->trace = t->primary->trace; } - - /* Trace node in DT. */ - trace_add_dt_props(); } diff --git a/include/trace.h b/include/trace.h index 04c8440b9e0c..1b1be249cbde 100644 --- a/include/trace.h +++ b/include/trace.h @@ -25,6 +25,7 @@ struct trace_info { /* Allocate trace buffers once we know memory topology */ void init_trace_buffers(void); +void trace_add_dt_props(void); /* This will fill in timestamp and cpu; you must do type and len. */ void trace_add(union trace *trace, u8 type, u16 len); From patchwork Mon Oct 12 02:53:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1380597 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C8jxp28Kwz9s0b for ; Mon, 12 Oct 2020 13:56:46 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=AuXT0Qo5; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4C8jxp1RcPzDqs2 for ; Mon, 12 Oct 2020 13:56:46 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::429; helo=mail-pf1-x429.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=AuXT0Qo5; dkim-atps=neutral Received: from mail-pf1-x429.google.com (mail-pf1-x429.google.com [IPv6:2607:f8b0:4864:20::429]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4C8jtF4crMzDqZX for ; Mon, 12 Oct 2020 13:53:41 +1100 (AEDT) Received: by mail-pf1-x429.google.com with SMTP id n14so12218171pff.6 for ; Sun, 11 Oct 2020 19:53:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=4ypS3YS/L1qtZOxW4zyab06JNSdK52odx6fGK0zNIyo=; b=AuXT0Qo51UHUh2AoZv4+9ZJ/EVb1DVn5B1eTGRHcsGYhieDqn5KsxLJ4+ydr5Imk5d z6wvAyxJND4nOLLAdmmH9/GIfAG5JCrtmfLxWGmhWW6NgmINzWGBO6AiBOusa+Siw46C mswRR/QjbiftnW5vR1lmHVxyq/w3nAfBc+NNS2arXucEJJTCyI4JPTcDsX2j5kWHvp/2 zLYKoywZCIjAnHOl8gWwLyzzL4s2l8rFQsVt/WbZnKd/gQjMKNRXo7yc+P9rdIRIvHap 7GVGHnSsf6DMKfGhG4/Dh37TjO4g/BzfSFJCNo+XV9OXEnOCQIJW4MtidtUC4J7vcBLg GZTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4ypS3YS/L1qtZOxW4zyab06JNSdK52odx6fGK0zNIyo=; b=Mnm70fV2uCqIBEZ7nGYhq68lOFgGuqk8gCJb15by70eVnsN3A65s/A8eo3j8/LUkPF sQ+sEAmAt5UqzYrhcShwVvR3vyB8CHVQY/UoO72If+puJLhg3qf0tJgTJzO0TY2CZ93X P0cEw0npC2X32/1oqhaIchPZVfBYj13cA0Mwwf0A4Rro0aBvJBXQ+vFFShbmlWpZY7ds bQLCPNeGkKDfj2G0D75SR9jiwgvD51hIlo4vUAE/n9Eo0xsbJMHZz1P8k5yFuWo1fRii SQM2QT/JIsYb1HxgN8wuKA6uJ3o5sH0zlr8FnHw+ypMkGYir9EBik6jh0sryw0jYneJh uKhA== X-Gm-Message-State: AOAM531vaHsiMuW/jsz3VQSWIw4Yst4sIMlvNXSpJ/Imv9m3VrgjSJBH GGyzRo6AQjw5YTWOpo4IG6AZBSbdmgvbqA== X-Google-Smtp-Source: ABdhPJzyZ0lecWGQMRhdHKCSnRq+MN4uXNcz03XwaTT+yL3je3Syvrq2d5pRnsGJuuGNL4o6V8DtsA== X-Received: by 2002:a17:90b:1644:: with SMTP id il4mr17120250pjb.151.1602471219209; Sun, 11 Oct 2020 19:53:39 -0700 (PDT) Received: from localhost.ibm.com (14-200-206-90.tpgi.com.au. [14.200.206.90]) by smtp.gmail.com with ESMTPSA id g4sm17909258pgg.75.2020.10.11.19.53.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Oct 2020 19:53:38 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Mon, 12 Oct 2020 13:53:08 +1100 Message-Id: <20201012025314.1070230-4-oohall@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201012025314.1070230-1-oohall@gmail.com> References: <20201012025314.1070230-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 04/10] i2c,trace: Add I2C operation trace events X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Add support for tracing I2C transactions performed by skiboot. This covers both internally initiated I2C ops and those that requested by the kernel via the OPAL API. Signed-off-by: Oliver O'Halloran --- core/i2c.c | 32 ++++++++++++++++++++++++++++++++ external/trace/dump_trace.c | 33 +++++++++++++++++++++++++++++++++ include/i2c.h | 9 +-------- include/trace_types.h | 12 ++++++++++++ 4 files changed, 78 insertions(+), 8 deletions(-) diff --git a/core/i2c.c b/core/i2c.c index fd9308126d64..b4313d430f3e 100644 --- a/core/i2c.c +++ b/core/i2c.c @@ -13,6 +13,7 @@ #include #include #include +#include static LIST_HEAD(i2c_bus_list); @@ -38,6 +39,34 @@ struct i2c_bus *i2c_find_bus_by_id(uint32_t opal_id) return NULL; } +static inline void i2c_trace_req(struct i2c_request *req, int rc) +{ + struct trace_i2c t; + + memset(&t, 0, sizeof(t)); + + t.bus = req->bus->opal_id; + t.type = req->op | (req->offset_bytes << 4); + t.i2c_addr = req->dev_addr; + t.smbus_reg = req->offset & 0xffff; // FIXME: log whole offset + t.size = req->rw_len; + t.rc = rc; + + /* FIXME: trace should not be a union... */ + trace_add((void *)&t, TRACE_I2C, sizeof(t)); +} + +int64_t i2c_queue_req(struct i2c_request *req) +{ + int64_t ret = req->bus->queue_req(req); + + i2c_trace_req(req, OPAL_ASYNC_COMPLETION); + + if (!ret) + req->req_state = i2c_req_queued; + return ret; +} + static void opal_i2c_request_complete(int rc, struct i2c_request *req) { uint64_t token = (uint64_t)(unsigned long)req->user_data; @@ -45,6 +74,8 @@ static void opal_i2c_request_complete(int rc, struct i2c_request *req) opal_queue_msg(OPAL_MSG_ASYNC_COMP, NULL, NULL, cpu_to_be64(token), cpu_to_be64(rc)); + i2c_trace_req(req, rc); + free(req); } @@ -177,6 +208,7 @@ int64_t i2c_request_sync(struct i2c_request *req) req->req_state = i2c_req_new; } + i2c_trace_req(req, rc); count = 0; for (i = 0; i < req->rw_len && count < sizeof(buf); i++) { count += snprintf(buf+count, sizeof(buf)-count, "%02x", diff --git a/external/trace/dump_trace.c b/external/trace/dump_trace.c index c68eea894715..f54dfa08130d 100644 --- a/external/trace/dump_trace.c +++ b/external/trace/dump_trace.c @@ -149,6 +149,36 @@ static void dump_uart(struct trace_uart *t) } } +static void dump_i2c(struct trace_i2c *t) +{ + uint16_t type = be16_to_cpu(t->type); + + printf("I2C: bus: %d dev: %02x len: %x ", + be16_to_cpu(t->bus), + be16_to_cpu(t->i2c_addr), + be16_to_cpu(t->size) + ); + + switch (type & 0x3) { + case 0: + printf("read"); + break; + case 1: + printf("write"); + break; + case 2: + printf("smbus read from %x", be16_to_cpu(t->smbus_reg)); + break; + case 3: + printf("smbus write to %x", be16_to_cpu(t->smbus_reg)); + break; + default: + printf("u wot?"); + } + + printf(", rc = %hd\n", (int16_t) be16_to_cpu(t->rc)); +} + static void load_traces(struct trace_reader *trs, int count) { struct trace_entry *te; @@ -189,6 +219,9 @@ static void print_trace(union trace *t) case TRACE_UART: dump_uart(&t->uart); break; + case TRACE_I2C: + dump_i2c(&t->i2c); + break; default: printf("UNKNOWN(%u) CPU %u length %u\n", t->hdr.type, be16_to_cpu(t->hdr.cpu), diff --git a/include/i2c.h b/include/i2c.h index c4ad805d4451..2c67a0ea22ea 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -61,14 +61,7 @@ struct i2c_request { extern void i2c_add_bus(struct i2c_bus *bus); extern struct i2c_bus *i2c_find_bus_by_id(uint32_t opal_id); -static inline int64_t i2c_queue_req(struct i2c_request *req) -{ - int64_t ret = req->bus->queue_req(req); - - if (!ret) - req->req_state = i2c_req_queued; - return ret; -} +int64_t i2c_queue_req(struct i2c_request *req); static inline uint64_t i2c_run_req(struct i2c_request *req) { diff --git a/include/trace_types.h b/include/trace_types.h index 5942a1fa46ed..4ebf5a0a8357 100644 --- a/include/trace_types.h +++ b/include/trace_types.h @@ -16,6 +16,7 @@ #define TRACE_FSP_MSG 4 /* FSP message sent/received */ #define TRACE_FSP_EVENT 5 /* FSP driver event */ #define TRACE_UART 6 /* UART driver traces */ +#define TRACE_I2C 7 /* I2C driver traces */ /* One per cpu, plus one for NMIs */ struct tracebuf { @@ -107,6 +108,16 @@ struct trace_uart { __be16 in_count; }; +struct trace_i2c { + struct trace_hdr hdr; + u16 bus; + u16 type; + u16 i2c_addr; + u16 smbus_reg; + u16 size; + s16 rc; +}; + union trace { struct trace_hdr hdr; /* Trace types go here... */ @@ -116,6 +127,7 @@ union trace { struct trace_fsp_msg fsp_msg; struct trace_fsp_event fsp_evt; struct trace_uart uart; + struct trace_i2c i2c; }; #endif /* __TRACE_TYPES_H */ From patchwork Mon Oct 12 02:53:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1380598 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C8jy96NxLz9s0b for ; Mon, 12 Oct 2020 13:57:05 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=G0MXFdsY; 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[14.200.206.90]) by smtp.gmail.com with ESMTPSA id g4sm17909258pgg.75.2020.10.11.19.53.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Oct 2020 19:53:40 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Mon, 12 Oct 2020 13:53:09 +1100 Message-Id: <20201012025314.1070230-5-oohall@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201012025314.1070230-1-oohall@gmail.com> References: <20201012025314.1070230-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 05/10] hw/p8-i2c: Add p8_i2c_find_bus_by_port() X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Adds a way to find the struct i2c_bus for a given chip ID, engine ID, and port ID. HDAT indicates which I2C master is relevant using this information so it comes up a fair bit. Signed-off-by: Oliver O'Halloran --- hw/p8-i2c.c | 26 ++++++++++++++++++++++++++ include/i2c.h | 3 +++ 2 files changed, 29 insertions(+) diff --git a/hw/p8-i2c.c b/hw/p8-i2c.c index 40b8dc2167f5..60bea868fda2 100644 --- a/hw/p8-i2c.c +++ b/hw/p8-i2c.c @@ -1607,3 +1607,29 @@ void p8_i2c_init(void) p8_i2c_init_one(i2cm, i); } } + +struct i2c_bus *p8_i2c_find_bus_by_port(uint32_t chip_id, int eng, int port_num) +{ + struct proc_chip *chip = get_chip(chip_id); + struct p8_i2c_master *m, *master = NULL; + struct p8_i2c_master_port *port; + + if (!chip) + return NULL; + + list_for_each(&chip->i2cms, m, link) { + if (m->engine_id == eng) { + master = m; + break; + } + } + + if (!master) + return NULL; + + list_for_each(&master->ports, port, link) + if (port->port_num == port_num) + return &port->bus; + + return NULL; +} diff --git a/include/i2c.h b/include/i2c.h index 2c67a0ea22ea..8ec32ad1c6f3 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -61,6 +61,9 @@ struct i2c_request { extern void i2c_add_bus(struct i2c_bus *bus); extern struct i2c_bus *i2c_find_bus_by_id(uint32_t opal_id); +/* not generic, but useful */ +struct i2c_bus *p8_i2c_find_bus_by_port(uint32_t chip_id, int eng, int port_id); + int64_t i2c_queue_req(struct i2c_request *req); static inline uint64_t i2c_run_req(struct i2c_request *req) From patchwork Mon Oct 12 02:53:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1380599 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C8jyT4Ft1z9s0b for ; Mon, 12 Oct 2020 13:57:21 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; 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[14.200.206.90]) by smtp.gmail.com with ESMTPSA id g4sm17909258pgg.75.2020.10.11.19.53.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Oct 2020 19:53:43 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Mon, 12 Oct 2020 13:53:10 +1100 Message-Id: <20201012025314.1070230-6-oohall@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201012025314.1070230-1-oohall@gmail.com> References: <20201012025314.1070230-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 06/10] hw/p8-i2c: Print interrupt status per master X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Whether I2C interrupts work or not depends on the type of master. Currently we print a single message to indicate whether IRQs work or not, but this will be wrong if we have I2C interrupts on the host and we happen to probe a Centaur I2C master first. Fix this by adding a message to the per-master print indicating whether the master has an interrupt or not. Signed-off-by: Oliver O'Halloran --- hw/p8-i2c.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/hw/p8-i2c.c b/hw/p8-i2c.c index 60bea868fda2..78f1e7e32932 100644 --- a/hw/p8-i2c.c +++ b/hw/p8-i2c.c @@ -1447,7 +1447,6 @@ static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) struct p8_i2c_master *master; struct list_head *chip_list; uint64_t ex_stat, default_timeout; - static bool irq_printed; int64_t rc; master = zalloc(sizeof(*master)); @@ -1496,8 +1495,11 @@ static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) init_timer(&master->recovery, p8_i2c_recover, master); init_timer(&master->sensor_cache, p8_i2c_enable_scache, master); - prlog(PR_INFO, "I2C: Chip %08x Eng. %d Clock %d Mhz\n", - master->chip_id, master->engine_id, lb_freq / 1000000); + master->irq_ok = p8_i2c_has_irqs(master); + + prlog(PR_INFO, "I2C: Chip %08x Eng. %d Clock %d Mhz %s\n", + master->chip_id, master->engine_id, lb_freq / 1000000, + master->irq_ok ? "" : "(no interrupt)"); /* Disable OCC cache during inits */ if (master->type == I2C_CENTAUR) { @@ -1526,14 +1528,6 @@ static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) list_head_init(&master->req_list); list_head_init(&master->ports); - /* Check if interrupt is usable */ - master->irq_ok = p8_i2c_has_irqs(master); - if (!irq_printed) { - irq_printed = true; - prlog(PR_INFO, "I2C: Interrupts %sfunctional\n", - master->irq_ok ? "" : "non-"); - } - /* Re-enable the sensor cache, we aren't touching HW anymore */ if (master->type == I2C_CENTAUR) centaur_enable_sensor_cache(master->chip_id); From patchwork Mon Oct 12 02:53:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1380600 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C8jyn3pv9z9s0b for ; Mon, 12 Oct 2020 13:57:37 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=KB8ISIGU; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4C8jyn2qLTzDqjb for ; Mon, 12 Oct 2020 13:57:37 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::542; helo=mail-pg1-x542.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=KB8ISIGU; dkim-atps=neutral Received: from mail-pg1-x542.google.com (mail-pg1-x542.google.com [IPv6:2607:f8b0:4864:20::542]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4C8jtN5h74zDqjM for ; Mon, 12 Oct 2020 13:53:48 +1100 (AEDT) Received: by mail-pg1-x542.google.com with SMTP id q21so1693596pgi.13 for ; Sun, 11 Oct 2020 19:53:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gl2C/6V6kF/PwOGu592hlp+762H4oaQ7/Aw6JGhTkyc=; b=KB8ISIGU/Cfly3y6PWjrIKK50lmvPB+iXDEOheE8gsl5Hud+8VTEKDycqQJYP2DP1D G8SbRbCpA6b6M7f415mTrkeGpHArj/0PWAFExsFETKlhXhZrNswrwanFAUTrYvOoo/Fy nZBoUgT3HL8jxleoXcFnwyxJIZ64z4ocztdqWiqBLqpi3gBkoTVJcynSv6kWqYTv7w4t c1pK0sMYsQM+Q4rkzLcO23hJM2NKk32+uxX8gpi0QgoKKXrMkg5/7uW5Itnhh+htKMEr BSxL4pHaNvkeHc/a/aEsLbc0EFwH9FVb5Y7UPY7sMI+H/QzUqy2EfDAzE9G8puOFscYb GEIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gl2C/6V6kF/PwOGu592hlp+762H4oaQ7/Aw6JGhTkyc=; b=p5TDYDrZt+101fb7ceKCBjEudRVF0puhKJbMz6lflcOFYanHaQexd8R12WlkMuSVoZ FhlXjJfz58kvP1V7RlGKALYpB0PciyCju4aHdicDlfFWHQ2mtF2NdnmYulfj/7mIw/m6 BFTSb2m8dzwH2SWruBa8Jv+lAjrCtvcBjRlohyEgGqkhzY1/blQq0dyCof2IHxjZEQK6 xxI6gsVpb3ReGbcEUCPx+7WwGXuYDoeRyR8MPDafwAGBHHAE3Yc2rRwn0f2mfRNez2vu KSR+G3Q5D/rbosmmhJL8j47fdivdsZ0x5lWwrZxKwR2l4PDJiJqJDWbLeDQZxymEl8yy ndBw== X-Gm-Message-State: AOAM533vNS1Q1Qdk61IGvt9bg9Cnm/g/gvWvhii4Zs56s9rkG1RQ/v9s tAJyvxyTJg5OdLAkzsAHNfI42zZS44bbkw== X-Google-Smtp-Source: ABdhPJxjpEbKy0C9796AgIXsDrWsGrha9D0CEHZTknqsVi1cgDToDvkXC88ZsVG4ZoyaJMin/EVlTQ== X-Received: by 2002:a62:ab0e:0:b029:156:1dfe:ae74 with SMTP id p14-20020a62ab0e0000b02901561dfeae74mr2734194pff.7.1602471225560; Sun, 11 Oct 2020 19:53:45 -0700 (PDT) Received: from localhost.ibm.com (14-200-206-90.tpgi.com.au. [14.200.206.90]) by smtp.gmail.com with ESMTPSA id g4sm17909258pgg.75.2020.10.11.19.53.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Oct 2020 19:53:45 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Mon, 12 Oct 2020 13:53:11 +1100 Message-Id: <20201012025314.1070230-7-oohall@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201012025314.1070230-1-oohall@gmail.com> References: <20201012025314.1070230-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 07/10] hw/p8-i2c: Set poll interval from the current port X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The rate at which we need to poll the master depends on the speed of the bus. Faster I2C buses will require more frequent polling so it doesn't make a whole lot of sense to set this on a per-master basis. This patch sets the master's polling interval to a per-port setting calculated from the port speed. Signed-off-by: Oliver O'Halloran --- hw/p8-i2c.c | 23 +++++++---------------- 1 file changed, 7 insertions(+), 16 deletions(-) diff --git a/hw/p8-i2c.c b/hw/p8-i2c.c index 78f1e7e32932..f01cbe8a0870 100644 --- a/hw/p8-i2c.c +++ b/hw/p8-i2c.c @@ -234,6 +234,7 @@ struct p8_i2c_master_port { uint32_t port_num; uint32_t bit_rate_div; /* Divisor to set bus speed*/ uint64_t byte_timeout; /* Timeout per byte */ + uint64_t poll_interval; /* Polling interval */ struct list_node link; }; @@ -1017,7 +1018,7 @@ static int p8_i2c_start_request(struct p8_i2c_master *master, struct i2c_request *req) { struct p8_i2c_master_port *port; - uint64_t cmd, poll_interval; + uint64_t cmd; int64_t rc; DBG("Starting req %d len=%d addr=%02x (offset=%x)\n", @@ -1152,10 +1153,10 @@ static int p8_i2c_start_request(struct p8_i2c_master *master, * cases */ if (!opal_booting() && master->irq_ok) - poll_interval = TIMER_POLL; + master->poll_interval = TIMER_POLL; else - poll_interval = master->poll_interval; - schedule_timer(&master->poller, poll_interval); + master->poll_interval = port->poll_interval; + schedule_timer(&master->poller, master->poll_interval); /* If we don't have a user-set timeout then use the master's default */ if (!req->timeout) @@ -1442,7 +1443,7 @@ static void p8_i2c_add_bus_prop(struct p8_i2c_master_port *port) static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) { struct p8_i2c_master_port *port; - uint32_t lb_freq, count, max_bus_speed; + uint32_t lb_freq, count; struct dt_node *i2cm_port; struct p8_i2c_master *master; struct list_head *chip_list; @@ -1547,7 +1548,6 @@ static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) /* Add master to chip's list */ list_add_tail(chip_list, &master->link); - max_bus_speed = 0; default_timeout = master->irq_ok ? I2C_TIMEOUT_IRQ_MS : @@ -1559,8 +1559,7 @@ static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) port->port_num = dt_prop_get_u32(i2cm_port, "reg"); port->master = master; speed = dt_prop_get_u32(i2cm_port, "bus-frequency"); - if (speed > max_bus_speed) - max_bus_speed = speed; + port->poll_interval = p8_i2c_get_poll_interval(speed); port->bit_rate_div = p8_i2c_get_bit_rate_divisor(lb_freq, speed); port->bus.dt_node = i2cm_port; @@ -1581,14 +1580,6 @@ static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) "ibm,port-name"), speed/1000); port++; } - - /* When at runtime and we have the i2c irq, we just use it - * (see p8_i2c_start_request), but in the situation where - * one of those isn't the case (e.g. during boot), we need - * a better poll interval to efficiently crank the i2c machine. - * poll_interval is that interval. - */ - master->poll_interval = (max_bus_speed) ? p8_i2c_get_poll_interval(max_bus_speed) : TIMER_POLL; } void p8_i2c_init(void) From patchwork Mon Oct 12 02:53:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1380601 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C8jz65dF3z9sSs for ; Mon, 12 Oct 2020 13:57:54 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=jxyso1i+; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4C8jz62glvzDqnF for ; Mon, 12 Oct 2020 13:57:54 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::443; helo=mail-pf1-x443.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=jxyso1i+; dkim-atps=neutral Received: from mail-pf1-x443.google.com (mail-pf1-x443.google.com [IPv6:2607:f8b0:4864:20::443]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4C8jtQ1PHtzDqhD for ; Mon, 12 Oct 2020 13:53:49 +1100 (AEDT) Received: by mail-pf1-x443.google.com with SMTP id k8so12232883pfk.2 for ; Sun, 11 Oct 2020 19:53:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FV0bZzcmHC9EUdUf/x0Gft64yu+Dsdgcg+r88tpsp/Q=; b=jxyso1i+BGXhHfzV57F9q+6LOfctI5Luz+/EYBfRBT3c5L0HDv0FKEjE5H+LAywhlW 5SiOjGFf5IBsE7wF2JQ7Tj+SrwsV5kBh7qhPEtMz+yFbnVB8LE2OZkOMdeXMcnFEft7X q9l5J503XOJkWbI12bf2IIyRYZmbhTTpvVkgNTubY+Z/A3ek2vSuR4GnP2ZHkOb7simf br1j+CUC11biX2kwEX7g3EnS737VyusWWs3B70aHBCcDOC7f9j3Hqtm8Uoe55xVRFb3V U/jQJ04mpRRfm5xpabqEjgNwWnxfo3AyYb+qlNXkiaYn4FYd7e9umihWc2gw57nAHCCr 3DOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FV0bZzcmHC9EUdUf/x0Gft64yu+Dsdgcg+r88tpsp/Q=; b=cBnQwzBfq8j40yPV3eEnU0W4YKYA6zYJgWIYfDrX6ouPpvgJ6xJgf8HwIdW5lVo1ew DAoetZ8PSiEKOstuofOrEjRdlnWhuxPRtbFfEdf4Y6kMfd86It4TdGT/TeJq6hPoQExs w8d1s0LqrwjVR6/dLXK9QvBUBVI6juoYJ4Rb4XZUP3JVLmRNc5YfMqm8fApGFXoAWNj0 G9o9aBBDQ6TJZyivu/mWNAXaO+5xwZAl8H7UACRKa1epZQW8Un/EYuvXuC8GTpGFUETk SteAvdhA28TbdUnaB6guLXl+yeg0g/p5ykvpBMXPr9aQTEox3wRh7mKbW9C8EOSRMENB +qFA== X-Gm-Message-State: AOAM530QQXdPnLAeRQCQVgx5VhePMiIfOmN9TJJeYnzDJh9lnvNTtnE4 9Mm8yZNpAGsFxvhmqgxeOFoGpKhWw/WPKg== X-Google-Smtp-Source: ABdhPJxRQN5uFb1sPnqcBy/sOJsLQnMTWp4L7N5o922HCN1CrXmyNvHPsQm3GE2z+H3gY0N+MvOkQg== X-Received: by 2002:a17:90a:67c7:: with SMTP id g7mr18012975pjm.140.1602471227640; Sun, 11 Oct 2020 19:53:47 -0700 (PDT) Received: from localhost.ibm.com (14-200-206-90.tpgi.com.au. [14.200.206.90]) by smtp.gmail.com with ESMTPSA id g4sm17909258pgg.75.2020.10.11.19.53.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Oct 2020 19:53:47 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Mon, 12 Oct 2020 13:53:12 +1100 Message-Id: <20201012025314.1070230-8-oohall@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201012025314.1070230-1-oohall@gmail.com> References: <20201012025314.1070230-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 08/10] hw/p8-i2c: Move port init into a separate function X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Move it out in preparation for adding the ability to add new ports on the fly. Signed-off-by: Oliver O'Halloran --- hw/p8-i2c.c | 93 ++++++++++++++++++++++++++--------------------------- 1 file changed, 45 insertions(+), 48 deletions(-) diff --git a/hw/p8-i2c.c b/hw/p8-i2c.c index f01cbe8a0870..4abbad8673b4 100644 --- a/hw/p8-i2c.c +++ b/hw/p8-i2c.c @@ -1440,14 +1440,52 @@ static void p8_i2c_add_bus_prop(struct p8_i2c_master_port *port) } } -static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) +static struct p8_i2c_master_port *p8_i2c_init_one_port(struct p8_i2c_master *m, + struct dt_node *n, uint64_t lb_freq) { struct p8_i2c_master_port *port; - uint32_t lb_freq, count; - struct dt_node *i2cm_port; + uint64_t def_timeout; + uint32_t speed, div; + + port = zalloc(sizeof(*port)); + if (!port) + return NULL; + + def_timeout = m->irq_ok ? I2C_TIMEOUT_IRQ_MS : I2C_TIMEOUT_POLL_MS; + + speed = dt_prop_get_u32_def(n, "bus-frequency", 100000); + div = p8_i2c_get_bit_rate_divisor(lb_freq, speed); + + /* p8-i2c stuff */ + port->master = m; + port->bit_rate_div = div; + port->poll_interval = p8_i2c_get_poll_interval(speed); + port->port_num = dt_prop_get_u32(n, "reg"); + port->byte_timeout = dt_prop_get_u32_def(n, "timeout-ms", def_timeout); + list_add_tail(&m->ports, &port->link); + + /* core i2c stuff */ + port->bus.dt_node = n; + port->bus.queue_req = p8_i2c_queue_request; + port->bus.run_req = p8_i2c_run_request; + i2c_add_bus(&port->bus); + + /* add the bus name and compatible (if needed) */ + p8_i2c_add_bus_prop(port); + + prlog(PR_INFO, " P%d: <%s> %d kHz\n", port->port_num, + (char *) dt_prop_get(n, "ibm,port-name"), speed / 1000); + + return port; +} + +static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) +{ struct p8_i2c_master *master; struct list_head *chip_list; - uint64_t ex_stat, default_timeout; + struct dt_node *i2cm_port; + uint64_t ex_stat; + uint32_t lb_freq; int64_t rc; master = zalloc(sizeof(*master)); @@ -1533,53 +1571,12 @@ static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) if (master->type == I2C_CENTAUR) centaur_enable_sensor_cache(master->chip_id); - /* Allocate ports driven by this master */ - count = 0; - dt_for_each_child(i2cm, i2cm_port) - count++; - - port = zalloc(sizeof(*port) * count); - if (!port) { - log_simple_error(&e_info(OPAL_RC_I2C_INIT), - "I2C: Insufficient memory\n"); - free(master); - return; - } - /* Add master to chip's list */ list_add_tail(chip_list, &master->link); - default_timeout = master->irq_ok ? - I2C_TIMEOUT_IRQ_MS : - I2C_TIMEOUT_POLL_MS; - - dt_for_each_child(i2cm, i2cm_port) { - uint32_t speed; - - port->port_num = dt_prop_get_u32(i2cm_port, "reg"); - port->master = master; - speed = dt_prop_get_u32(i2cm_port, "bus-frequency"); - port->poll_interval = p8_i2c_get_poll_interval(speed); - port->bit_rate_div = - p8_i2c_get_bit_rate_divisor(lb_freq, speed); - port->bus.dt_node = i2cm_port; - port->bus.queue_req = p8_i2c_queue_request; - port->bus.run_req = p8_i2c_run_request; - - port->byte_timeout = dt_prop_get_u32_def(i2cm_port, - "timeout-ms", default_timeout); - - i2c_add_bus(&port->bus); - list_add_tail(&master->ports, &port->link); - - /* Add OPAL properties to the bus node */ - p8_i2c_add_bus_prop(port); - prlog(PR_INFO, " P%d: <%s> %d kHz\n", - port->port_num, - (char *)dt_prop_get(i2cm_port, - "ibm,port-name"), speed/1000); - port++; - } + /* initialise ports */ + dt_for_each_child(i2cm, i2cm_port) + p8_i2c_init_one_port(master, i2cm_port, lb_freq); } void p8_i2c_init(void) From patchwork Mon Oct 12 02:53:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1380602 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C8jzQ2pFGz9s0b for ; Mon, 12 Oct 2020 13:58:10 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=fslZx/qs; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4C8jzQ1lFFzDqs6 for ; Mon, 12 Oct 2020 13:58:10 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::443; helo=mail-pf1-x443.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=fslZx/qs; dkim-atps=neutral Received: from mail-pf1-x443.google.com (mail-pf1-x443.google.com [IPv6:2607:f8b0:4864:20::443]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4C8jtR6slGzDqhn for ; Mon, 12 Oct 2020 13:53:51 +1100 (AEDT) Received: by mail-pf1-x443.google.com with SMTP id e7so3201107pfn.12 for ; Sun, 11 Oct 2020 19:53:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zAv19fs6mo9GkhnvGCk8gFTXyqC6WPUWhXvohXsanAw=; b=fslZx/qshhcO4rpR8vL9Jym39YxYCAjdGXE3o37Com+oLMmD1BBqtZOrUqv743Omqm zAMsNslVyCVh+rsUM8uAUK7y7j/FhdwytFxeJGXYH6hiNAMl9SMNaHMUkOCKNL2NPu8I jKQicnbQTSeE39Myl5fa55qSnm4VIImgfXrMgC7BrD1tCQFQOmmCrsK6ZoaNqpLJ+y0I rf+Pt/tooc12D+tjjrbtQdv20PoY7wmOIE50CLPHPzz3trG/ZeS67DhkT6QHa3ymHHr+ +5OYk53SBDk/pti9AWhEBdxuFF83zBj9SrBt3OXYZ0xLyCALKrEHcPLbBnoeHM3GrHBL czBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zAv19fs6mo9GkhnvGCk8gFTXyqC6WPUWhXvohXsanAw=; b=Et7m0RhG3JdlRq3+ymvpAZ8fNQeEq0g/kYyh8dIGJOVl19i1DrFXQTHf6YZSuBOU3q s9iCSRDhX6umtEhoxiInJQfLiMHWGGrGo5PtXijH3C2i5qOZFI0kftjuPMLLaEUsYFFD AAipbzrXzUbq32Q8/n6nFBz/FRSzwNFCVKAkk0KK3kWuC2mqunFgXZjncyBd82QecIks C5kCXtLhuv219BWT1ChhFAXS2VS2INU0BwoMxBEbcpR89DggHla8HUHoV9EWYpqB6XaU ayC3eFsZipBQs4eds/ER9mZc/uY41lHrM0aBfw9YdH7vHQHpZS8TC26hjxFpPgH+UBC9 MI9A== X-Gm-Message-State: AOAM533N0lLbr3MwNx6gYOY+dZnyYC1UHU2bNAX9lxR+5vPmQCJK9SLv PU2+WT5rpMyiZNq811tkWWaorw3WY9cKXg== X-Google-Smtp-Source: ABdhPJwxTmBYUHtfCfiYzyGuE9XkbiXG7EKR6VIjz/htkNeHD1roq5IaemjJuY84lbjPn+7gpdAJMg== X-Received: by 2002:a17:90b:1496:: with SMTP id js22mr17756499pjb.20.1602471229818; Sun, 11 Oct 2020 19:53:49 -0700 (PDT) Received: from localhost.ibm.com (14-200-206-90.tpgi.com.au. [14.200.206.90]) by smtp.gmail.com with ESMTPSA id g4sm17909258pgg.75.2020.10.11.19.53.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Oct 2020 19:53:49 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Mon, 12 Oct 2020 13:53:13 +1100 Message-Id: <20201012025314.1070230-9-oohall@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201012025314.1070230-1-oohall@gmail.com> References: <20201012025314.1070230-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 09/10] hdat/i2c: Rework i2c device creation X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" We've got functions to instantiate I2C buses at various places inside of the skiboot code base (in hdat, firenze-pci, and in witherspoon). The HDAT ones are the most generic so re-work those a bit and export the functions used to add DT nodes for I2C masters and the ports below them. Signed-off-by: Oliver O'Halloran --- hdata/i2c.c | 171 ++++++++++++++++++++++++++++++++------------------ include/i2c.h | 5 ++ 2 files changed, 114 insertions(+), 62 deletions(-) diff --git a/hdata/i2c.c b/hdata/i2c.c index a2fe8ac1b994..9f95e6146205 100644 --- a/hdata/i2c.c +++ b/hdata/i2c.c @@ -7,86 +7,128 @@ #include #include #include +#include #include "spira.h" #include "hdata.h" -struct i2c_dev { - uint8_t i2cm_engine; - uint8_t i2cm_port; - __be16 i2c_bus_freq; +/* + * These should probably be in hw/p8-i2c.c. However, that would require the HDAT + * test to #include hw/p8-i2c.c which is probably going to be more trouble than + * it's worth. So these helpers are here instead. + */ +struct dt_node *p8_i2c_add_master_node(struct dt_node *xscom, int eng_id) +{ + uint64_t clk, size, xscom_base; + struct dt_node *i2cm; - /* i2c slave info */ - uint8_t type; - uint8_t dev_addr; - uint8_t dev_port; - uint8_t __reserved; + dt_for_each_compatible(xscom, i2cm, "ibm,power8-i2cm") + if (dt_prop_get_u32(i2cm, "chip-engine#") == eng_id) + return i2cm; - __be32 purpose; - __be32 i2c_link; - __be16 slca_index; -}; + /* XXX: Might need to be updated for new chips */ + if (proc_gen >= proc_gen_p9) + size = 0x1000; + else + size = 0x20; -#define P9_I2CM_XSCOM_SIZE 0x1000 -#define P9_I2CM_XSCOM_BASE 0xa0000 + xscom_base = 0xa0000 + size * eng_id; -static struct dt_node *get_i2cm_node(struct dt_node *xscom, int engine) -{ - uint64_t xscom_base = P9_I2CM_XSCOM_BASE + P9_I2CM_XSCOM_SIZE * (uint64_t)engine; - struct dt_node *i2cm; - uint64_t freq, clock; - - i2cm = dt_find_by_name_addr(xscom, "i2cm", xscom_base); - if (!i2cm) { - i2cm = dt_new_addr(xscom, "i2cm", xscom_base); - dt_add_property_cells(i2cm, "reg", xscom_base, - P9_I2CM_XSCOM_SIZE); - - dt_add_property_strings(i2cm, "compatible", - "ibm,power8-i2cm", "ibm,power9-i2cm"); - - dt_add_property_cells(i2cm, "#size-cells", 0); - dt_add_property_cells(i2cm, "#address-cells", 1); - dt_add_property_cells(i2cm, "chip-engine#", engine); - - freq = dt_prop_get_u64_def(xscom, "bus-frequency", 0); - clock = (u32)(freq / 4); - if (clock) - dt_add_property_cells(i2cm, "clock-frequency", clock); - else - dt_add_property_cells(i2cm, "clock-frequency", 150000000); + i2cm = dt_new_addr(xscom, "i2cm", xscom_base); + if (!i2cm) + return NULL; + + if (proc_gen >= proc_gen_p9) { + dt_add_property_strings(i2cm, "compatible", "ibm,power8-i2cm", + "ibm,power9-i2cm"); + } else { + dt_add_property_strings(i2cm, "compatible", "ibm,power8-i2cm"); } + dt_add_property_cells(i2cm, "reg", xscom_base, size); + dt_add_property_cells(i2cm, "#size-cells", 0); + dt_add_property_cells(i2cm, "#address-cells", 1); + dt_add_property_cells(i2cm, "chip-engine#", eng_id); + + /* + * The i2cm runs at 1/4th the PIB frequency. If we don't know the PIB + * frequency then pick 150MHz which should be in the right ballpark. + */ + clk = dt_prop_get_u64_def(xscom, "bus-frequency", 0); + if (clk) + dt_add_property_cells(i2cm, "clock-frequency", clk / 4); + else + dt_add_property_cells(i2cm, "clock-frequency", 150000000); + return i2cm; } -static struct dt_node *get_bus_node(struct dt_node *i2cm, int port, int freq) +struct dt_node *__p8_i2c_add_port_node(struct dt_node *master, int port_id, + uint32_t bus_speed) { - struct dt_node *bus; + struct dt_node *port; + uint32_t speed; + + dt_for_each_child(master, port) + if (dt_prop_get_u32(port, "reg") == port_id) + goto check_speed; - bus = dt_find_by_name_addr(i2cm, "i2c-bus", port); - if (!bus) { - bus = dt_new_addr(i2cm, "i2c-bus", port); - dt_add_property_cells(bus, "reg", port); - dt_add_property_cells(bus, "#size-cells", 0); - dt_add_property_cells(bus, "#address-cells", 1); + port = dt_new_addr(master, "i2c-bus", port_id); + if (!port) + return NULL; - /* The P9 I2C master is fully compatible with the P8 one */ - dt_add_property_strings(bus, "compatible", "ibm,opal-i2c", + dt_add_property_cells(port, "reg", port_id); + dt_add_property_cells(port, "#size-cells", 0); + dt_add_property_cells(port, "#address-cells", 1); + + /* The P9 I2C master is fully compatible with the P8 one */ + if (proc_gen >= proc_gen_p9) { + dt_add_property_strings(port, "compatible", "ibm,opal-i2c", "ibm,power8-i2c-port", "ibm,power9-i2c-port"); + } else { + dt_add_property_strings(port, "compatible", "ibm,opal-i2c", + "ibm,power8-i2c-port"); + } - /* - * use the clock frequency as the bus frequency until we - * have actual devices on the bus. Adding a device will - * reduce the frequency to something that all devices - * can tolerate. - */ - dt_add_property_cells(bus, "bus-frequency", freq * 1000); +check_speed: + speed = dt_prop_get_u32_def(port, "bus-frequency", 0xffffffff); + if (bus_speed < speed) { + dt_check_del_prop(port, "bus-frequency"); + dt_add_property_cells(port, "bus-frequency", bus_speed); } - return bus; + return port; +} + + +struct dt_node *p8_i2c_add_port_node(struct dt_node *xscom, int eng_id, + int port_id, uint32_t bus_freq) +{ + struct dt_node *i2cm; + + i2cm = p8_i2c_add_master_node(xscom, eng_id); + if (!i2cm) + return NULL; + + return __p8_i2c_add_port_node(i2cm, port_id, bus_freq); } +struct i2c_dev { + uint8_t i2cm_engine; + uint8_t i2cm_port; + __be16 i2c_bus_freq; + + /* i2c slave info */ + uint8_t type; + uint8_t dev_addr; + uint8_t dev_port; + uint8_t __reserved; + + __be32 purpose; + __be32 i2c_link; + __be16 slca_index; +}; + struct hdat_i2c_type { uint32_t id; const char *name; @@ -192,7 +234,7 @@ struct host_i2c_hdr { int parse_i2c_devs(const struct HDIF_common_hdr *hdr, int idata_index, struct dt_node *xscom) { - struct dt_node *i2cm, *bus, *node; + struct dt_node *bus, *node; const struct hdat_i2c_type *type; const struct hdat_i2c_info *info; const struct i2c_dev *dev; @@ -263,9 +305,14 @@ int parse_i2c_devs(const struct HDIF_common_hdr *hdr, int idata_index, (proc_gen == proc_gen_p9 || proc_gen == proc_gen_p10)) continue; - i2cm = get_i2cm_node(xscom, dev->i2cm_engine); - bus = get_bus_node(i2cm, dev->i2cm_port, - be16_to_cpu(dev->i2c_bus_freq)); + bus = p8_i2c_add_port_node(xscom, dev->i2cm_engine, dev->i2cm_port, + be16_to_cpu(dev->i2c_bus_freq) * 1000); + + if (!bus) { + prerror("Unable to add node for e%dp%d under %s\n", + dev->i2cm_engine, dev->i2cm_port, xscom->name); + continue; + } /* * Looks like hostboot gives the address as an 8 bit, left diff --git a/include/i2c.h b/include/i2c.h index 8ec32ad1c6f3..9ad307b3f445 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -63,6 +63,11 @@ extern struct i2c_bus *i2c_find_bus_by_id(uint32_t opal_id); /* not generic, but useful */ struct i2c_bus *p8_i2c_find_bus_by_port(uint32_t chip_id, int eng, int port_id); +struct dt_node *p8_i2c_add_master_node(struct dt_node *xscom, int eng_id); +struct dt_node *__p8_i2c_add_port_node(struct dt_node *master, int port_id, + uint32_t bus_speed); +struct dt_node *p8_i2c_add_port_node(struct dt_node *xscom, int eng_id, + int port_id, uint32_t bus_freq); int64_t i2c_queue_req(struct i2c_request *req); From patchwork Mon Oct 12 02:53:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1380603 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C8jzr4KGdz9s0b for ; Mon, 12 Oct 2020 13:58:32 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; 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[14.200.206.90]) by smtp.gmail.com with ESMTPSA id g4sm17909258pgg.75.2020.10.11.19.53.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Oct 2020 19:53:51 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Mon, 12 Oct 2020 13:53:14 +1100 Message-Id: <20201012025314.1070230-10-oohall@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201012025314.1070230-1-oohall@gmail.com> References: <20201012025314.1070230-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 10/10] hw/p8-i2c: Add buses at runtime X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" When booting skiboot we initialise any I2C masters after probing the platform, but before initialising the platform (or NVRAM). Due to this we need to ensure that all the I2C masters we might want to use are in the DT before the platform is initialised. This causes problems since we might want to add another master (e.g. on witherspoon we might need to add a port for the I2C OpenCAPI I2C bus). It's possible to hack around this by adding a new node in the probe function, but the probe function runs very early before many essential services are initialised (e.g. LPC). We might want to add another I2C bus after learning that we have a riser card installed and it's not possible to do that until later in boot. To accommodate those use cases we can add support for adding a new bus at runtime. Signed-off-by: Oliver O'Halloran --- hw/p8-i2c.c | 83 ++++++++++++++++++++++++++++++++++++++++++++++----- include/i2c.h | 3 ++ 2 files changed, 78 insertions(+), 8 deletions(-) diff --git a/hw/p8-i2c.c b/hw/p8-i2c.c index 4abbad8673b4..59f85b1dfc14 100644 --- a/hw/p8-i2c.c +++ b/hw/p8-i2c.c @@ -196,6 +196,7 @@ enum p8_i2c_master_type { }; struct p8_i2c_master { + struct dt_node *dt_node; struct lock lock; /* Lock to guard the members */ enum p8_i2c_master_type type; /* P8 vs. Centaur */ uint64_t start_time; /* Request start time */ @@ -1441,10 +1442,10 @@ static void p8_i2c_add_bus_prop(struct p8_i2c_master_port *port) } static struct p8_i2c_master_port *p8_i2c_init_one_port(struct p8_i2c_master *m, - struct dt_node *n, uint64_t lb_freq) + struct dt_node *n) { struct p8_i2c_master_port *port; - uint64_t def_timeout; + uint64_t def_timeout, lb_freq; uint32_t speed, div; port = zalloc(sizeof(*port)); @@ -1453,6 +1454,7 @@ static struct p8_i2c_master_port *p8_i2c_init_one_port(struct p8_i2c_master *m, def_timeout = m->irq_ok ? I2C_TIMEOUT_IRQ_MS : I2C_TIMEOUT_POLL_MS; + lb_freq = dt_prop_get_u32_def(m->dt_node, "clock-frequency", 150000000); speed = dt_prop_get_u32_def(n, "bus-frequency", 100000); div = p8_i2c_get_bit_rate_divisor(lb_freq, speed); @@ -1479,7 +1481,8 @@ static struct p8_i2c_master_port *p8_i2c_init_one_port(struct p8_i2c_master *m, return port; } -static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) +static struct p8_i2c_master *p8_i2c_init_one(struct dt_node *i2cm, + enum p8_i2c_master_type type) { struct p8_i2c_master *master; struct list_head *chip_list; @@ -1493,7 +1496,7 @@ static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) log_simple_error(&e_info(OPAL_RC_I2C_INIT), "I2C: Failed to allocate master " "structure\n"); - return; + return NULL; } master->type = type; @@ -1505,6 +1508,7 @@ static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) master->chip_id = dt_get_chip_id(i2cm); master->engine_id = dt_prop_get_u32(i2cm, "chip-engine#"); master->xscom_base = dt_get_address(i2cm, 0, NULL); + master->dt_node = i2cm; if (master->type == I2C_CENTAUR) { struct centaur_chip *centaur = get_centaur(master->chip_id); if (centaur == NULL) { @@ -1512,7 +1516,7 @@ static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) "I2C: Failed to get centaur 0x%x ", master->chip_id); free(master); - return; + return NULL; } chip_list = ¢aur->i2cms; @@ -1522,7 +1526,7 @@ static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) if (master->engine_id > 0) { prlog(PR_ERR, "I2C: Skipping Centaur Master #1\n"); free(master); - return; + return NULL; } } else { struct proc_chip *chip = get_chip(master->chip_id); @@ -1560,7 +1564,7 @@ static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) centaur_enable_sensor_cache(master->chip_id); free(master); - return; + return NULL; } master->fifo_size = GETFIELD(I2C_EXTD_STAT_FIFO_SIZE, ex_stat); @@ -1576,7 +1580,9 @@ static void p8_i2c_init_one(struct dt_node *i2cm, enum p8_i2c_master_type type) /* initialise ports */ dt_for_each_child(i2cm, i2cm_port) - p8_i2c_init_one_port(master, i2cm_port, lb_freq); + p8_i2c_init_one_port(master, i2cm_port); + + return master; } void p8_i2c_init(void) @@ -1615,3 +1621,64 @@ struct i2c_bus *p8_i2c_find_bus_by_port(uint32_t chip_id, int eng, int port_num) return NULL; } + +/* Adds a new i2c port to the DT and initialises it */ +struct i2c_bus *p8_i2c_add_bus(uint32_t chip_id, int eng_id, int port_id, + uint32_t bus_speed) +{ + struct proc_chip *c = get_chip(chip_id); + struct p8_i2c_master *m, *master = NULL; + struct p8_i2c_master_port *port; + struct dt_node *pn; + + if (!c) { + prerror("I2C: Unable to add i2c bus: c%de%dp%d: chip doesn't exist\n", + chip_id, eng_id, port_id); + return NULL; + } + + list_for_each(&c->i2cms, m, link) { + if (m->engine_id == eng_id) { + master = m; + break; + } + } + + if (!master) { + struct dt_node *mn; + + mn = p8_i2c_add_master_node(c->devnode, eng_id); + if (!mn) { + prerror("I2C: Unable to add DT node for I2CM c%xe%d\n", + chip_id, eng_id); + return NULL; + } + + master = p8_i2c_init_one(mn, I2C_POWER8); + if (!master) { + prerror("I2C: Unable to initialise I2CM c%xe%d\n", + chip_id, eng_id); + return NULL; + } + } + + list_for_each(&master->ports, port, link) + if (port->port_num == port_id) + return &port->bus; + + pn = __p8_i2c_add_port_node(master->dt_node, port_id, bus_speed); + if (!pn) { + prerror("I2C: Unable to add dt node for bus c%xe%dp%d\n", + chip_id, eng_id, port_id); + return NULL; + } + + port = p8_i2c_init_one_port(master, pn); + if (!port) { + prerror("I2C: Unable to init bus c%xe%dp%d\n", + chip_id, eng_id, port_id); + return NULL; + } + + return &port->bus; +} diff --git a/include/i2c.h b/include/i2c.h index 9ad307b3f445..a644bd427ce1 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -69,6 +69,9 @@ struct dt_node *__p8_i2c_add_port_node(struct dt_node *master, int port_id, struct dt_node *p8_i2c_add_port_node(struct dt_node *xscom, int eng_id, int port_id, uint32_t bus_freq); +struct i2c_bus *p8_i2c_add_bus(uint32_t chip_id, int eng_id, int port_id, + uint32_t bus_speed); + int64_t i2c_queue_req(struct i2c_request *req); static inline uint64_t i2c_run_req(struct i2c_request *req)