From patchwork Wed Oct 7 19:45:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Maciej W. Rozycki" X-Patchwork-Id: 1378250 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux-mips.org Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C64Yt0v5lz9sRk for ; Thu, 8 Oct 2020 06:45:22 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 49A28385781C; Wed, 7 Oct 2020 19:45:20 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from cvs.linux-mips.org (eddie.linux-mips.org [148.251.95.138]) by sourceware.org (Postfix) with ESMTP id C3B353857C49 for ; Wed, 7 Oct 2020 19:45:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org C3B353857C49 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux-mips.org Authentication-Results: sourceware.org; spf=none smtp.mailfrom=macro@linux-mips.org Received: from localhost.localdomain ([127.0.0.1]:53296 "EHLO localhost" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S23991197AbgJGTpJxsddA (ORCPT ); Wed, 7 Oct 2020 21:45:09 +0200 Date: Wed, 7 Oct 2020 20:45:09 +0100 (BST) From: "Maciej W. Rozycki" To: gcc-patches@gcc.gnu.org Subject: [PATCH] MIPS/libphobos: Fix switchcontext.S assembly for MIPS I ISA Message-ID: MIME-Version: 1.0 X-Spam-Status: No, score=-3.8 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KHOP_HELO_FCRDNS, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=no autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Matthew Fortune Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Correct MIPS I assembly build errors in switchcontext.S: .../libphobos/libdruntime/config/mips/switchcontext.S: Assembler messages: .../libphobos/libdruntime/config/mips/switchcontext.S:50: Error: opcode not supported on this processor: mips1 (mips1) `sdc1 $f20,(0*8-((6*8+4+(-6*8+4&7))))($sp)' etc., due to the use of the MIPS II LDC1 and SDC1 hardware instructions for FP register load and store operations. Instead use the L.D and S.D generic assembly instructions, which are strict aliases for the LDC1 and SDC1 instructions respectively and produce identical machine code where the assembly for the MIPS II or a higher ISA has been requested, however they become assembly macros and expand to compatible sequences of LWC1 and SWC1 hardware instructions where the assembly for the MIPS I ISA is in effect. libphobos/ * libdruntime/config/mips/switchcontext.S [__mips_hard_float]: Use L.D and S.D generic assembly instructions rather than LDC1 and SDC1 MIPS II hardware instructions. --- Hi, Noticed in a build of a MIPS I toolchain. I have no way to run MIPS regression-testing right now, however in `libopcodes' the L.D and S.D instructions are strict aliases valid for the MIPS II and higher ISAs, and just to double-check that I have built MIPS32r2 GCC with and without the change applied and verified with `objdump' that the respective target objects produced are identical. OK to apply to trunk, and -- as a fatal compilation error -- to backport to active release branches? Maciej --- libphobos/libdruntime/config/mips/switchcontext.S | 24 +++++++++++----------- 1 file changed, 12 insertions(+), 12 deletions(-) gcc-libphobos-mips1.diff Index: gcc/libphobos/libdruntime/config/mips/switchcontext.S =================================================================== --- gcc.orig/libphobos/libdruntime/config/mips/switchcontext.S +++ gcc/libphobos/libdruntime/config/mips/switchcontext.S @@ -47,12 +47,12 @@ see the files COPYING3 and COPYING.RUNTI #ifdef __mips_hard_float #define ALIGN8(val) (val + (-val & 7)) #define BELOW (ALIGN8(6 * 8 + 4)) - sdc1 $f20, (0 * 8 - BELOW)($sp) - sdc1 $f22, (1 * 8 - BELOW)($sp) - sdc1 $f24, (2 * 8 - BELOW)($sp) - sdc1 $f26, (3 * 8 - BELOW)($sp) - sdc1 $f28, (4 * 8 - BELOW)($sp) - sdc1 $f30, (5 * 8 - BELOW)($sp) + s.d $f20, (0 * 8 - BELOW)($sp) + s.d $f22, (1 * 8 - BELOW)($sp) + s.d $f24, (2 * 8 - BELOW)($sp) + s.d $f26, (3 * 8 - BELOW)($sp) + s.d $f28, (4 * 8 - BELOW)($sp) + s.d $f30, (5 * 8 - BELOW)($sp) #endif sw $ra, -4($sp) @@ -72,12 +72,12 @@ see the files COPYING3 and COPYING.RUNTI move $sp, $a1 #ifdef __mips_hard_float - ldc1 $f20, (0 * 8 - BELOW)($sp) - ldc1 $f22, (1 * 8 - BELOW)($sp) - ldc1 $f24, (2 * 8 - BELOW)($sp) - ldc1 $f26, (3 * 8 - BELOW)($sp) - ldc1 $f28, (4 * 8 - BELOW)($sp) - ldc1 $f30, (5 * 8 - BELOW)($sp) + l.d $f20, (0 * 8 - BELOW)($sp) + l.d $f22, (1 * 8 - BELOW)($sp) + l.d $f24, (2 * 8 - BELOW)($sp) + l.d $f26, (3 * 8 - BELOW)($sp) + l.d $f28, (4 * 8 - BELOW)($sp) + l.d $f30, (5 * 8 - BELOW)($sp) #endif lw $ra, -4($sp)