From patchwork Wed Sep 23 16:59:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Paul A. Clarke" X-Patchwork-Id: 1369970 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gcc.gnu.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=cGPUwsAC; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BxPY526LNz9sS8 for ; Thu, 24 Sep 2020 02:59:34 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 83F733950C24; Wed, 23 Sep 2020 16:59:31 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 83F733950C24 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1600880371; bh=phuE6A3lH4TNnACMlrt1LshA7a+TlfTi/EueUvixWU4=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=cGPUwsACf1sDR/VZYSFbLHTzXSJQd334+AonB5cQp0k9fjmS2tvbeULaXEXUkBABk bULZMYzVxlkIz4hLCW/bBfA1n/kldoyEtCLbKtAk2LIvUbSysKdfybLJrux5CF3C7V RPFhX8JCtKy8UIvVOKKdqqv1ocIJQaYDi4GcRwes= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id ACBB33950C1A for ; Wed, 23 Sep 2020 16:59:28 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org ACBB33950C1A Received: from pps.filterd (m0127361.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 08NGVofM186531; Wed, 23 Sep 2020 12:59:28 -0400 Received: from ppma05wdc.us.ibm.com (1b.90.2fa9.ip4.static.sl-reverse.com [169.47.144.27]) by mx0a-001b2d01.pphosted.com with ESMTP id 33r9rb15pe-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 23 Sep 2020 12:59:28 -0400 Received: from pps.filterd (ppma05wdc.us.ibm.com [127.0.0.1]) by ppma05wdc.us.ibm.com (8.16.0.42/8.16.0.42) with SMTP id 08NGs2C9029403; Wed, 23 Sep 2020 16:59:27 GMT Received: from b01cxnp23033.gho.pok.ibm.com (b01cxnp23033.gho.pok.ibm.com [9.57.198.28]) by ppma05wdc.us.ibm.com with ESMTP id 33n9m99hus-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 23 Sep 2020 16:59:27 +0000 Received: from b01ledav001.gho.pok.ibm.com (b01ledav001.gho.pok.ibm.com [9.57.199.106]) by b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 08NGxRPQ55968046 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 23 Sep 2020 16:59:27 GMT Received: from b01ledav001.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1855828059; Wed, 23 Sep 2020 16:59:27 +0000 (GMT) Received: from b01ledav001.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D910A28058; Wed, 23 Sep 2020 16:59:26 +0000 (GMT) Received: from localhost (unknown [9.65.251.73]) by b01ledav001.gho.pok.ibm.com (Postfix) with ESMTP; Wed, 23 Sep 2020 16:59:26 +0000 (GMT) To: segher@kernel.crashing.org, gcc-patches@gcc.gnu.org Subject: [PATCH] rs6000: Add 'd' for doubleword variant of vector insert Date: Wed, 23 Sep 2020 11:59:26 -0500 Message-Id: <20200923165926.210870-1-pc@us.ibm.com> X-Mailer: git-send-email 2.18.4 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-09-23_12:2020-09-23, 2020-09-23 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=1 priorityscore=1501 clxscore=1011 spamscore=0 phishscore=0 impostorscore=0 lowpriorityscore=0 suspectscore=0 mlxlogscore=999 bulkscore=0 mlxscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2009230126 X-Spam-Status: No, score=-11.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "Paul A. Clarke via Gcc-patches" From: "Paul A. Clarke" Reply-To: "Paul A. Clarke" Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" When the "Vector Insert" section was added to the documentation, the doubleword ('d') variant was omitted. Add it. 2020-09-23 Paul A. Clarke gcc/ * doc/extend.texi: Add 'd' for doubleword variant of vector insert instruction. --- gcc/doc/extend.texi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 5571c4f2ff2..7f14a28aca0 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -20961,9 +20961,9 @@ given by the third argument, using natural element order in the second argument. The rest of the second argument is unchanged. If the byte index is greater than 14 for halfwords, greater than 12 for words, or greater than 8 for doublewords the result is undefined. For little-endian, -the generated code will be semantically equivalent to @code{vins[bhw]rx} +the generated code will be semantically equivalent to @code{vins[bhwd]rx} instructions. Similarly for big-endian it will be semantically equivalent -to @code{vins[bhw]lx}. Note that some fairly anomalous results can be +to @code{vins[bhwd]lx}. Note that some fairly anomalous results can be generated if the byte index is not aligned on an element boundary for the type of element being inserted. @findex vec_insertl @@ -20996,8 +20996,8 @@ for halfwords, 12 for words, or 8 for doublewords, the intrinsic will be rejected. Note that the underlying hardware instruction uses the same register for the second argument and the result. For little-endian, the code generation will be semantically equivalent to -@code{vins[bhw]lx}, while for big-endian it will be semantically equivalent to -@code{vins[bhw]rx}. +@code{vins[bhwd]lx}, while for big-endian it will be semantically equivalent to +@code{vins[bhwd]rx}. Note that some fairly anomalous results can be generated if the byte index is not aligned on an element boundary for the sort of element being inserted. @findex vec_inserth