From patchwork Fri Sep 11 17:52:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 1362621 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=broadcom.com header.i=@broadcom.com header.a=rsa-sha256 header.s=google header.b=EE4lXJfC; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Bp3JX4Gwpz9sT6 for ; Sat, 12 Sep 2020 03:53:16 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725846AbgIKRxG (ORCPT ); Fri, 11 Sep 2020 13:53:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56880 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725816AbgIKRwo (ORCPT ); Fri, 11 Sep 2020 13:52:44 -0400 Received: from mail-pf1-x444.google.com (mail-pf1-x444.google.com [IPv6:2607:f8b0:4864:20::444]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 67F7AC061795 for ; Fri, 11 Sep 2020 10:52:43 -0700 (PDT) Received: by mail-pf1-x444.google.com with SMTP id d6so7934917pfn.9 for ; Fri, 11 Sep 2020 10:52:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=m4flW0eGW0tffkIHX5Om1c+mAEM2k7lQaZtvvuDDv6Q=; b=EE4lXJfCa/j1t5Ufqu5oi50FY8ExkMgvJBuSAWo+6M2UG7wRfPm4iXiAK/npZqo1KL 9UpFW+k0u/hxwUY2gDzG0sAT2d/Sl85TvVTBs4aIPBikPQFH92VwMagniJ7MpNZ/YRop ECkLWqtmbwcVeV/sGbVhC3Vc3raVt453rLm50= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=m4flW0eGW0tffkIHX5Om1c+mAEM2k7lQaZtvvuDDv6Q=; b=Nb3JdCvUWJTNj7QjODk4qFGNg/PYO2HllPOaeES3xluX+UrRr4EPwLSBaeQRKtkM2D IbQlPz8DbEkMjr6gGiZfEnj0mVo6I0PlbjDuIkDHrwMmXPJuAHtbdlcWOEDqkgNMoVLD 0tjCLo+PA2c4Ebt+CuKfF70TNYZmx40sb2xVdbNv62e6+5QVX0M2I7jgqaYWy84n/CcE C3SrslYVLXSgJ382lSIh43u/pYg4Xa6Adkr/kVEPWZmxg5Q1vYt7KsIEJaA5bFY7gtXc Qh7AzsC+o5inmJ2FjMxDJMkmQM0r8OCZc8N7LIWdx6Qj/F7mOlOhrVeWlzlqMvjhUOZy L8zg== X-Gm-Message-State: AOAM532Lnf9p0IQMrswBIW0ym7Qj9jmNNDbMItNkXsuSBod5tXEbnebe +Ky3PpxRl9eoeWLpNoKzhQbqfQ== X-Google-Smtp-Source: ABdhPJxL2iLzrIDE7DMZFFgFuBFlCuzDnF1E1RbQcRpkhInUOTDND8LzRX/901IPCTrlS8/NSOSW5Q== X-Received: by 2002:a63:7f59:: with SMTP id p25mr2438918pgn.146.1599846762600; Fri, 11 Sep 2020 10:52:42 -0700 (PDT) Received: from stbsrv-and-01.and.broadcom.net ([192.19.231.250]) by smtp.gmail.com with ESMTPSA id d77sm2871963pfd.121.2020.09.11.10.52.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2020 10:52:41 -0700 (PDT) From: Jim Quinlan To: linux-pci@vger.kernel.org, Nicolas Saenz Julienne , Christoph Hellwig , Robin Murphy , bcm-kernel-feedback-list@broadcom.com, james.quinlan@broadcom.com Cc: Jim Quinlan , Florian Fainelli , Bjorn Helgaas , Rob Herring , linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v12 02/10] dt-bindings: PCI: Add bindings for more Brcmstb chips Date: Fri, 11 Sep 2020 13:52:22 -0400 Message-Id: <20200911175232.19016-3-james.quinlan@broadcom.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200911175232.19016-1-james.quinlan@broadcom.com> References: <20200911175232.19016-1-james.quinlan@broadcom.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jim Quinlan - Add compatible strings for three more Broadcom STB chips: 7278, 7216, 7211 (STB version of RPi4). - Add new property 'brcm,scb-sizes'. - Add new property 'resets'. - Add new property 'reset-names' for 7216 only. - Allow 'ranges' and 'dma-ranges' to have more than one item and update the example to show this. Signed-off-by: Jim Quinlan Reviewed-by: Rob Herring --- .../bindings/pci/brcm,stb-pcie.yaml | 56 ++++++++++++++++--- 1 file changed, 49 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml index 8680a0f86c5a..807694b4f41f 100644 --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml @@ -9,12 +9,15 @@ title: Brcmstb PCIe Host Controller Device Tree Bindings maintainers: - Nicolas Saenz Julienne -allOf: - - $ref: /schemas/pci/pci-bus.yaml# - properties: compatible: - const: brcm,bcm2711-pcie # The Raspberry Pi 4 + items: + - enum: + - brcm,bcm2711-pcie # The Raspberry Pi 4 + - brcm,bcm7211-pcie # Broadcom STB version of RPi4 + - brcm,bcm7278-pcie # Broadcom 7278 Arm + - brcm,bcm7216-pcie # Broadcom 7216 Arm + - brcm,bcm7445-pcie # Broadcom 7445 Arm reg: maxItems: 1 @@ -34,10 +37,12 @@ properties: - const: msi ranges: - maxItems: 1 + minItems: 1 + maxItems: 4 dma-ranges: - maxItems: 1 + minItems: 1 + maxItems: 6 clocks: maxItems: 1 @@ -58,8 +63,31 @@ properties: aspm-no-l0s: true + resets: + description: for "brcm,bcm7216-pcie", must be a valid reset + phandle pointing to the RESCAL reset controller provider node. + $ref: "/schemas/types.yaml#/definitions/phandle" + + reset-names: + items: + - const: rescal + + brcm,scb-sizes: + description: u64 giving the 64bit PCIe memory + viewport size of a memory controller. There may be up to + three controllers, and each size must be a power of two + with a size greater or equal to the amount of memory the + controller supports. Note that each memory controller + may have two component regions -- base and extended -- so + this information cannot be deduced from the dma-ranges. + $ref: /schemas/types.yaml#/definitions/uint64-array + items: + minItems: 1 + maxItems: 3 + required: - reg + - ranges - dma-ranges - "#interrupt-cells" - interrupts @@ -68,6 +96,18 @@ required: - interrupt-map - msi-controller +allOf: + - $ref: /schemas/pci/pci-bus.yaml# + - if: + properties: + compatible: + contains: + const: brcm,bcm7216-pcie + then: + required: + - resets + - reset-names + unevaluatedProperties: false examples: @@ -93,7 +133,9 @@ examples: msi-parent = <&pcie0>; msi-controller; ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>; - dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>; + dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>, + <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>; brcm,enable-ssc; + brcm,scb-sizes = <0x0000000080000000 0x0000000080000000>; }; };