From patchwork Thu Sep 3 04:39:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 1356305 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=c/XG1KqH; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Bhp4v5Ddlz9sSP for ; Thu, 3 Sep 2020 14:39:59 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726154AbgICEj5 (ORCPT ); Thu, 3 Sep 2020 00:39:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725843AbgICEj4 (ORCPT ); Thu, 3 Sep 2020 00:39:56 -0400 Received: from mail-pf1-x442.google.com (mail-pf1-x442.google.com [IPv6:2607:f8b0:4864:20::442]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F1AFCC061244; Wed, 2 Sep 2020 21:39:55 -0700 (PDT) Received: by mail-pf1-x442.google.com with SMTP id k15so1208092pfc.12; Wed, 02 Sep 2020 21:39:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bJfek8aeEFYuux0PmNYcQKoOxU0snqU5ziyHqUdHSPQ=; b=c/XG1KqHCkGvWpBq6tjP4iOl3Um9xh/Jx2HNNZDgcP3QVoQ2i12b5RuRCJHe/E4vOP 27zSqJ0MDjy71xu5BZQMV8k4cq1/VfrSK72V+q9iHEEV29sVidr8zNjlx5ZY9YPIHRFn B4qaINEcecYsNy7pyvX/HTR52nqs1ZMFarkfUWCrMt1uFjA94fdlz4dWi7EpyY2tRRNO MbL6MgcTRwSB2EvIHYKcAMvwflU38uxI8tlt49i3BoSkLqpNLpTYc8ZUaPxl4iJkuwFj eIc/ZF+mxpO1zq3XTHPbjWpcuuJMMX8btReFPp0e21SzIvZHZkd1Tsu2D6fJIiSLRN0i dgMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bJfek8aeEFYuux0PmNYcQKoOxU0snqU5ziyHqUdHSPQ=; b=np/qTjGzqe9SRkyQeMSLo7UfV2YCwo1AO4JbSXPl2UuwGzMHWFMqLUIq2hb1Zh6wTV 5dF7dNmEz/t0RRVhHDGyc6NluyPUv31JxlECqE4nciiIcsuaYiUZ6PPN4IwZo/jR2HwU 53P76XqUOGvbUQFFL8SiEXRqmym25P4KE4RCZEevvGIm89BCg/bwzmRYd1TDc95dIiLL /q/lNEQbFbjaO25ww1auaULmyw4+5qt/TMFPjwaum4hN2Rpw+CKn4FdfqAbO4rQVVheM 3vZXGJTzKnG6u1E6PsYNj7nSI0g5fHsh26bGVzAMZ7i7PpWuuBOM5PylyZy8RHSAae2m aSbQ== X-Gm-Message-State: AOAM530f1pnFaIYCv6AncuPEGuLm6e5/hYz0OmVjlS27MNAepmLflm4j vL2C1dg06zw5H7ki4EgJcYxyzmbe2Pc= X-Google-Smtp-Source: ABdhPJzE0D1ypvC4MxyrRyqlJoNVxCgPfQDffUeFYVCYUwl8Wc6QNvgK9hHQA96xPzVlEt64Vz2iGQ== X-Received: by 2002:aa7:870f:: with SMTP id b15mr1981750pfo.113.1599107994940; Wed, 02 Sep 2020 21:39:54 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id u63sm1251805pfu.34.2020.09.02.21.39.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Sep 2020 21:39:52 -0700 (PDT) From: Florian Fainelli To: netdev@vger.kernel.org Cc: Florian Fainelli , andrew@lunn.ch, adam.rudzinski@arf.net.pl, m.felsch@pengutronix.de, hkallweit1@gmail.com, richard.leitner@skidata.com, zhengdejin5@gmail.com, devicetree@vger.kernel.org, kernel@pengutronix.de, kuba@kernel.org, robh+dt@kernel.org Subject: [PATCH net-next 1/3] net: phy: Support enabling clocks prior to bus probe Date: Wed, 2 Sep 2020 21:39:45 -0700 Message-Id: <20200903043947.3272453-2-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200903043947.3272453-1-f.fainelli@gmail.com> References: <20200903043947.3272453-1-f.fainelli@gmail.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Some Ethernet PHYs may require that their clock, which typically drives their logic to respond to reads on the MDIO bus be enabled before issusing a MDIO bus scan. We have a chicken and egg problem though which is that we cannot enable a given Ethernet PHY's device clock until we have a phy_device instance create and called the driver's probe function. This will not happen unless we are successful in probing the PHY device, which requires its clock(s) to be turned on. For DT based systems we can solve this by using of_clk_get() which operates on a device_node reference, and make sure that all clocks associaed with the node are enabled prior to doing any reads towards the device. In order to avoid drivers having to know the a priori reference count of the resources, we drop them back to 0 right before calling ->probe() which is then supposed to manage the resources normally. Signed-off-by: Florian Fainelli --- drivers/net/phy/phy_device.c | 15 +++++- drivers/of/of_mdio.c | 95 ++++++++++++++++++++++++++++++++++++ include/linux/of_mdio.h | 16 ++++++ include/linux/phy.h | 13 +++++ 4 files changed, 138 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c index 57d44648c8dd..bf2824ba056e 100644 --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -2845,6 +2846,15 @@ static int phy_probe(struct device *dev) mutex_lock(&phydev->lock); + /* To allow PHY drivers to manage device resources such as + * clocks, regulators or others, disable the resources that + * were enabled during the bus->reset or the PHY registration + * routine such that they work with a natural resource reference + * count. + */ + of_mdiobus_device_disable_resources(phydev->mdio.bus, + phydev->mdio.addr); + /* Deassert the reset signal */ phy_device_reset(phydev, 0); @@ -2914,8 +2924,11 @@ static int phy_probe(struct device *dev) out: /* Assert the reset signal */ - if (err) + if (err) { phy_device_reset(phydev, 1); + of_mdiobus_device_disable_resources(phydev->mdio.bus, + phydev->mdio.addr); + } mutex_unlock(&phydev->lock); diff --git a/drivers/of/of_mdio.c b/drivers/of/of_mdio.c index cb32d7ef4938..bbce4a70312c 100644 --- a/drivers/of/of_mdio.c +++ b/drivers/of/of_mdio.c @@ -19,6 +19,7 @@ #include #include #include +#include #define DEFAULT_GPIO_RESET_DELAY 10 /* in microseconds */ @@ -60,6 +61,92 @@ static struct mii_timestamper *of_find_mii_timestamper(struct device_node *node) return register_mii_timestamper(arg.np, arg.args[0]); } +int of_mdiobus_device_enable_resources(struct mii_bus *bus, + struct device_node *child, + u32 addr) +{ + struct mdio_device_resource *res = &bus->mdio_resources[addr]; + unsigned int i; + int rc; + + if (res->enabled_resources) { + dev_dbg(&bus->dev, + "MDIO resources for %d already enabled\n", addr); + return 0; + } + + rc = of_count_phandle_with_args(child, "clocks", "#clock-cells"); + if (rc < 0) { + if (rc == -ENOENT) + rc = 0; + else + return rc; + } + + res->num_clks = rc; + if (rc == 0) + return rc; + + dev_dbg(&bus->dev, "Found %d clocks for child at %d\n", rc, addr); + + res->clks = devm_kcalloc(&bus->dev, res->num_clks, + sizeof(struct clk *), GFP_KERNEL); + if (!res->clks) + return -ENOMEM; + + for (i = 0; i < res->num_clks; i++) { + res->clks[i] = of_clk_get(child, i); + if (IS_ERR(res->clks[i])) { + if (PTR_ERR(res->clks[i]) == -ENOENT) + continue; + + return PTR_ERR(res->clks[i]); + } + + rc = clk_prepare_enable(res->clks[i]); + if (rc) { + dev_err(&bus->dev, + "Failed to enabled clock for %d (rc: %d)\n", + addr, rc); + goto out_clk_disable; + } + + dev_dbg(&bus->dev, + "Enable clock %d for child at %d\n", + i, addr); + } + + res->enabled_resources = true; + + return 0; + +out_clk_disable: + while (i-- > 0) { + clk_disable_unprepare(res->clks[i]); + clk_put(res->clks[i]); + } + res->enabled_resources = false; + return rc; +} +EXPORT_SYMBOL(of_mdiobus_device_enable_resources); + +void of_mdiobus_device_disable_resources(struct mii_bus *bus, u32 addr) +{ + struct mdio_device_resource *res = &bus->mdio_resources[addr]; + unsigned int i; + + if (!res->enabled_resources || res->num_clks == 0) + return; + + for (i = 0; i < res->num_clks; i++) { + clk_disable_unprepare(res->clks[i]); + clk_put(res->clks[i]); + dev_dbg(&bus->dev, "Disabled clk %d for %d\n", i, addr); + } + res->enabled_resources = false; +} +EXPORT_SYMBOL(of_mdiobus_device_disable_resources); + int of_mdiobus_phy_device_register(struct mii_bus *mdio, struct phy_device *phy, struct device_node *child, u32 addr) { @@ -117,6 +204,12 @@ static int of_mdiobus_register_phy(struct mii_bus *mdio, if (IS_ERR(mii_ts)) return PTR_ERR(mii_ts); + rc = of_mdiobus_device_enable_resources(mdio, child, addr); + if (rc) { + dev_err(&mdio->dev, "enable resources: %d\n", rc); + return rc; + } + is_c45 = of_device_is_compatible(child, "ethernet-phy-ieee802.3-c45"); @@ -125,6 +218,7 @@ static int of_mdiobus_register_phy(struct mii_bus *mdio, else phy = get_phy_device(mdio, addr, is_c45); if (IS_ERR(phy)) { + of_mdiobus_device_disable_resources(mdio, addr); if (mii_ts) unregister_mii_timestamper(mii_ts); return PTR_ERR(phy); @@ -132,6 +226,7 @@ static int of_mdiobus_register_phy(struct mii_bus *mdio, rc = of_mdiobus_phy_device_register(mdio, phy, child, addr); if (rc) { + of_mdiobus_device_disable_resources(mdio, addr); if (mii_ts) unregister_mii_timestamper(mii_ts); phy_device_free(phy); diff --git a/include/linux/of_mdio.h b/include/linux/of_mdio.h index 1efb88d9f892..f43f4bcb3f22 100644 --- a/include/linux/of_mdio.h +++ b/include/linux/of_mdio.h @@ -58,6 +58,10 @@ static inline int of_mdio_parse_addr(struct device *dev, return addr; } +int of_mdiobus_device_enable_resources(struct mii_bus *mdio, + struct device_node *child, u32 addr); +void of_mdiobus_device_disable_resources(struct mii_bus *mdio, u32 addr); + #else /* CONFIG_OF_MDIO */ static inline bool of_mdiobus_child_is_phy(struct device_node *child) { @@ -129,6 +133,18 @@ static inline int of_mdiobus_phy_device_register(struct mii_bus *mdio, { return -ENOSYS; } + +static inline int of_mdiobus_device_enable_resources(struct mii_bus *mdio, + struct device_node *child, + u32 addr) +{ + return 0; +} + +static inline void of_mdiobus_device_disable_resources(struct mii_bus *mdio, + u32 addr) +{ +} #endif diff --git a/include/linux/phy.h b/include/linux/phy.h index 3a09d2bf69ea..a01953daea45 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -247,6 +247,14 @@ struct phy_package_shared { #define PHY_SHARED_F_INIT_DONE 0 #define PHY_SHARED_F_PROBE_DONE 1 +struct clk; + +struct mdio_device_resource { + bool enabled_resources; + unsigned int num_clks; + struct clk **clks; +}; + /* * The Bus class for PHYs. Devices which provide access to * PHYs should register using this structure @@ -291,6 +299,11 @@ struct mii_bus { */ int irq[PHY_MAX_ADDR]; + /* An array of MDIO device resources that must be enabled + * during probe for identification to succeed. + */ + struct mdio_device_resource mdio_resources[PHY_MAX_ADDR]; + /* GPIO reset pulse width in microseconds */ int reset_delay_us; /* GPIO reset deassert delay in microseconds */ From patchwork Thu Sep 3 04:39:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 1356307 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; 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Wed, 02 Sep 2020 21:39:56 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id u63sm1251805pfu.34.2020.09.02.21.39.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Sep 2020 21:39:55 -0700 (PDT) From: Florian Fainelli To: netdev@vger.kernel.org Cc: Florian Fainelli , andrew@lunn.ch, adam.rudzinski@arf.net.pl, m.felsch@pengutronix.de, hkallweit1@gmail.com, richard.leitner@skidata.com, zhengdejin5@gmail.com, devicetree@vger.kernel.org, kernel@pengutronix.de, kuba@kernel.org, robh+dt@kernel.org Subject: [PATCH net-next 2/3] net: phy: mdio-bcm-unimac: Enable GPHY resources during bus reset Date: Wed, 2 Sep 2020 21:39:46 -0700 Message-Id: <20200903043947.3272453-3-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200903043947.3272453-1-f.fainelli@gmail.com> References: <20200903043947.3272453-1-f.fainelli@gmail.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The UniMAC MDIO bus controller allows the interfacing with various internal Broadcom STB Gigabit PHYs which do require two things: - they require that a digital clock be enabled for their MDIO interface to work at all - they require that at least one MDIO transaction goes through their interface to respond correctly to subsequent MDIO reads Because of these constraints, we need to have the bus driver's reset callback to call of_mdiobus_device_enable_resources() in order for clocks to be enabled prior to doing the dummy BMSR read. Signed-off-by: Florian Fainelli --- drivers/net/mdio/mdio-bcm-unimac.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/net/mdio/mdio-bcm-unimac.c b/drivers/net/mdio/mdio-bcm-unimac.c index fbd36891ee64..c8fed16c1f27 100644 --- a/drivers/net/mdio/mdio-bcm-unimac.c +++ b/drivers/net/mdio/mdio-bcm-unimac.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -162,6 +163,7 @@ static int unimac_mdio_reset(struct mii_bus *bus) struct device_node *child; u32 read_mask = 0; int addr; + int rc; if (!np) { read_mask = ~bus->phy_mask; @@ -172,6 +174,14 @@ static int unimac_mdio_reset(struct mii_bus *bus) continue; read_mask |= 1 << addr; + + /* Enable resources such as clocks *right now* for the + * workaround on the next line to be effective. + */ + rc = of_mdiobus_device_enable_resources(bus, child, + addr); + if (rc) + return rc; } } From patchwork Thu Sep 3 04:39:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 1356308 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; 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Wed, 02 Sep 2020 21:39:58 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id u63sm1251805pfu.34.2020.09.02.21.39.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Sep 2020 21:39:57 -0700 (PDT) From: Florian Fainelli To: netdev@vger.kernel.org Cc: Florian Fainelli , andrew@lunn.ch, adam.rudzinski@arf.net.pl, m.felsch@pengutronix.de, hkallweit1@gmail.com, richard.leitner@skidata.com, zhengdejin5@gmail.com, devicetree@vger.kernel.org, kernel@pengutronix.de, kuba@kernel.org, robh+dt@kernel.org Subject: [PATCH net-next 3/3] net: phy: bcm7xxx: request and manage GPHY clock Date: Wed, 2 Sep 2020 21:39:47 -0700 Message-Id: <20200903043947.3272453-4-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200903043947.3272453-1-f.fainelli@gmail.com> References: <20200903043947.3272453-1-f.fainelli@gmail.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The internal Gigabit PHY on Broadcom STB chips has a digital clock which drives its MDIO interface among other things, the driver now requests and manage that clock during .probe() and .remove() accordingly. Signed-off-by: Florian Fainelli --- drivers/net/phy/bcm7xxx.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c index 692048d86ab1..f0ffcdcaef03 100644 --- a/drivers/net/phy/bcm7xxx.c +++ b/drivers/net/phy/bcm7xxx.c @@ -11,6 +11,7 @@ #include "bcm-phy-lib.h" #include #include +#include #include /* Broadcom BCM7xxx internal PHY registers */ @@ -39,6 +40,7 @@ struct bcm7xxx_phy_priv { u64 *stats; + struct clk *clk; }; static int bcm7xxx_28nm_d0_afe_config_init(struct phy_device *phydev) @@ -534,7 +536,19 @@ static int bcm7xxx_28nm_probe(struct phy_device *phydev) if (!priv->stats) return -ENOMEM; - return 0; + priv->clk = devm_clk_get_optional(&phydev->mdio.dev, NULL); + if (IS_ERR(priv->clk)) + return PTR_ERR(priv->clk); + + return clk_prepare_enable(priv->clk); +} + +static void bcm7xxx_28nm_remove(struct phy_device *phydev) +{ + struct bcm7xxx_phy_priv *priv = phydev->priv; + + clk_disable_unprepare(priv->clk); + devm_clk_put(&phydev->mdio.dev, priv->clk); } #define BCM7XXX_28NM_GPHY(_oui, _name) \ @@ -552,6 +566,7 @@ static int bcm7xxx_28nm_probe(struct phy_device *phydev) .get_strings = bcm_phy_get_strings, \ .get_stats = bcm7xxx_28nm_get_phy_stats, \ .probe = bcm7xxx_28nm_probe, \ + .remove = bcm7xxx_28nm_remove, \ } #define BCM7XXX_28NM_EPHY(_oui, _name) \ @@ -567,6 +582,7 @@ static int bcm7xxx_28nm_probe(struct phy_device *phydev) .get_strings = bcm_phy_get_strings, \ .get_stats = bcm7xxx_28nm_get_phy_stats, \ .probe = bcm7xxx_28nm_probe, \ + .remove = bcm7xxx_28nm_remove, \ } #define BCM7XXX_40NM_EPHY(_oui, _name) \