From patchwork Mon Jul 13 20:50:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew Hagan X-Patchwork-Id: 1328461 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=fung/LLF; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4B5G8Y0gZ2z9sRR for ; Tue, 14 Jul 2020 06:53:49 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726461AbgGMUxo (ORCPT ); Mon, 13 Jul 2020 16:53:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60926 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726400AbgGMUxo (ORCPT ); Mon, 13 Jul 2020 16:53:44 -0400 Received: from mail-wr1-x441.google.com (mail-wr1-x441.google.com [IPv6:2a00:1450:4864:20::441]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2616C061755; Mon, 13 Jul 2020 13:53:43 -0700 (PDT) Received: by mail-wr1-x441.google.com with SMTP id f7so18386147wrw.1; Mon, 13 Jul 2020 13:53:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=GZtfiXav89wkpI0gUU9ArbYeF3poYQO7hSKJ5JBj8Is=; b=fung/LLFRum+RDTwtolw1vvFrmSuH4yuAH9sTFKLqHGXSoVOLz0V+QPjaSF67njYrh c7yACuSsPqsGdbLoSnXE+v5vWPfPRpqBPagAYRLi8BYIdRg1SY/ZEwCjDSxNX8hgCR7i cvDoaUvvedmz2cGAyfc2U0qfLSH1obS3KAu8Y1CmN6suX+iC30domrBnyd/i21FAZxCm pLgyzlEiA72HCw9g9LJeCId9SzUvSi9jf/cWKiTrFkQ6LEwRRetWGdEnvGLQis5XSKHo ddxC6i8d50v+DYMzTTtUSZJCHR90BrTWW+nmgJP6+0sZaGqVNeab366zV0mYRVmRePGH RLmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=GZtfiXav89wkpI0gUU9ArbYeF3poYQO7hSKJ5JBj8Is=; b=MXWuVr/XNQsk0n0Rz8VYN62hjANyhojoV9gZQwCXeqww/MNgEuWr7nPxieZr3puCqF PUHY45BOT/s1oXZNxSWuase/kKOtJcHTeq9P355UwOaDmSj3wRGHey3HBgWIzPcVYMHE ODdujQAGZwuxNSCspYv17zFa0xoIT/vX2rWQxY+FymztX7TWIxEXE2dhFoLky9SZdtMh wfYv+znOXWX9FaSShxWUxX3RjPZf1S+85dtf22yq5RXGhx72R9qTleF3L05WdrXejr6G /mKGYWYijrpyyrUFW9mq0PtyhpXUHMhFx/kX2KuWmKJFc645XWGEA8USMCotiiE7pgxT lNgg== X-Gm-Message-State: AOAM533H56v2+W68rlNuirsihGAhYvouqGxkOMLByTWWYSmqNKCxh0jS /6oHzgkBmZiJnBR6yE9V1RyN9diu X-Google-Smtp-Source: ABdhPJxnGb0JC591zQeRAAFavJrZe5Bs7bJiLfZd0l0fnWlLWIChM52eUyFnE2RxEUQoQUNPkvkS5w== X-Received: by 2002:adf:f54b:: with SMTP id j11mr1373720wrp.206.1594673622534; Mon, 13 Jul 2020 13:53:42 -0700 (PDT) Received: from cluster5 ([80.76.206.81]) by smtp.gmail.com with ESMTPSA id a15sm29443811wrh.54.2020.07.13.13.53.41 (version=TLS1 cipher=ECDHE-ECDSA-AES128-SHA bits=128/128); Mon, 13 Jul 2020 13:53:42 -0700 (PDT) From: Matthew Hagan Cc: Matthew Hagan , Andrew Lunn , Vivien Didelot , Florian Fainelli , "David S. Miller" , Jakub Kicinski , linux@armlinux.org.uk, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, John Crispin , Jonathan McDowell Subject: [PATCH 1/2] net: dsa: qca8k: Add additional PORT0_PAD_CTRL options Date: Mon, 13 Jul 2020 21:50:25 +0100 Message-Id: <2e1776f997441792a44cd35a16f1e69f848816ce.1594668793.git.mnhagan88@gmail.com> X-Mailer: git-send-email 2.25.4 MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org A number of devices require additional PORT0_PAD configuration that cannot otherwise be inferred. This patch is based on John Crispin's "net: dsa: qca8k: allow swapping of mac0 and mac6", adding the ability to swap mac0 and mac6, as well as to set the transmit and receive clock phase to falling edge. To keep things tidy, a function has been added to handle these device tree properties. However this handling could be moved to the qca8k_phylink_mac_config function if preferred. Signed-off-by: Matthew Hagan --- drivers/net/dsa/qca8k.c | 42 +++++++++++++++++++++++++++++++++++------ drivers/net/dsa/qca8k.h | 3 +++ 2 files changed, 39 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index 4acad5fa0c84..1443f97dd348 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -587,6 +587,28 @@ qca8k_setup_mdio_bus(struct qca8k_priv *priv) return 0; } +static void +qca8k_setup_port_pad_ctrl_reg(struct qca8k_priv *priv) +{ + u32 val = qca8k_read(priv, QCA8K_REG_PORT0_PAD_CTRL); + + /* Swap MAC0-MAC6 */ + if (of_property_read_bool(priv->dev->of_node, + "qca,exchange-mac0-mac6")) + val |= QCA8K_PORT0_PAD_CTRL_MAC06_EXCHG; + + /* SGMII Clock phase configuration */ + if (of_property_read_bool(priv->dev->of_node, + "qca,sgmii-rxclk-falling-edge")) + val |= QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE; + + if (of_property_read_bool(priv->dev->of_node, + "qca,sgmii-txclk-falling-edge")) + val |= QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE; + + qca8k_write(priv, QCA8K_REG_PORT0_PAD_CTRL, val); +} + static int qca8k_setup(struct dsa_switch *ds) { @@ -611,6 +633,9 @@ qca8k_setup(struct dsa_switch *ds) if (ret) return ret; + /* Configure additional port pad properties */ + qca8k_setup_port_pad_ctrl_reg(priv); + /* Enable CPU Port */ qca8k_reg_set(priv, QCA8K_REG_GLOBAL_FW_CTRL0, QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN); @@ -722,27 +747,32 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, return; } + /* Read port pad ctrl reg */ + val = qca8k_read(priv, reg); + switch (state->interface) { case PHY_INTERFACE_MODE_RGMII: /* RGMII mode means no delay so don't enable the delay */ - qca8k_write(priv, reg, QCA8K_PORT_PAD_RGMII_EN); + val |= QCA8K_PORT_PAD_RGMII_EN; + qca8k_write(priv, reg, val); break; case PHY_INTERFACE_MODE_RGMII_ID: /* RGMII_ID needs internal delay. This is enabled through * PORT5_PAD_CTRL for all ports, rather than individual port * registers */ - qca8k_write(priv, reg, - QCA8K_PORT_PAD_RGMII_EN | - QCA8K_PORT_PAD_RGMII_TX_DELAY(QCA8K_MAX_DELAY) | - QCA8K_PORT_PAD_RGMII_RX_DELAY(QCA8K_MAX_DELAY)); + val |= QCA8K_PORT_PAD_RGMII_EN | + QCA8K_PORT_PAD_RGMII_TX_DELAY(QCA8K_MAX_DELAY) | + QCA8K_PORT_PAD_RGMII_RX_DELAY(QCA8K_MAX_DELAY); + qca8k_write(priv, reg, val); qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL, QCA8K_PORT_PAD_RGMII_RX_DELAY_EN); break; case PHY_INTERFACE_MODE_SGMII: case PHY_INTERFACE_MODE_1000BASEX: /* Enable SGMII on the port */ - qca8k_write(priv, reg, QCA8K_PORT_PAD_SGMII_EN); + val |= QCA8K_PORT_PAD_SGMII_EN; + qca8k_write(priv, reg, val); /* Enable/disable SerDes auto-negotiation as necessary */ val = qca8k_read(priv, QCA8K_REG_PWS); diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h index 10ef2bca2cde..4e115557e571 100644 --- a/drivers/net/dsa/qca8k.h +++ b/drivers/net/dsa/qca8k.h @@ -26,6 +26,9 @@ #define QCA8K_MASK_CTRL_ID_M 0xff #define QCA8K_MASK_CTRL_ID_S 8 #define QCA8K_REG_PORT0_PAD_CTRL 0x004 +#define QCA8K_PORT0_PAD_CTRL_MAC06_EXCHG BIT(31) +#define QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE BIT(19) +#define QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE BIT(18) #define QCA8K_REG_PORT5_PAD_CTRL 0x008 #define QCA8K_REG_PORT6_PAD_CTRL 0x00c #define QCA8K_PORT_PAD_RGMII_EN BIT(26) From patchwork Mon Jul 13 20:50:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew Hagan X-Patchwork-Id: 1328463 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=QZaSFTqH; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4B5G8b24n9z9sRk for ; Tue, 14 Jul 2020 06:53:51 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726675AbgGMUxs (ORCPT ); Mon, 13 Jul 2020 16:53:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726382AbgGMUxp (ORCPT ); Mon, 13 Jul 2020 16:53:45 -0400 Received: from mail-wm1-x344.google.com (mail-wm1-x344.google.com [IPv6:2a00:1450:4864:20::344]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E8DF5C061755; Mon, 13 Jul 2020 13:53:44 -0700 (PDT) Received: by mail-wm1-x344.google.com with SMTP id o2so1316328wmh.2; Mon, 13 Jul 2020 13:53:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ALurGzrJJ9wqkP2ke4uTKprfGDnx2zaAQBFzAuepUB4=; b=QZaSFTqHdagHJdkMYHPypk8cFC/5FtmTQkGnZ4jgNm69WsJW5rwpDbQqDBInBpO4Ku rLSLuXMoRXWxm1KVRHinFg5/kT6aj/3zlewCGDL2THtVzrhGlHDGOxavNY3KXR7oZab/ UC3MMrG2u6YWtUn21ItZjxZ6+cOW+dgTf6/2FAkI6FA3RHlv2kIR8oMYjRogSWRP1Ixm tkf9YgDXo/+D4Evh2U5Td/zJq03vQvZgw/1BJZIi5sThIlxKFQIAiqmtkVNOtUvsCSlC GHbVGcmxBPuhkGQK9P7h1qjWyYXx3DZ/vZ9JPZfBpmikhWaUAZL4ixXyIXp33cxLrEKR /zCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ALurGzrJJ9wqkP2ke4uTKprfGDnx2zaAQBFzAuepUB4=; b=bAC+7iRLhVtvuswNBF87HtYEF/WZ0GyAAfGOlFvMBCiJoTSsIyAs0eZGgCqfci/9nC 0ZvccCiLZ/3h07L4KVubBKWO90uQp91bLw8yHbNndGDSKXZQ+8eSRMbVmkgmEiSwDKV8 +IA3lC9nJcoeOXu4G9Rc2urOlv8x9ia2mXmo+9kXxyZmEmT1YcEXMWiyEJewTt8OpMSM SJQX0XQkLMa8EMdK6KuH7xZxwGS2FNGP/YDLhhpgYlnEHoKSKa7AhZk6yLXwf/97/XzB GiDG5Otc7wmYfCLxLLQE8a0E/7dgAoP0TXK96uDctbwJKsAx9C/HSFKHzBBueDbnMWDl psQQ== X-Gm-Message-State: AOAM533XimZ1zvyyyBRLki8C906kZMBfbyz+HBEFQneilfohL0xQ6gCJ mD3snP+qDsxtSeOJowCKUmW/OG6U X-Google-Smtp-Source: ABdhPJzEX/tt0TMQMf+TPx9VPK4TeJsjDGIiyPDidh58RrSuPoa5tp7YEZ4O2oiNcvM7Dzp8Wh/5og== X-Received: by 2002:a1c:a4c6:: with SMTP id n189mr1099908wme.173.1594673623480; Mon, 13 Jul 2020 13:53:43 -0700 (PDT) Received: from cluster5 ([80.76.206.81]) by smtp.gmail.com with ESMTPSA id u20sm1019921wmm.15.2020.07.13.13.53.43 (version=TLS1 cipher=ECDHE-ECDSA-AES128-SHA bits=128/128); Mon, 13 Jul 2020 13:53:43 -0700 (PDT) From: Matthew Hagan Cc: Matthew Hagan , Andrew Lunn , Vivien Didelot , Florian Fainelli , "David S. Miller" , Jakub Kicinski , linux@armlinux.org.uk, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, John Crispin , Jonathan McDowell , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH 2/2] dt-bindings: net: dsa: qca8k: Add PORT0_PAD_CTRL properties Date: Mon, 13 Jul 2020 21:50:26 +0100 Message-Id: X-Mailer: git-send-email 2.25.4 In-Reply-To: <2e1776f997441792a44cd35a16f1e69f848816ce.1594668793.git.mnhagan88@gmail.com> References: <2e1776f997441792a44cd35a16f1e69f848816ce.1594668793.git.mnhagan88@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add names and decriptions of additional PORT0_PAD_CTRL properties. Signed-off-by: Matthew Hagan --- Documentation/devicetree/bindings/net/dsa/qca8k.txt | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.txt b/Documentation/devicetree/bindings/net/dsa/qca8k.txt index ccbc6d89325d..3d34c4f2e891 100644 --- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt +++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt @@ -13,6 +13,14 @@ Optional properties: - reset-gpios: GPIO to be used to reset the whole device +Optional MAC configuration properties: + +- qca,exchange-mac0-mac6: If present, internally swaps MAC0 and MAC6. +- qca,sgmii-rxclk-falling-edge: If present, sets receive clock phase to + falling edge. +- qca,sgmii-txclk-falling-edge: If present, sets transmit clock phase to + falling edge. + Subnodes: The integrated switch subnode should be specified according to the binding